AD9249 ADC

Fork of adc_ad9249 by wimbeaumont Project

Committer:
NickRyder
Date:
Tue Oct 07 21:31:16 2014 +0000
Revision:
2:f300a1dafedc
Parent:
1:01459a6ab296
Tidying up.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wbeaumont 0:9efb460e962b 1 /* SWSPI, Software SPI library
wbeaumont 0:9efb460e962b 2 * Copyright (c) 2012-2014, David R. Van Wagner, http://techwithdave.blogspot.com
wbeaumont 0:9efb460e962b 3 *
wbeaumont 0:9efb460e962b 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
wbeaumont 0:9efb460e962b 5 * of this software and associated documentation files (the "Software"), to deal
wbeaumont 0:9efb460e962b 6 * in the Software without restriction, including without limitation the rights
wbeaumont 0:9efb460e962b 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
wbeaumont 0:9efb460e962b 8 * copies of the Software, and to permit persons to whom the Software is
wbeaumont 0:9efb460e962b 9 * furnished to do so, subject to the following conditions:
wbeaumont 0:9efb460e962b 10 *
wbeaumont 0:9efb460e962b 11 * The above copyright notice and this permission notice shall be included in
wbeaumont 0:9efb460e962b 12 * all copies or substantial portions of the Software.
wbeaumont 0:9efb460e962b 13 *
wbeaumont 0:9efb460e962b 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
wbeaumont 0:9efb460e962b 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
wbeaumont 0:9efb460e962b 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
wbeaumont 0:9efb460e962b 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
wbeaumont 0:9efb460e962b 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
wbeaumont 0:9efb460e962b 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
wbeaumont 0:9efb460e962b 20 * THE SOFTWARE.
wbeaumont 0:9efb460e962b 21 */
wbeaumont 0:9efb460e962b 22 /*
wbeaumont 0:9efb460e962b 23 * modified the software for adapt to the AD9249 ADC ( bi directional ) with LVDS interface
wbeaumont 0:9efb460e962b 24
wbeaumont 0:9efb460e962b 25
wbeaumont 0:9efb460e962b 26 */
wbeaumont 0:9efb460e962b 27
wbeaumont 0:9efb460e962b 28 #include <mbed.h>
wbeaumont 0:9efb460e962b 29 #include "SWSPI_BI.h"
wbeaumont 0:9efb460e962b 30 #include "S_SCTRL_SM1_hwfunct.h"
wbeaumont 0:9efb460e962b 31
wbeaumont 1:01459a6ab296 32 #define SWSPI_BI_SRC_VER "1.50"
wbeaumont 1:01459a6ab296 33
wbeaumont 0:9efb460e962b 34 /**
wbeaumont 0:9efb460e962b 35 PARAM
wbeaumont 0:9efb460e962b 36 @misopin pointer to the input / output pin for the data communication
wbeaumont 0:9efb460e962b 37 @rdir_pin pointer to the output pin that sets the remote LVDS buffer to read / write
wbeaumont 0:9efb460e962b 38 @ldir_pin pointer to the output pin that sets the local LVDS buffer to read / write
wbeaumont 0:9efb460e962b 39 @sclk_pin pointer to the output pin that act as the clock signal for the interface
wbeaumont 0:9efb460e962b 40
wbeaumont 0:9efb460e962b 41 */
wbeaumont 1:01459a6ab296 42 SWSPI_BI::SWSPI_BI(DigitalInOut *msio_pin, DigitalOut *rdir_pin,DigitalOut *ldir_pin, DigitalOut *sclk_pin)
wbeaumont 1:01459a6ab296 43 :getVersion( SWSPI_BI_HDR_VER , SWSPI_BI_SRC_VER , __TIME__, __DATE__)
wbeaumont 1:01459a6ab296 44 {
wbeaumont 0:9efb460e962b 45
wbeaumont 0:9efb460e962b 46 msio = msio_pin;
wbeaumont 0:9efb460e962b 47 rdir = rdir_pin;
wbeaumont 0:9efb460e962b 48 ldir = ldir_pin;
wbeaumont 0:9efb460e962b 49 sclk = sclk_pin;
wbeaumont 0:9efb460e962b 50 set_bi_spi_mo(1, msio,ldir,rdir);
wbeaumont 0:9efb460e962b 51
wbeaumont 0:9efb460e962b 52 format(8);
wbeaumont 0:9efb460e962b 53 frequency(500000);
wbeaumont 0:9efb460e962b 54 }
wbeaumont 0:9efb460e962b 55
wbeaumont 0:9efb460e962b 56 SWSPI_BI::~SWSPI_BI()
wbeaumont 0:9efb460e962b 57 {
wbeaumont 0:9efb460e962b 58 }
wbeaumont 0:9efb460e962b 59
wbeaumont 0:9efb460e962b 60 void SWSPI_BI::format( int bitsin, int modein ){
wbeaumont 0:9efb460e962b 61 bits = bitsin;
wbeaumont 0:9efb460e962b 62 mode = modein;
wbeaumont 0:9efb460e962b 63 polarity = !((modein >> 1) & 1);
wbeaumont 0:9efb460e962b 64 phase = modein & 1;
wbeaumont 0:9efb460e962b 65 sclk->write(polarity);
wbeaumont 0:9efb460e962b 66 }
wbeaumont 0:9efb460e962b 67
wbeaumont 0:9efb460e962b 68 void SWSPI_BI::frequency(int hz)
wbeaumont 0:9efb460e962b 69 {
wbeaumont 0:9efb460e962b 70 this->freq = hz;
wbeaumont 0:9efb460e962b 71 }
wbeaumont 0:9efb460e962b 72
wbeaumont 0:9efb460e962b 73 void SWSPI_BI::write(unsigned int value, DigitalOut * cs, bool lastdata, int cs_pol,bool nxtrd ){
wbeaumont 0:9efb460e962b 74
wbeaumont 0:9efb460e962b 75 // write data to output
wbeaumont 0:9efb460e962b 76 // assumption is that the cs line was just set from high to low so that the SPI slave is in read mode
wbeaumont 0:9efb460e962b 77 value= ~value;
wbeaumont 0:9efb460e962b 78 set_bi_spi_mo(1,msio,ldir,rdir);
wbeaumont 0:9efb460e962b 79 cs->write(cs_pol);
wbeaumont 0:9efb460e962b 80 for (int bit = bits-1; bit >= 0; --bit) {
wbeaumont 0:9efb460e962b 81 msio->write(((value >> bit) & 0x01) != 0);
wbeaumont 0:9efb460e962b 82 if(phase) { sclk->write(!polarity); wait(1.0/freq/2); sclk->write(polarity);
wbeaumont 0:9efb460e962b 83 if(!bit and nxtrd) set_bi_spi_mo(0,msio,ldir,rdir); // set already to input mode
wbeaumont 0:9efb460e962b 84 wait(1.0/freq/2); }
wbeaumont 0:9efb460e962b 85 else { wait(1.0/freq/2); sclk->write(!polarity); wait(1.0/freq/2); sclk->write(polarity); }
wbeaumont 0:9efb460e962b 86
wbeaumont 0:9efb460e962b 87
wbeaumont 0:9efb460e962b 88 }
wbeaumont 0:9efb460e962b 89 if( lastdata) {
wbeaumont 0:9efb460e962b 90 set_bi_spi_mo(0,msio,ldir,rdir);
wbeaumont 0:9efb460e962b 91 cs->write(!cs_pol);
wbeaumont 0:9efb460e962b 92 }
wbeaumont 0:9efb460e962b 93 else {
wbeaumont 0:9efb460e962b 94 }
wbeaumont 0:9efb460e962b 95 }
wbeaumont 0:9efb460e962b 96
wbeaumont 0:9efb460e962b 97 unsigned int SWSPI_BI::read( DigitalOut * cs, bool lastdata, int cs_pol ){
wbeaumont 0:9efb460e962b 98 unsigned int read = 0;
wbeaumont 0:9efb460e962b 99 set_bi_spi_mo(0,msio,ldir,rdir);
wbeaumont 0:9efb460e962b 100 cs->write(cs_pol);
wbeaumont 0:9efb460e962b 101 wait(1.0/freq/2);
wbeaumont 0:9efb460e962b 102 for (int bit = bits-1; bit >= 0; --bit) {
wbeaumont 0:9efb460e962b 103 if (phase == 0) {
wbeaumont 0:9efb460e962b 104 if (msio->read()) read |= (1 << bit);
wbeaumont 0:9efb460e962b 105
wbeaumont 0:9efb460e962b 106 }
wbeaumont 0:9efb460e962b 107 sclk->write(!polarity);
wbeaumont 0:9efb460e962b 108 wait(1.0/freq/2);
wbeaumont 0:9efb460e962b 109 if (phase == 1) {
wbeaumont 0:9efb460e962b 110 if (msio->read()) read |= (1 << bit);
wbeaumont 0:9efb460e962b 111 }
wbeaumont 0:9efb460e962b 112
wbeaumont 0:9efb460e962b 113 sclk->write(polarity);
wbeaumont 0:9efb460e962b 114 wait(1.0/freq/2);
wbeaumont 0:9efb460e962b 115 }
wbeaumont 0:9efb460e962b 116 if( lastdata) {
wbeaumont 0:9efb460e962b 117 cs->write(!cs_pol);
wbeaumont 0:9efb460e962b 118 }
wbeaumont 0:9efb460e962b 119 // else keep current io config
wbeaumont 0:9efb460e962b 120
wbeaumont 0:9efb460e962b 121
wbeaumont 0:9efb460e962b 122 return ~read;
wbeaumont 0:9efb460e962b 123 }
wbeaumont 0:9efb460e962b 124