Nick Ryder / S_SCTRL_SMlib

Sold slow control/

Dependents:   sscm

Fork of S_SCTRL_SMlib by wimbeaumont Project

S_SCTRL_SM1_PinDef.h@0:8d755a0f3ab3, 2014-09-07 (annotated)

Committer:
wbeaumont
Date:
Sun Sep 07 14:39:32 2014 +0000
Revision:
0:8d755a0f3ab3
Child:
8:fe1477cd1c14
inital lib untested to include in e test

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wbeaumont 0:8d755a0f3ab3 1 #ifndef S_SCTL_SM1_PINDEF_H
wbeaumont 0:8d755a0f3ab3 2 #define S_SCTL_SM1_PINDEF_H
wbeaumont 0:8d755a0f3ab3 3
wbeaumont 0:8d755a0f3ab3 4
wbeaumont 0:8d755a0f3ab3 5
wbeaumont 0:8d755a0f3ab3 6 #define MOSI PTB1
wbeaumont 0:8d755a0f3ab3 7 #define MISO PTB8
wbeaumont 0:8d755a0f3ab3 8 #define SCLK PTD6
wbeaumont 0:8d755a0f3ab3 9 #define TEMP_CSN PTD7
wbeaumont 0:8d755a0f3ab3 10 #define TEMP_CABLE_CSN1 PTC8
wbeaumont 0:8d755a0f3ab3 11 #define TEMP_CABLE_CSN2 PTE3
wbeaumont 0:8d755a0f3ab3 12 #define DAC_DCEN PTE0
wbeaumont 0:8d755a0f3ab3 13 #define DAC_RSTN PTC13
wbeaumont 0:8d755a0f3ab3 14 // SPI 1 bi
wbeaumont 0:8d755a0f3ab3 15 #define ADC_STIO PTB9
wbeaumont 0:8d755a0f3ab3 16 #define STIO_MO PTE5
wbeaumont 0:8d755a0f3ab3 17 #define DIRECTION PTB10
wbeaumont 0:8d755a0f3ab3 18 #define ADC1_CSN PTB11
wbeaumont 0:8d755a0f3ab3 19 #define ADC2_CSN PTE2
wbeaumont 0:8d755a0f3ab3 20
wbeaumont 0:8d755a0f3ab3 21 // SPI 2
wbeaumont 0:8d755a0f3ab3 22 #define MOSI_2 PTE23
wbeaumont 0:8d755a0f3ab3 23 #define MISO_2 PTA16
wbeaumont 0:8d755a0f3ab3 24 #define SCLK_2 PTE30
wbeaumont 0:8d755a0f3ab3 25 #define TEMP_2_CSN PTE29
wbeaumont 0:8d755a0f3ab3 26 #define TEMP_2_CABLE_CSN1 PTC4
wbeaumont 0:8d755a0f3ab3 27 #define TEMP_2_CABLE_CSN2 PTC3
wbeaumont 0:8d755a0f3ab3 28 #define DAC_2_DCEN PTE22
wbeaumont 0:8d755a0f3ab3 29 #define DAC_2_RSTN PTC5
wbeaumont 0:8d755a0f3ab3 30 // SPI 2 bi
wbeaumont 0:8d755a0f3ab3 31 #define ADC_2_STIO PTC7
wbeaumont 0:8d755a0f3ab3 32 #define STIO2_MO PTC0
wbeaumont 0:8d755a0f3ab3 33 #define DIRECTION2 PTC6
wbeaumont 0:8d755a0f3ab3 34 #define ADC1_2_CSN PTA17
wbeaumont 0:8d755a0f3ab3 35 #define ADC2_2_CSN PTD4
wbeaumont 0:8d755a0f3ab3 36
wbeaumont 0:8d755a0f3ab3 37 // FLASH
wbeaumont 0:8d755a0f3ab3 38 #define F_SCLK PTD1
wbeaumont 0:8d755a0f3ab3 39 #define F_MISO PTD3
wbeaumont 0:8d755a0f3ab3 40 #define F_MOSI PTD2
wbeaumont 0:8d755a0f3ab3 41 #define F_CS PTD0
wbeaumont 0:8d755a0f3ab3 42 #define N_FWP PTC17
wbeaumont 0:8d755a0f3ab3 43 #define N_HOLD PTC16
wbeaumont 0:8d755a0f3ab3 44
wbeaumont 0:8d755a0f3ab3 45 // ID
wbeaumont 0:8d755a0f3ab3 46 #define AD0 PTC12
wbeaumont 0:8d755a0f3ab3 47 #define AD1 PTD5
wbeaumont 0:8d755a0f3ab3 48 #define AD2 PTA13
wbeaumont 0:8d755a0f3ab3 49 #define AD3 PTC9
wbeaumont 0:8d755a0f3ab3 50 #define AD4 PTE31
wbeaumont 0:8d755a0f3ab3 51 //CAL
wbeaumont 0:8d755a0f3ab3 52 #define CAL_TRIG_2AND4 PTC11
wbeaumont 0:8d755a0f3ab3 53 #define CAL_TRIG_1AND3 PTC10
wbeaumont 0:8d755a0f3ab3 54 #define GEN_EXT_CAL PTE4
wbeaumont 0:8d755a0f3ab3 55 #define SEL_CAL_INT PTA5
wbeaumont 0:8d755a0f3ab3 56 #define SEL_2_CAL_INT PTA12
wbeaumont 0:8d755a0f3ab3 57 #define SEL_CAL_EXT PTA4
wbeaumont 0:8d755a0f3ab3 58
wbeaumont 0:8d755a0f3ab3 59
wbeaumont 0:8d755a0f3ab3 60 // analogue
wbeaumont 0:8d755a0f3ab3 61 #define ADC1 PTB0
wbeaumont 0:8d755a0f3ab3 62 #define ADC2 PTB1
wbeaumont 0:8d755a0f3ab3 63
wbeaumont 0:8d755a0f3ab3 64
wbeaumont 0:8d755a0f3ab3 65 // direction levels
wbeaumont 0:8d755a0f3ab3 66 #define LDIR_OUT 0
wbeaumont 0:8d755a0f3ab3 67 #define LDIR_IN 1
wbeaumont 0:8d755a0f3ab3 68
wbeaumont 0:8d755a0f3ab3 69 #define RDIR_OUT 0
wbeaumont 0:8d755a0f3ab3 70 #define RDIR_IN 1
wbeaumont 0:8d755a0f3ab3 71
wbeaumont 0:8d755a0f3ab3 72 #define LEDRED PTB18
wbeaumont 0:8d755a0f3ab3 73 #define LEDGREEN PTB19
wbeaumont 0:8d755a0f3ab3 74 #define LEDBLUE PTD1
wbeaumont 0:8d755a0f3ab3 75
wbeaumont 0:8d755a0f3ab3 76 #endif