Mitchell Wright / AD7124_no_OS

AD7124 no-OS library files

ad7124.h@1:22ed45e195a9, 2019-09-05 (annotated)

Committer:
MitchAD
Date:
Thu Sep 05 20:45:41 2019 +0000
Revision:
1:22ed45e195a9
Initial Commit for the AD7124 no-OS drivers

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MitchAD 1:22ed45e195a9 1 /***************************************************************************//**
MitchAD 1:22ed45e195a9 2 * @file AD7124.h
MitchAD 1:22ed45e195a9 3 * @brief AD7124 header file.
MitchAD 1:22ed45e195a9 4 * @devices AD7124-4, AD7124-8
MitchAD 1:22ed45e195a9 5 *
MitchAD 1:22ed45e195a9 6 ********************************************************************************
MitchAD 1:22ed45e195a9 7 * Copyright 2015(c) Analog Devices, Inc.
MitchAD 1:22ed45e195a9 8 *
MitchAD 1:22ed45e195a9 9 * All rights reserved.
MitchAD 1:22ed45e195a9 10 *
MitchAD 1:22ed45e195a9 11 * Redistribution and use in source and binary forms, with or without modification,
MitchAD 1:22ed45e195a9 12 * are permitted provided that the following conditions are met:
MitchAD 1:22ed45e195a9 13 * - Redistributions of source code must retain the above copyright
MitchAD 1:22ed45e195a9 14 * notice, this list of conditions and the following disclaimer.
MitchAD 1:22ed45e195a9 15 * - Redistributions in binary form must reproduce the above copyright
MitchAD 1:22ed45e195a9 16 * notice, this list of conditions and the following disclaimer in
MitchAD 1:22ed45e195a9 17 * the documentation and/or other materials provided with the
MitchAD 1:22ed45e195a9 18 * distribution.
MitchAD 1:22ed45e195a9 19 * - Neither the name of Analog Devices, Inc. nor the names of its
MitchAD 1:22ed45e195a9 20 * contributors may be used to endorse or promote products derived
MitchAD 1:22ed45e195a9 21 * from this software without specific prior written permission.
MitchAD 1:22ed45e195a9 22 * - The use of this software may or may not infringe the patent rights
MitchAD 1:22ed45e195a9 23 * of one or more patent holders. This license does not release you
MitchAD 1:22ed45e195a9 24 * from the requirement that you obtain separate licenses from these
MitchAD 1:22ed45e195a9 25 * patent holders to use this software.
MitchAD 1:22ed45e195a9 26 * - Use of the software either in source or binary form, must be run
MitchAD 1:22ed45e195a9 27 * on or directly connected to an Analog Devices Inc. component.
MitchAD 1:22ed45e195a9 28 *
MitchAD 1:22ed45e195a9 29 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED
MitchAD 1:22ed45e195a9 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY
MitchAD 1:22ed45e195a9 31 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
MitchAD 1:22ed45e195a9 32 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
MitchAD 1:22ed45e195a9 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
MitchAD 1:22ed45e195a9 34 * INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
MitchAD 1:22ed45e195a9 35 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
MitchAD 1:22ed45e195a9 36 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
MitchAD 1:22ed45e195a9 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
MitchAD 1:22ed45e195a9 38 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
MitchAD 1:22ed45e195a9 39 *******************************************************************************/
MitchAD 1:22ed45e195a9 40
MitchAD 1:22ed45e195a9 41 #ifndef __AD7124_H__
MitchAD 1:22ed45e195a9 42 #define __AD7124_H__
MitchAD 1:22ed45e195a9 43
MitchAD 1:22ed45e195a9 44 /******************************************************************************/
MitchAD 1:22ed45e195a9 45 /***************************** Include Files **********************************/
MitchAD 1:22ed45e195a9 46 /******************************************************************************/
MitchAD 1:22ed45e195a9 47 #include <stdint.h>
MitchAD 1:22ed45e195a9 48 #include "platform_drivers.h"
MitchAD 1:22ed45e195a9 49
MitchAD 1:22ed45e195a9 50 /******************************************************************************/
MitchAD 1:22ed45e195a9 51 /******************* Register map and register definitions ********************/
MitchAD 1:22ed45e195a9 52 /******************************************************************************/
MitchAD 1:22ed45e195a9 53
MitchAD 1:22ed45e195a9 54 #define AD7124_RW 1 /* Read and Write */
MitchAD 1:22ed45e195a9 55 #define AD7124_R 2 /* Read only */
MitchAD 1:22ed45e195a9 56 #define AD7124_W 3 /* Write only */
MitchAD 1:22ed45e195a9 57
MitchAD 1:22ed45e195a9 58 /* AD7124 Register Map */
MitchAD 1:22ed45e195a9 59 #define AD7124_COMM_REG 0x00
MitchAD 1:22ed45e195a9 60 #define AD7124_STATUS_REG 0x00
MitchAD 1:22ed45e195a9 61 #define AD7124_ADC_CTRL_REG 0x01
MitchAD 1:22ed45e195a9 62 #define AD7124_DATA_REG 0x02
MitchAD 1:22ed45e195a9 63 #define AD7124_IO_CTRL1_REG 0x03
MitchAD 1:22ed45e195a9 64 #define AD7124_IO_CTRL2_REG 0x04
MitchAD 1:22ed45e195a9 65 #define AD7124_ID_REG 0x05
MitchAD 1:22ed45e195a9 66 #define AD7124_ERR_REG 0x06
MitchAD 1:22ed45e195a9 67 #define AD7124_ERREN_REG 0x07
MitchAD 1:22ed45e195a9 68 #define AD7124_CH0_MAP_REG 0x09
MitchAD 1:22ed45e195a9 69 #define AD7124_CH1_MAP_REG 0x0A
MitchAD 1:22ed45e195a9 70 #define AD7124_CH2_MAP_REG 0x0B
MitchAD 1:22ed45e195a9 71 #define AD7124_CH3_MAP_REG 0x0C
MitchAD 1:22ed45e195a9 72 #define AD7124_CH4_MAP_REG 0x0D
MitchAD 1:22ed45e195a9 73 #define AD7124_CH5_MAP_REG 0x0E
MitchAD 1:22ed45e195a9 74 #define AD7124_CH6_MAP_REG 0x0F
MitchAD 1:22ed45e195a9 75 #define AD7124_CH7_MAP_REG 0x10
MitchAD 1:22ed45e195a9 76 #define AD7124_CH8_MAP_REG 0x11
MitchAD 1:22ed45e195a9 77 #define AD7124_CH9_MAP_REG 0x12
MitchAD 1:22ed45e195a9 78 #define AD7124_CH10_MAP_REG 0x13
MitchAD 1:22ed45e195a9 79 #define AD7124_CH11_MAP_REG 0x14
MitchAD 1:22ed45e195a9 80 #define AD7124_CH12_MAP_REG 0x15
MitchAD 1:22ed45e195a9 81 #define AD7124_CH13_MAP_REG 0x16
MitchAD 1:22ed45e195a9 82 #define AD7124_CH14_MAP_REG 0x17
MitchAD 1:22ed45e195a9 83 #define AD7124_CH15_MAP_REG 0x18
MitchAD 1:22ed45e195a9 84 #define AD7124_CFG0_REG 0x19
MitchAD 1:22ed45e195a9 85 #define AD7124_CFG1_REG 0x1A
MitchAD 1:22ed45e195a9 86 #define AD7124_CFG2_REG 0x1B
MitchAD 1:22ed45e195a9 87 #define AD7124_CFG3_REG 0x1C
MitchAD 1:22ed45e195a9 88 #define AD7124_CFG4_REG 0x1D
MitchAD 1:22ed45e195a9 89 #define AD7124_CFG5_REG 0x1E
MitchAD 1:22ed45e195a9 90 #define AD7124_CFG6_REG 0x1F
MitchAD 1:22ed45e195a9 91 #define AD7124_CFG7_REG 0x20
MitchAD 1:22ed45e195a9 92 #define AD7124_FILT0_REG 0x21
MitchAD 1:22ed45e195a9 93 #define AD7124_FILT1_REG 0x22
MitchAD 1:22ed45e195a9 94 #define AD7124_FILT2_REG 0x23
MitchAD 1:22ed45e195a9 95 #define AD7124_FILT3_REG 0x24
MitchAD 1:22ed45e195a9 96 #define AD7124_FILT4_REG 0x25
MitchAD 1:22ed45e195a9 97 #define AD7124_FILT5_REG 0x26
MitchAD 1:22ed45e195a9 98 #define AD7124_FILT6_REG 0x27
MitchAD 1:22ed45e195a9 99 #define AD7124_FILT7_REG 0x28
MitchAD 1:22ed45e195a9 100 #define AD7124_OFFS0_REG 0x29
MitchAD 1:22ed45e195a9 101 #define AD7124_OFFS1_REG 0x2A
MitchAD 1:22ed45e195a9 102 #define AD7124_OFFS2_REG 0x2B
MitchAD 1:22ed45e195a9 103 #define AD7124_OFFS3_REG 0x2C
MitchAD 1:22ed45e195a9 104 #define AD7124_OFFS4_REG 0x2D
MitchAD 1:22ed45e195a9 105 #define AD7124_OFFS5_REG 0x2E
MitchAD 1:22ed45e195a9 106 #define AD7124_OFFS6_REG 0x2F
MitchAD 1:22ed45e195a9 107 #define AD7124_OFFS7_REG 0x30
MitchAD 1:22ed45e195a9 108 #define AD7124_GAIN0_REG 0x31
MitchAD 1:22ed45e195a9 109 #define AD7124_GAIN1_REG 0x32
MitchAD 1:22ed45e195a9 110 #define AD7124_GAIN2_REG 0x33
MitchAD 1:22ed45e195a9 111 #define AD7124_GAIN3_REG 0x34
MitchAD 1:22ed45e195a9 112 #define AD7124_GAIN4_REG 0x35
MitchAD 1:22ed45e195a9 113 #define AD7124_GAIN5_REG 0x36
MitchAD 1:22ed45e195a9 114 #define AD7124_GAIN6_REG 0x37
MitchAD 1:22ed45e195a9 115 #define AD7124_GAIN7_REG 0x38
MitchAD 1:22ed45e195a9 116
MitchAD 1:22ed45e195a9 117 /* Communication Register bits */
MitchAD 1:22ed45e195a9 118 #define AD7124_COMM_REG_WEN (0 << 7)
MitchAD 1:22ed45e195a9 119 #define AD7124_COMM_REG_WR (0 << 6)
MitchAD 1:22ed45e195a9 120 #define AD7124_COMM_REG_RD (1 << 6)
MitchAD 1:22ed45e195a9 121 #define AD7124_COMM_REG_RA(x) ((x) & 0x3F)
MitchAD 1:22ed45e195a9 122
MitchAD 1:22ed45e195a9 123 /* Status Register bits */
MitchAD 1:22ed45e195a9 124 #define AD7124_STATUS_REG_RDY (1 << 7)
MitchAD 1:22ed45e195a9 125 #define AD7124_STATUS_REG_ERROR_FLAG (1 << 6)
MitchAD 1:22ed45e195a9 126 #define AD7124_STATUS_REG_POR_FLAG (1 << 4)
MitchAD 1:22ed45e195a9 127 #define AD7124_STATUS_REG_CH_ACTIVE(x) ((x) & 0xF)
MitchAD 1:22ed45e195a9 128
MitchAD 1:22ed45e195a9 129 /* ADC_Control Register bits */
MitchAD 1:22ed45e195a9 130 #define AD7124_ADC_CTRL_REG_DOUT_RDY_DEL (1 << 12)
MitchAD 1:22ed45e195a9 131 #define AD7124_ADC_CTRL_REG_CONT_READ (1 << 11)
MitchAD 1:22ed45e195a9 132 #define AD7124_ADC_CTRL_REG_DATA_STATUS (1 << 10)
MitchAD 1:22ed45e195a9 133 #define AD7124_ADC_CTRL_REG_CS_EN (1 << 9)
MitchAD 1:22ed45e195a9 134 #define AD7124_ADC_CTRL_REG_REF_EN (1 << 8)
MitchAD 1:22ed45e195a9 135 #define AD7124_ADC_CTRL_REG_POWER_MODE(x) (((x) & 0x3) << 6)
MitchAD 1:22ed45e195a9 136 #define AD7124_ADC_CTRL_REG_MODE(x) (((x) & 0xF) << 2)
MitchAD 1:22ed45e195a9 137 #define AD7124_ADC_CTRL_REG_CLK_SEL(x) (((x) & 0x3) << 0)
MitchAD 1:22ed45e195a9 138
MitchAD 1:22ed45e195a9 139 /* IO_Control_1 Register bits */
MitchAD 1:22ed45e195a9 140 #define AD7124_IO_CTRL1_REG_GPIO_DAT2 (1 << 23)
MitchAD 1:22ed45e195a9 141 #define AD7124_IO_CTRL1_REG_GPIO_DAT1 (1 << 22)
MitchAD 1:22ed45e195a9 142 #define AD7124_IO_CTRL1_REG_GPIO_CTRL2 (1 << 19)
MitchAD 1:22ed45e195a9 143 #define AD7124_IO_CTRL1_REG_GPIO_CTRL1 (1 << 18)
MitchAD 1:22ed45e195a9 144 #define AD7124_IO_CTRL1_REG_PDSW (1 << 15)
MitchAD 1:22ed45e195a9 145 #define AD7124_IO_CTRL1_REG_IOUT1(x) (((x) & 0x7) << 11)
MitchAD 1:22ed45e195a9 146 #define AD7124_IO_CTRL1_REG_IOUT0(x) (((x) & 0x7) << 8)
MitchAD 1:22ed45e195a9 147 #define AD7124_IO_CTRL1_REG_IOUT_CH1(x) (((x) & 0xF) << 4)
MitchAD 1:22ed45e195a9 148 #define AD7124_IO_CTRL1_REG_IOUT_CH0(x) (((x) & 0xF) << 0)
MitchAD 1:22ed45e195a9 149
MitchAD 1:22ed45e195a9 150 /* IO_Control_1 AD7124-8 specific bits */
MitchAD 1:22ed45e195a9 151 #define AD7124_8_IO_CTRL1_REG_GPIO_DAT4 (1 << 23)
MitchAD 1:22ed45e195a9 152 #define AD7124_8_IO_CTRL1_REG_GPIO_DAT3 (1 << 22)
MitchAD 1:22ed45e195a9 153 #define AD7124_8_IO_CTRL1_REG_GPIO_DAT2 (1 << 21)
MitchAD 1:22ed45e195a9 154 #define AD7124_8_IO_CTRL1_REG_GPIO_DAT1 (1 << 20)
MitchAD 1:22ed45e195a9 155 #define AD7124_8_IO_CTRL1_REG_GPIO_CTRL4 (1 << 19)
MitchAD 1:22ed45e195a9 156 #define AD7124_8_IO_CTRL1_REG_GPIO_CTRL3 (1 << 18)
MitchAD 1:22ed45e195a9 157 #define AD7124_8_IO_CTRL1_REG_GPIO_CTRL2 (1 << 17)
MitchAD 1:22ed45e195a9 158 #define AD7124_8_IO_CTRL1_REG_GPIO_CTRL1 (1 << 16)
MitchAD 1:22ed45e195a9 159
MitchAD 1:22ed45e195a9 160 /* IO_Control_2 Register bits */
MitchAD 1:22ed45e195a9 161 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS7 (1 << 15)
MitchAD 1:22ed45e195a9 162 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS6 (1 << 14)
MitchAD 1:22ed45e195a9 163 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS5 (1 << 11)
MitchAD 1:22ed45e195a9 164 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS4 (1 << 10)
MitchAD 1:22ed45e195a9 165 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS3 (1 << 5)
MitchAD 1:22ed45e195a9 166 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS2 (1 << 4)
MitchAD 1:22ed45e195a9 167 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS1 (1 << 1)
MitchAD 1:22ed45e195a9 168 #define AD7124_IO_CTRL2_REG_GPIO_VBIAS0 (1 << 0)
MitchAD 1:22ed45e195a9 169
MitchAD 1:22ed45e195a9 170 /* IO_Control_2 AD7124-8 specific bits */
MitchAD 1:22ed45e195a9 171 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS15 (1 << 15)
MitchAD 1:22ed45e195a9 172 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS14 (1 << 14)
MitchAD 1:22ed45e195a9 173 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS13 (1 << 13)
MitchAD 1:22ed45e195a9 174 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS12 (1 << 12)
MitchAD 1:22ed45e195a9 175 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS11 (1 << 11)
MitchAD 1:22ed45e195a9 176 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS10 (1 << 10)
MitchAD 1:22ed45e195a9 177 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS9 (1 << 9)
MitchAD 1:22ed45e195a9 178 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS8 (1 << 8)
MitchAD 1:22ed45e195a9 179 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS7 (1 << 7)
MitchAD 1:22ed45e195a9 180 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS6 (1 << 6)
MitchAD 1:22ed45e195a9 181 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS5 (1 << 5)
MitchAD 1:22ed45e195a9 182 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS4 (1 << 4)
MitchAD 1:22ed45e195a9 183 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS3 (1 << 3)
MitchAD 1:22ed45e195a9 184 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS2 (1 << 2)
MitchAD 1:22ed45e195a9 185 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS1 (1 << 1)
MitchAD 1:22ed45e195a9 186 #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS0 (1 << 0)
MitchAD 1:22ed45e195a9 187
MitchAD 1:22ed45e195a9 188 /* ID Register bits */
MitchAD 1:22ed45e195a9 189 #define AD7124_ID_REG_DEVICE_ID(x) (((x) & 0xF) << 4)
MitchAD 1:22ed45e195a9 190 #define AD7124_ID_REG_SILICON_REV(x) (((x) & 0xF) << 0)
MitchAD 1:22ed45e195a9 191
MitchAD 1:22ed45e195a9 192 /* Error Register bits */
MitchAD 1:22ed45e195a9 193 #define AD7124_ERR_REG_LDO_CAP_ERR (1 << 19)
MitchAD 1:22ed45e195a9 194 #define AD7124_ERR_REG_ADC_CAL_ERR (1 << 18)
MitchAD 1:22ed45e195a9 195 #define AD7124_ERR_REG_ADC_CONV_ERR (1 << 17)
MitchAD 1:22ed45e195a9 196 #define AD7124_ERR_REG_ADC_SAT_ERR (1 << 16)
MitchAD 1:22ed45e195a9 197 #define AD7124_ERR_REG_AINP_OV_ERR (1 << 15)
MitchAD 1:22ed45e195a9 198 #define AD7124_ERR_REG_AINP_UV_ERR (1 << 14)
MitchAD 1:22ed45e195a9 199 #define AD7124_ERR_REG_AINM_OV_ERR (1 << 13)
MitchAD 1:22ed45e195a9 200 #define AD7124_ERR_REG_AINM_UV_ERR (1 << 12)
MitchAD 1:22ed45e195a9 201 #define AD7124_ERR_REG_REF_DET_ERR (1 << 11)
MitchAD 1:22ed45e195a9 202 #define AD7124_ERR_REG_DLDO_PSM_ERR (1 << 9)
MitchAD 1:22ed45e195a9 203 #define AD7124_ERR_REG_ALDO_PSM_ERR (1 << 7)
MitchAD 1:22ed45e195a9 204 #define AD7124_ERR_REG_SPI_IGNORE_ERR (1 << 6)
MitchAD 1:22ed45e195a9 205 #define AD7124_ERR_REG_SPI_SLCK_CNT_ERR (1 << 5)
MitchAD 1:22ed45e195a9 206 #define AD7124_ERR_REG_SPI_READ_ERR (1 << 4)
MitchAD 1:22ed45e195a9 207 #define AD7124_ERR_REG_SPI_WRITE_ERR (1 << 3)
MitchAD 1:22ed45e195a9 208 #define AD7124_ERR_REG_SPI_CRC_ERR (1 << 2)
MitchAD 1:22ed45e195a9 209 #define AD7124_ERR_REG_MM_CRC_ERR (1 << 1)
MitchAD 1:22ed45e195a9 210
MitchAD 1:22ed45e195a9 211 /* Error_En Register bits */
MitchAD 1:22ed45e195a9 212 #define AD7124_ERREN_REG_MCLK_CNT_EN (1 << 22)
MitchAD 1:22ed45e195a9 213 #define AD7124_ERREN_REG_LDO_CAP_CHK_TEST_EN (1 << 21)
MitchAD 1:22ed45e195a9 214 #define AD7124_ERREN_REG_LDO_CAP_CHK(x) (((x) & 0x3) << 19)
MitchAD 1:22ed45e195a9 215 #define AD7124_ERREN_REG_ADC_CAL_ERR_EN (1 << 18)
MitchAD 1:22ed45e195a9 216 #define AD7124_ERREN_REG_ADC_CONV_ERR_EN (1 << 17)
MitchAD 1:22ed45e195a9 217 #define AD7124_ERREN_REG_ADC_SAT_ERR_EN (1 << 16)
MitchAD 1:22ed45e195a9 218 #define AD7124_ERREN_REG_AINP_OV_ERR_EN (1 << 15)
MitchAD 1:22ed45e195a9 219 #define AD7124_ERREN_REG_AINP_UV_ERR_EN (1 << 14)
MitchAD 1:22ed45e195a9 220 #define AD7124_ERREN_REG_AINM_OV_ERR_EN (1 << 13)
MitchAD 1:22ed45e195a9 221 #define AD7124_ERREN_REG_AINM_UV_ERR_EN (1 << 12)
MitchAD 1:22ed45e195a9 222 #define AD7124_ERREN_REG_REF_DET_ERR_EN (1 << 11)
MitchAD 1:22ed45e195a9 223 #define AD7124_ERREN_REG_DLDO_PSM_TRIP_TEST_EN (1 << 10)
MitchAD 1:22ed45e195a9 224 #define AD7124_ERREN_REG_DLDO_PSM_ERR_ERR (1 << 9)
MitchAD 1:22ed45e195a9 225 #define AD7124_ERREN_REG_ALDO_PSM_TRIP_TEST_EN (1 << 8)
MitchAD 1:22ed45e195a9 226 #define AD7124_ERREN_REG_ALDO_PSM_ERR_EN (1 << 7)
MitchAD 1:22ed45e195a9 227 #define AD7124_ERREN_REG_SPI_IGNORE_ERR_EN (1 << 6)
MitchAD 1:22ed45e195a9 228 #define AD7124_ERREN_REG_SPI_SCLK_CNT_ERR_EN (1 << 5)
MitchAD 1:22ed45e195a9 229 #define AD7124_ERREN_REG_SPI_READ_ERR_EN (1 << 4)
MitchAD 1:22ed45e195a9 230 #define AD7124_ERREN_REG_SPI_WRITE_ERR_EN (1 << 3)
MitchAD 1:22ed45e195a9 231 #define AD7124_ERREN_REG_SPI_CRC_ERR_EN (1 << 2)
MitchAD 1:22ed45e195a9 232 #define AD7124_ERREN_REG_MM_CRC_ERR_EN (1 << 1)
MitchAD 1:22ed45e195a9 233
MitchAD 1:22ed45e195a9 234 /* Channel Registers 0-15 bits */
MitchAD 1:22ed45e195a9 235 #define AD7124_CH_MAP_REG_CH_ENABLE (1 << 15)
MitchAD 1:22ed45e195a9 236 #define AD7124_CH_MAP_REG_SETUP(x) (((x) & 0x7) << 12)
MitchAD 1:22ed45e195a9 237 #define AD7124_CH_MAP_REG_AINP(x) (((x) & 0x1F) << 5)
MitchAD 1:22ed45e195a9 238 #define AD7124_CH_MAP_REG_AINM(x) (((x) & 0x1F) << 0)
MitchAD 1:22ed45e195a9 239
MitchAD 1:22ed45e195a9 240 /* Configuration Registers 0-7 bits */
MitchAD 1:22ed45e195a9 241 #define AD7124_CFG_REG_BIPOLAR (1 << 11)
MitchAD 1:22ed45e195a9 242 #define AD7124_CFG_REG_BURNOUT(x) (((x) & 0x3) << 9)
MitchAD 1:22ed45e195a9 243 #define AD7124_CFG_REG_REF_BUFP (1 << 8)
MitchAD 1:22ed45e195a9 244 #define AD7124_CFG_REG_REF_BUFM (1 << 7)
MitchAD 1:22ed45e195a9 245 #define AD7124_CFG_REG_AIN_BUFP (1 << 6)
MitchAD 1:22ed45e195a9 246 #define AD7124_CFG_REG_AINN_BUFM (1 << 5)
MitchAD 1:22ed45e195a9 247 #define AD7124_CFG_REG_REF_SEL(x) ((x) & 0x3) << 3
MitchAD 1:22ed45e195a9 248 #define AD7124_CFG_REG_PGA(x) (((x) & 0x7) << 0)
MitchAD 1:22ed45e195a9 249
MitchAD 1:22ed45e195a9 250 /* Filter Register 0-7 bits */
MitchAD 1:22ed45e195a9 251 #define AD7124_FILT_REG_FILTER(x) (((x) & 0x7) << 21)
MitchAD 1:22ed45e195a9 252 #define AD7124_FILT_REG_REJ60 (1 << 20)
MitchAD 1:22ed45e195a9 253 #define AD7124_FILT_REG_POST_FILTER(x) (((x) & 0x7) << 17)
MitchAD 1:22ed45e195a9 254 #define AD7124_FILT_REG_SINGLE_CYCLE (1 << 16)
MitchAD 1:22ed45e195a9 255 #define AD7124_FILT_REG_FS(x) (((x) & 0x7FF) << 0)
MitchAD 1:22ed45e195a9 256
MitchAD 1:22ed45e195a9 257 /******************************************************************************/
MitchAD 1:22ed45e195a9 258 /*************************** Types Declarations *******************************/
MitchAD 1:22ed45e195a9 259 /******************************************************************************/
MitchAD 1:22ed45e195a9 260
MitchAD 1:22ed45e195a9 261 /*! Device register info */
MitchAD 1:22ed45e195a9 262 struct ad7124_st_reg {
MitchAD 1:22ed45e195a9 263 int32_t addr;
MitchAD 1:22ed45e195a9 264 int32_t value;
MitchAD 1:22ed45e195a9 265 int32_t size;
MitchAD 1:22ed45e195a9 266 int32_t rw;
MitchAD 1:22ed45e195a9 267 };
MitchAD 1:22ed45e195a9 268
MitchAD 1:22ed45e195a9 269 /*! AD7124 registers list*/
MitchAD 1:22ed45e195a9 270 enum ad7124_registers {
MitchAD 1:22ed45e195a9 271 AD7124_Status = 0x00,
MitchAD 1:22ed45e195a9 272 AD7124_ADC_Control,
MitchAD 1:22ed45e195a9 273 AD7124_Data,
MitchAD 1:22ed45e195a9 274 AD7124_IOCon1,
MitchAD 1:22ed45e195a9 275 AD7124_IOCon2,
MitchAD 1:22ed45e195a9 276 AD7124_ID,
MitchAD 1:22ed45e195a9 277 AD7124_Error,
MitchAD 1:22ed45e195a9 278 AD7124_Error_En,
MitchAD 1:22ed45e195a9 279 AD7124_Mclk_Count,
MitchAD 1:22ed45e195a9 280 AD7124_Channel_0,
MitchAD 1:22ed45e195a9 281 AD7124_Channel_1,
MitchAD 1:22ed45e195a9 282 AD7124_Channel_2,
MitchAD 1:22ed45e195a9 283 AD7124_Channel_3,
MitchAD 1:22ed45e195a9 284 AD7124_Channel_4,
MitchAD 1:22ed45e195a9 285 AD7124_Channel_5,
MitchAD 1:22ed45e195a9 286 AD7124_Channel_6,
MitchAD 1:22ed45e195a9 287 AD7124_Channel_7,
MitchAD 1:22ed45e195a9 288 AD7124_Channel_8,
MitchAD 1:22ed45e195a9 289 AD7124_Channel_9,
MitchAD 1:22ed45e195a9 290 AD7124_Channel_10,
MitchAD 1:22ed45e195a9 291 AD7124_Channel_11,
MitchAD 1:22ed45e195a9 292 AD7124_Channel_12,
MitchAD 1:22ed45e195a9 293 AD7124_Channel_13,
MitchAD 1:22ed45e195a9 294 AD7124_Channel_14,
MitchAD 1:22ed45e195a9 295 AD7124_Channel_15,
MitchAD 1:22ed45e195a9 296 AD7124_Config_0,
MitchAD 1:22ed45e195a9 297 AD7124_Config_1,
MitchAD 1:22ed45e195a9 298 AD7124_Config_2,
MitchAD 1:22ed45e195a9 299 AD7124_Config_3,
MitchAD 1:22ed45e195a9 300 AD7124_Config_4,
MitchAD 1:22ed45e195a9 301 AD7124_Config_5,
MitchAD 1:22ed45e195a9 302 AD7124_Config_6,
MitchAD 1:22ed45e195a9 303 AD7124_Config_7,
MitchAD 1:22ed45e195a9 304 AD7124_Filter_0,
MitchAD 1:22ed45e195a9 305 AD7124_Filter_1,
MitchAD 1:22ed45e195a9 306 AD7124_Filter_2,
MitchAD 1:22ed45e195a9 307 AD7124_Filter_3,
MitchAD 1:22ed45e195a9 308 AD7124_Filter_4,
MitchAD 1:22ed45e195a9 309 AD7124_Filter_5,
MitchAD 1:22ed45e195a9 310 AD7124_Filter_6,
MitchAD 1:22ed45e195a9 311 AD7124_Filter_7,
MitchAD 1:22ed45e195a9 312 AD7124_Offset_0,
MitchAD 1:22ed45e195a9 313 AD7124_Offset_1,
MitchAD 1:22ed45e195a9 314 AD7124_Offset_2,
MitchAD 1:22ed45e195a9 315 AD7124_Offset_3,
MitchAD 1:22ed45e195a9 316 AD7124_Offset_4,
MitchAD 1:22ed45e195a9 317 AD7124_Offset_5,
MitchAD 1:22ed45e195a9 318 AD7124_Offset_6,
MitchAD 1:22ed45e195a9 319 AD7124_Offset_7,
MitchAD 1:22ed45e195a9 320 AD7124_Gain_0,
MitchAD 1:22ed45e195a9 321 AD7124_Gain_1,
MitchAD 1:22ed45e195a9 322 AD7124_Gain_2,
MitchAD 1:22ed45e195a9 323 AD7124_Gain_3,
MitchAD 1:22ed45e195a9 324 AD7124_Gain_4,
MitchAD 1:22ed45e195a9 325 AD7124_Gain_5,
MitchAD 1:22ed45e195a9 326 AD7124_Gain_6,
MitchAD 1:22ed45e195a9 327 AD7124_Gain_7,
MitchAD 1:22ed45e195a9 328 AD7124_REG_NO
MitchAD 1:22ed45e195a9 329 };
MitchAD 1:22ed45e195a9 330
MitchAD 1:22ed45e195a9 331 /*
MitchAD 1:22ed45e195a9 332 * The structure describes the device and is used with the ad7124 driver.
MitchAD 1:22ed45e195a9 333 * @spi_desc: A reference to the SPI configuration of the device.
MitchAD 1:22ed45e195a9 334 * @regs: A reference to the register list of the device that the user must
MitchAD 1:22ed45e195a9 335 * provide when calling the Setup() function.
MitchAD 1:22ed45e195a9 336 * @userCRC: Whether to do or not a cyclic redundancy check on SPI transfers.
MitchAD 1:22ed45e195a9 337 * @check_ready: When enabled all register read and write calls will first wait
MitchAD 1:22ed45e195a9 338 * until the device is ready to accept user requests.
MitchAD 1:22ed45e195a9 339 * @spi_rdy_poll_cnt: Number of times the driver should read the Error register
MitchAD 1:22ed45e195a9 340 * to check if the device is ready to accept user requests,
MitchAD 1:22ed45e195a9 341 * before a timeout error will be issued.
MitchAD 1:22ed45e195a9 342 */
MitchAD 1:22ed45e195a9 343 struct ad7124_dev {
MitchAD 1:22ed45e195a9 344 /* SPI */
MitchAD 1:22ed45e195a9 345 spi_desc *spi_desc;
MitchAD 1:22ed45e195a9 346 /* Device Settings */
MitchAD 1:22ed45e195a9 347 struct ad7124_st_reg *regs;
MitchAD 1:22ed45e195a9 348 int16_t use_crc;
MitchAD 1:22ed45e195a9 349 int16_t check_ready;
MitchAD 1:22ed45e195a9 350 int16_t spi_rdy_poll_cnt;
MitchAD 1:22ed45e195a9 351 };
MitchAD 1:22ed45e195a9 352
MitchAD 1:22ed45e195a9 353 struct ad7124_init_param {
MitchAD 1:22ed45e195a9 354 /* SPI */
MitchAD 1:22ed45e195a9 355 spi_init_param spi_init;
MitchAD 1:22ed45e195a9 356 /* Device Settings */
MitchAD 1:22ed45e195a9 357 struct ad7124_st_reg *regs;
MitchAD 1:22ed45e195a9 358 int16_t spi_rdy_poll_cnt;
MitchAD 1:22ed45e195a9 359 };
MitchAD 1:22ed45e195a9 360
MitchAD 1:22ed45e195a9 361 /******************************************************************************/
MitchAD 1:22ed45e195a9 362 /******************* AD7124 Constants *****************************************/
MitchAD 1:22ed45e195a9 363 /******************************************************************************/
MitchAD 1:22ed45e195a9 364 #define AD7124_CRC8_POLYNOMIAL_REPRESENTATION 0x07 /* x8 + x2 + x + 1 */
MitchAD 1:22ed45e195a9 365 #define AD7124_DISABLE_CRC 0
MitchAD 1:22ed45e195a9 366 #define AD7124_USE_CRC 1
MitchAD 1:22ed45e195a9 367
MitchAD 1:22ed45e195a9 368 /******************************************************************************/
MitchAD 1:22ed45e195a9 369 /************************ Functions Declarations ******************************/
MitchAD 1:22ed45e195a9 370 /******************************************************************************/
MitchAD 1:22ed45e195a9 371
MitchAD 1:22ed45e195a9 372 /*! Reads the value of the specified register. */
MitchAD 1:22ed45e195a9 373 int32_t ad7124_read_register(struct ad7124_dev *dev,
MitchAD 1:22ed45e195a9 374 struct ad7124_st_reg* p_reg);
MitchAD 1:22ed45e195a9 375
MitchAD 1:22ed45e195a9 376 /*! Writes the value of the specified register. */
MitchAD 1:22ed45e195a9 377 int32_t ad7124_write_register(struct ad7124_dev *dev,
MitchAD 1:22ed45e195a9 378 struct ad7124_st_reg reg);
MitchAD 1:22ed45e195a9 379
MitchAD 1:22ed45e195a9 380 /*! Reads the value of the specified register without a device state check. */
MitchAD 1:22ed45e195a9 381 int32_t ad7124_no_check_read_register(struct ad7124_dev *dev,
MitchAD 1:22ed45e195a9 382 struct ad7124_st_reg* p_reg);
MitchAD 1:22ed45e195a9 383
MitchAD 1:22ed45e195a9 384 /*! Writes the value of the specified register without a device state check. */
MitchAD 1:22ed45e195a9 385 int32_t ad7124_no_check_write_register(struct ad7124_dev *dev,
MitchAD 1:22ed45e195a9 386 struct ad7124_st_reg reg);
MitchAD 1:22ed45e195a9 387
MitchAD 1:22ed45e195a9 388 /*! Resets the device. */
MitchAD 1:22ed45e195a9 389 int32_t ad7124_reset(struct ad7124_dev *dev);
MitchAD 1:22ed45e195a9 390
MitchAD 1:22ed45e195a9 391 /*! Waits until the device can accept read and write user actions. */
MitchAD 1:22ed45e195a9 392 int32_t ad7124_wait_for_spi_ready(struct ad7124_dev *dev,
MitchAD 1:22ed45e195a9 393 uint32_t timeout);
MitchAD 1:22ed45e195a9 394
MitchAD 1:22ed45e195a9 395 /*! Waits until the device finishes the power-on reset operation. */
MitchAD 1:22ed45e195a9 396 int32_t ad7124_wait_to_power_on(struct ad7124_dev *dev,
MitchAD 1:22ed45e195a9 397 uint32_t timeout);
MitchAD 1:22ed45e195a9 398
MitchAD 1:22ed45e195a9 399 /*! Waits until a new conversion result is available. */
MitchAD 1:22ed45e195a9 400 int32_t ad7124_wait_for_conv_ready(struct ad7124_dev *dev,
MitchAD 1:22ed45e195a9 401 uint32_t timeout);
MitchAD 1:22ed45e195a9 402
MitchAD 1:22ed45e195a9 403 /*! Reads the conversion result from the device. */
MitchAD 1:22ed45e195a9 404 int32_t ad7124_read_data(struct ad7124_dev *dev,
MitchAD 1:22ed45e195a9 405 int32_t* p_data);
MitchAD 1:22ed45e195a9 406
MitchAD 1:22ed45e195a9 407 /*! Computes the CRC checksum for a data buffer. */
MitchAD 1:22ed45e195a9 408 uint8_t ad7124_compute_crc8(uint8_t* p_buf,
MitchAD 1:22ed45e195a9 409 uint8_t buf_size);
MitchAD 1:22ed45e195a9 410
MitchAD 1:22ed45e195a9 411 /*! Updates the CRC settings. */
MitchAD 1:22ed45e195a9 412 void ad7124_update_crcsetting(struct ad7124_dev *dev);
MitchAD 1:22ed45e195a9 413
MitchAD 1:22ed45e195a9 414 /*! Updates the device SPI interface settings. */
MitchAD 1:22ed45e195a9 415 void ad7124_update_dev_spi_settings(struct ad7124_dev *dev);
MitchAD 1:22ed45e195a9 416
MitchAD 1:22ed45e195a9 417 /*! Initializes the AD7124. */
MitchAD 1:22ed45e195a9 418 int32_t ad7124_setup(struct ad7124_dev **device,
MitchAD 1:22ed45e195a9 419 struct ad7124_init_param init_param);
MitchAD 1:22ed45e195a9 420 /*! Free the resources allocated by AD7124_Setup(). */
MitchAD 1:22ed45e195a9 421 int32_t ad7124_remove(struct ad7124_dev *dev);
MitchAD 1:22ed45e195a9 422
MitchAD 1:22ed45e195a9 423 #endif /* __AD7124_H__ */