不韋 呂 / UITDSP_ADDA

Class library for internal ADC and DAC connected by SPI. This library support clock generator using TIM3 for switched-capacitor filter to smooth output signal of DAC. This library includes derivative class to support interrupt occured in end of AD conversion. Validated for ST Nucleo F401RE, F411RE. 内蔵 ADC と，SPI 接続の DAC のためのクラスライブラリ．DAC の出力信号を平滑化するためのスイッチトキャパシタフィルタ用のクロックは TIM3 を使用．ST Nucleo F401RE，F411RE で動作を確認．

Dependents:   UITDSP_ADDA_Example UIT2_MovingAv_Intr UIT2_VariableFIR UIT2_VowelSynthesizer ... more

ADC_Interrupt.hpp@8:543daa087bd5, 2015-07-25 (annotated)

Committer:
MikamiUitOpen
Date:
Sat Jul 25 05:40:26 2015 +0000
Revision:
8:543daa087bd5
Parent:
7:14cdca8b48f8 
6

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 0:2cdd5c91d975 1 //------------------------------------------------------
MikamiUitOpen 4:03c4518de836 2 // Derived class of ADC_Base for use interrupt
MikamiUitOpen 0:2cdd5c91d975 3 //
MikamiUitOpen 7:14cdca8b48f8 4 // 2015/04/19, Copyright (c) 2015 MIKAMI, Naoki
MikamiUitOpen 0:2cdd5c91d975 5 //------------------------------------------------------
MikamiUitOpen 0:2cdd5c91d975 6
MikamiUitOpen 0:2cdd5c91d975 7 #ifndef ADC_INTERRUPT_HPP
MikamiUitOpen 0:2cdd5c91d975 8 #define ADC_INTERRUPT_HPP
MikamiUitOpen 0:2cdd5c91d975 9
MikamiUitOpen 4:03c4518de836 10 #include "ADC_BuiltIn.hpp"
MikamiUitOpen 0:2cdd5c91d975 11
MikamiUitOpen 0:2cdd5c91d975 12 namespace Mikami
MikamiUitOpen 0:2cdd5c91d975 13 {
MikamiUitOpen 4:03c4518de836 14 class ADC_Intr : public ADC_BuiltIn
MikamiUitOpen 0:2cdd5c91d975 15 {
MikamiUitOpen 0:2cdd5c91d975 16 private:
MikamiUitOpen 0:2cdd5c91d975 17 // for inhibition of copy constructor
MikamiUitOpen 0:2cdd5c91d975 18 ADC_Intr(const ADC_Intr&);
MikamiUitOpen 0:2cdd5c91d975 19 // for inhibition of substitute operator
MikamiUitOpen 0:2cdd5c91d975 20 ADC_Intr& operator=(const ADC_Intr&);
MikamiUitOpen 0:2cdd5c91d975 21
MikamiUitOpen 0:2cdd5c91d975 22 public:
MikamiUitOpen 4:03c4518de836 23 ADC_Intr(PinName pin1, int frequency,
MikamiUitOpen 4:03c4518de836 24 PinName pin2 = NC, PinName pin3 = NC)
MikamiUitOpen 4:03c4518de836 25 : ADC_BuiltIn(pin1, frequency, pin2, pin3)
MikamiUitOpen 4:03c4518de836 26 { myAdc_->CR1 |= ADC_CR1_EOCIE; } // Interrupt enable
MikamiUitOpen 0:2cdd5c91d975 27
MikamiUitOpen 0:2cdd5c91d975 28 // Set interrupt vector and enable IRQ of ADC
MikamiUitOpen 0:2cdd5c91d975 29 void SetIntrVec(void (*Func)())
MikamiUitOpen 0:2cdd5c91d975 30 {
MikamiUitOpen 0:2cdd5c91d975 31 NVIC_SetVector(ADC_IRQn, (uint32_t)Func); // See "cmsis_nvic.h"
MikamiUitOpen 0:2cdd5c91d975 32 NVIC_EnableIRQ(ADC_IRQn); // See "core_cm4.h"
MikamiUitOpen 0:2cdd5c91d975 33 }
MikamiUitOpen 0:2cdd5c91d975 34
MikamiUitOpen 0:2cdd5c91d975 35 // Read ADC, range: [0, 0x0FFF]
MikamiUitOpen 0:2cdd5c91d975 36 virtual uint16_t Read_u16()
MikamiUitOpen 0:2cdd5c91d975 37 { return myAdc_->DR; }
MikamiUitOpen 0:2cdd5c91d975 38
MikamiUitOpen 0:2cdd5c91d975 39 // Read ADC, range: [0, 0x0FFF]
MikamiUitOpen 4:03c4518de836 40 virtual uint16_t ReadWait_u16()
MikamiUitOpen 0:2cdd5c91d975 41 {
MikamiUitOpen 0:2cdd5c91d975 42 WaitDone();
MikamiUitOpen 0:2cdd5c91d975 43 return myAdc_->DR;
MikamiUitOpen 0:2cdd5c91d975 44 }
MikamiUitOpen 0:2cdd5c91d975 45
MikamiUitOpen 0:2cdd5c91d975 46 // Read ADC, range: [-1.0f, 1.0f]
MikamiUitOpen 0:2cdd5c91d975 47 virtual float Read()
MikamiUitOpen 0:2cdd5c91d975 48 { return AMP_*((int16_t)myAdc_->DR - 2048); }
MikamiUitOpen 0:2cdd5c91d975 49
MikamiUitOpen 0:2cdd5c91d975 50 // Clear pending IRQ and enable IRQ
MikamiUitOpen 0:2cdd5c91d975 51 void ClearPending_EnableIRQ()
MikamiUitOpen 0:2cdd5c91d975 52 {
MikamiUitOpen 0:2cdd5c91d975 53 NVIC_ClearPendingIRQ(ADC_IRQn);
MikamiUitOpen 0:2cdd5c91d975 54 NVIC_EnableIRQ(ADC_IRQn);
MikamiUitOpen 0:2cdd5c91d975 55 }
MikamiUitOpen 0:2cdd5c91d975 56
MikamiUitOpen 0:2cdd5c91d975 57 // Software start with disable IRQ
MikamiUitOpen 7:14cdca8b48f8 58 void SoftStart()
MikamiUitOpen 0:2cdd5c91d975 59 {
MikamiUitOpen 0:2cdd5c91d975 60 NVIC_DisableIRQ(ADC_IRQn);
MikamiUitOpen 0:2cdd5c91d975 61 myAdc_->CR2 |= ADC_CR2_SWSTART;
MikamiUitOpen 0:2cdd5c91d975 62 }
MikamiUitOpen 0:2cdd5c91d975 63 };
MikamiUitOpen 0:2cdd5c91d975 64 }
MikamiUitOpen 0:2cdd5c91d975 65 #endif // ADC_INTERRUPT_HPP