Fix RZ/A1H target issues
Fork of mbed-src by
Diff: capi/semihost_api.h
- Revision:
- 0:fd0d7bdfcdc2
- Child:
- 2:143cac498751
diff -r 000000000000 -r fd0d7bdfcdc2 capi/semihost_api.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/capi/semihost_api.h Tue Nov 20 17:24:08 2012 +0000 @@ -0,0 +1,102 @@ +/* mbed Microcontroller Library + * Copyright (c) 2006-2012 ARM Limited + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef MBED_SEMIHOST_H +#define MBED_SEMIHOST_H + +#include "device.h" +#include "toolchain.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* __semihost intrinsic + This intrinsic inserts an SVC or BKPT instruction into the instruction stream + generated by the compiler. It enables you to make semihosting calls from C or + C++ that are independent of the target architecture. + */ +#ifndef __CC_ARM +/* Semihost implementation taken from eLua (MIT license): + * git://github.com/elua/elua.git/src/semifs.c + */ + +/* SWI numbers for RDI (Angel) monitors */ +#ifdef __thumb__ +#define AngelSWI 0xAB +#else +#define AngelSWI 0x123456 +#endif +/* For Thumb-2 code use the BKPT instruction instead of SWI */ +#ifdef __thumb2__ +#define AngelSWIInsn "bkpt" +#define AngelSWIAsm bkpt +#else +#define AngelSWIInsn "swi" +#define AngelSWIAsm swi +#endif + +inline int __semihost(int reason, const void *arg) { + int value; + asm volatile ("mov r0, %1; mov r1, %2; " AngelSWIInsn " %a3; mov %0, r0" + : "=r" (value) /* Outputs */ + : "r" (reason), "r" (arg), "i" (AngelSWI) /* Inputs */ + : "r0", "r1", "r2", "r3", "ip", "lr", "memory", "cc" + /* Clobbers r0 and r1, and lr if in supervisor mode */); + /* Accordingly to page 13-77 of ARM DUI 0040D other registers + can also be clobbered. Some memory positions may also be + changed by a system call, so they should not be kept in + registers. Note: we are assuming the manual is right and + Angel is respecting the APCS. */ + + return value; +} + +#endif + +#if DEVICE_LOCALFILESYSTEM +FILEHANDLE semihost_open(const char* name, int openmode); +int semihost_close (FILEHANDLE fh); +int semihost_read (FILEHANDLE fh, unsigned char* buffer, unsigned int length, int mode); +int semihost_write (FILEHANDLE fh, const unsigned char* buffer, unsigned int length, int mode); +int semihost_ensure(FILEHANDLE fh); +long semihost_flen (FILEHANDLE fh); +int semihost_seek (FILEHANDLE fh, long position); +int semihost_istty (FILEHANDLE fh); + +int semihost_remove(const char *name); +int semihost_rename(const char *old_name, const char *new_name); +#endif + +int semihost_uid(char *uid); +int semihost_reset(void); +int semihost_vbus(void); +int semihost_powerdown(void); +int semihost_exit(void); + +int semihost_connected(void); +int semihost_disabledebug(void); + +#ifdef __cplusplus +} +#endif + +#endif