Toyomasa Watarai / mbed-src

Fix RZ/A1H target issues

Fork of mbed-src by mbed official

api/SPISlave.h@10:3bc89ef62ce7, 2013-06-14 (annotated)

Committer:
emilmont
Date:
Fri Jun 14 17:49:17 2013 +0100
Revision:
10:3bc89ef62ce7
Parent:
9:0ce32e54c9a7
Child:
13:0645d8841f51
Unify mbed library sources

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 #ifndef MBED_SPISLAVE_H
emilmont 10:3bc89ef62ce7 17 #define MBED_SPISLAVE_H
emilmont 10:3bc89ef62ce7 18
emilmont 10:3bc89ef62ce7 19 #include "platform.h"
emilmont 10:3bc89ef62ce7 20
emilmont 10:3bc89ef62ce7 21 #if DEVICE_SPISLAVE
emilmont 10:3bc89ef62ce7 22
emilmont 10:3bc89ef62ce7 23 #include "spi_api.h"
emilmont 10:3bc89ef62ce7 24
emilmont 10:3bc89ef62ce7 25 namespace mbed {
emilmont 10:3bc89ef62ce7 26
emilmont 10:3bc89ef62ce7 27 /** A SPI slave, used for communicating with a SPI Master device
emilmont 10:3bc89ef62ce7 28 *
emilmont 10:3bc89ef62ce7 29 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
emilmont 10:3bc89ef62ce7 30 *
emilmont 10:3bc89ef62ce7 31 * Example:
emilmont 10:3bc89ef62ce7 32 * @code
emilmont 10:3bc89ef62ce7 33 * // Reply to a SPI master as slave
emilmont 10:3bc89ef62ce7 34 *
emilmont 10:3bc89ef62ce7 35 * #include "mbed.h"
emilmont 10:3bc89ef62ce7 36 *
emilmont 10:3bc89ef62ce7 37 * SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
emilmont 10:3bc89ef62ce7 38 *
emilmont 10:3bc89ef62ce7 39 * int main() {
emilmont 10:3bc89ef62ce7 40 * device.reply(0x00); // Prime SPI with first reply
emilmont 10:3bc89ef62ce7 41 * while(1) {
emilmont 10:3bc89ef62ce7 42 * if(device.receive()) {
emilmont 10:3bc89ef62ce7 43 * int v = device.read(); // Read byte from master
emilmont 10:3bc89ef62ce7 44 * v = (v + 1) % 0x100; // Add one to it, modulo 256
emilmont 10:3bc89ef62ce7 45 * device.reply(v); // Make this the next reply
emilmont 10:3bc89ef62ce7 46 * }
emilmont 10:3bc89ef62ce7 47 * }
emilmont 10:3bc89ef62ce7 48 * }
emilmont 10:3bc89ef62ce7 49 * @endcode
emilmont 10:3bc89ef62ce7 50 */
emilmont 10:3bc89ef62ce7 51 class SPISlave {
emilmont 10:3bc89ef62ce7 52
emilmont 10:3bc89ef62ce7 53 public:
emilmont 10:3bc89ef62ce7 54
emilmont 10:3bc89ef62ce7 55 /** Create a SPI slave connected to the specified pins
emilmont 10:3bc89ef62ce7 56 *
emilmont 10:3bc89ef62ce7 57 * Pin Options:
emilmont 10:3bc89ef62ce7 58 * (5, 6, 7i, 8) or (11, 12, 13, 14)
emilmont 10:3bc89ef62ce7 59 *
emilmont 10:3bc89ef62ce7 60 * mosi or miso can be specfied as NC if not used
emilmont 10:3bc89ef62ce7 61 *
emilmont 10:3bc89ef62ce7 62 * @param mosi SPI Master Out, Slave In pin
emilmont 10:3bc89ef62ce7 63 * @param miso SPI Master In, Slave Out pin
emilmont 10:3bc89ef62ce7 64 * @param sclk SPI Clock pin
emilmont 10:3bc89ef62ce7 65 * @param ssel SPI chip select pin
emilmont 10:3bc89ef62ce7 66 * @param name (optional) A string to identify the object
emilmont 10:3bc89ef62ce7 67 */
emilmont 10:3bc89ef62ce7 68 SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel);
emilmont 10:3bc89ef62ce7 69
emilmont 10:3bc89ef62ce7 70 /** Configure the data transmission format
emilmont 10:3bc89ef62ce7 71 *
emilmont 10:3bc89ef62ce7 72 * @param bits Number of bits per SPI frame (4 - 16)
emilmont 10:3bc89ef62ce7 73 * @param mode Clock polarity and phase mode (0 - 3)
emilmont 10:3bc89ef62ce7 74 *
emilmont 10:3bc89ef62ce7 75 * @code
emilmont 10:3bc89ef62ce7 76 * mode | POL PHA
emilmont 10:3bc89ef62ce7 77 * -----+--------
emilmont 10:3bc89ef62ce7 78 * 0 | 0 0
emilmont 10:3bc89ef62ce7 79 * 1 | 0 1
emilmont 10:3bc89ef62ce7 80 * 2 | 1 0
emilmont 10:3bc89ef62ce7 81 * 3 | 1 1
emilmont 10:3bc89ef62ce7 82 * @endcode
emilmont 10:3bc89ef62ce7 83 */
emilmont 10:3bc89ef62ce7 84 void format(int bits, int mode = 0);
emilmont 10:3bc89ef62ce7 85
emilmont 10:3bc89ef62ce7 86 /** Set the spi bus clock frequency
emilmont 10:3bc89ef62ce7 87 *
emilmont 10:3bc89ef62ce7 88 * @param hz SCLK frequency in hz (default = 1MHz)
emilmont 10:3bc89ef62ce7 89 */
emilmont 10:3bc89ef62ce7 90 void frequency(int hz = 1000000);
emilmont 10:3bc89ef62ce7 91
emilmont 10:3bc89ef62ce7 92 /** Polls the SPI to see if data has been received
emilmont 10:3bc89ef62ce7 93 *
emilmont 10:3bc89ef62ce7 94 * @returns
emilmont 10:3bc89ef62ce7 95 * 0 if no data,
emilmont 10:3bc89ef62ce7 96 * 1 otherwise
emilmont 10:3bc89ef62ce7 97 */
emilmont 10:3bc89ef62ce7 98 int receive(void);
emilmont 10:3bc89ef62ce7 99
emilmont 10:3bc89ef62ce7 100 /** Retrieve data from receive buffer as slave
emilmont 10:3bc89ef62ce7 101 *
emilmont 10:3bc89ef62ce7 102 * @returns
emilmont 10:3bc89ef62ce7 103 * the data in the receive buffer
emilmont 10:3bc89ef62ce7 104 */
emilmont 10:3bc89ef62ce7 105 int read(void);
emilmont 10:3bc89ef62ce7 106
emilmont 10:3bc89ef62ce7 107 /** Fill the transmission buffer with the value to be written out
emilmont 10:3bc89ef62ce7 108 * as slave on the next received message from the master.
emilmont 10:3bc89ef62ce7 109 *
emilmont 10:3bc89ef62ce7 110 * @param value the data to be transmitted next
emilmont 10:3bc89ef62ce7 111 */
emilmont 10:3bc89ef62ce7 112 void reply(int value);
emilmont 10:3bc89ef62ce7 113
emilmont 10:3bc89ef62ce7 114 protected:
emilmont 10:3bc89ef62ce7 115 spi_t _spi;
emilmont 10:3bc89ef62ce7 116
emilmont 10:3bc89ef62ce7 117 int _bits;
emilmont 10:3bc89ef62ce7 118 int _mode;
emilmont 10:3bc89ef62ce7 119 int _hz;
emilmont 10:3bc89ef62ce7 120 };
emilmont 10:3bc89ef62ce7 121
emilmont 10:3bc89ef62ce7 122 } // namespace mbed
emilmont 10:3bc89ef62ce7 123
emilmont 10:3bc89ef62ce7 124 #endif
emilmont 10:3bc89ef62ce7 125
emilmont 10:3bc89ef62ce7 126 #endif