Toyomasa Watarai / Mbed OS armcc_info

Describes predefine macros for mbed online compiler (armcc)

mbed/hal/spi_api.h@6:40e873bbc5f7, 2017-03-16 (annotated)

Committer:
MACRUM
Date:
Thu Mar 16 21:58:09 2017 +0900
Revision:
6:40e873bbc5f7
Add licence header info

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MACRUM 6:40e873bbc5f7 1
MACRUM 6:40e873bbc5f7 2 /** \addtogroup hal */
MACRUM 6:40e873bbc5f7 3 /** @{*/
MACRUM 6:40e873bbc5f7 4 /* mbed Microcontroller Library
MACRUM 6:40e873bbc5f7 5 * Copyright (c) 2006-2013 ARM Limited
MACRUM 6:40e873bbc5f7 6 *
MACRUM 6:40e873bbc5f7 7 * Licensed under the Apache License, Version 2.0 (the "License");
MACRUM 6:40e873bbc5f7 8 * you may not use this file except in compliance with the License.
MACRUM 6:40e873bbc5f7 9 * You may obtain a copy of the License at
MACRUM 6:40e873bbc5f7 10 *
MACRUM 6:40e873bbc5f7 11 * http://www.apache.org/licenses/LICENSE-2.0
MACRUM 6:40e873bbc5f7 12 *
MACRUM 6:40e873bbc5f7 13 * Unless required by applicable law or agreed to in writing, software
MACRUM 6:40e873bbc5f7 14 * distributed under the License is distributed on an "AS IS" BASIS,
MACRUM 6:40e873bbc5f7 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MACRUM 6:40e873bbc5f7 16 * See the License for the specific language governing permissions and
MACRUM 6:40e873bbc5f7 17 * limitations under the License.
MACRUM 6:40e873bbc5f7 18 */
MACRUM 6:40e873bbc5f7 19 #ifndef MBED_SPI_API_H
MACRUM 6:40e873bbc5f7 20 #define MBED_SPI_API_H
MACRUM 6:40e873bbc5f7 21
MACRUM 6:40e873bbc5f7 22 #include "device.h"
MACRUM 6:40e873bbc5f7 23 #include "hal/dma_api.h"
MACRUM 6:40e873bbc5f7 24 #include "hal/buffer.h"
MACRUM 6:40e873bbc5f7 25
MACRUM 6:40e873bbc5f7 26 #if DEVICE_SPI
MACRUM 6:40e873bbc5f7 27
MACRUM 6:40e873bbc5f7 28 #define SPI_EVENT_ERROR (1 << 1)
MACRUM 6:40e873bbc5f7 29 #define SPI_EVENT_COMPLETE (1 << 2)
MACRUM 6:40e873bbc5f7 30 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
MACRUM 6:40e873bbc5f7 31 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
MACRUM 6:40e873bbc5f7 32
MACRUM 6:40e873bbc5f7 33 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
MACRUM 6:40e873bbc5f7 34
MACRUM 6:40e873bbc5f7 35 #define SPI_FILL_WORD (0xFFFF)
MACRUM 6:40e873bbc5f7 36
MACRUM 6:40e873bbc5f7 37 #if DEVICE_SPI_ASYNCH
MACRUM 6:40e873bbc5f7 38 /** Asynch SPI HAL structure
MACRUM 6:40e873bbc5f7 39 */
MACRUM 6:40e873bbc5f7 40 typedef struct {
MACRUM 6:40e873bbc5f7 41 struct spi_s spi; /**< Target specific SPI structure */
MACRUM 6:40e873bbc5f7 42 struct buffer_s tx_buff; /**< Tx buffer */
MACRUM 6:40e873bbc5f7 43 struct buffer_s rx_buff; /**< Rx buffer */
MACRUM 6:40e873bbc5f7 44 } spi_t;
MACRUM 6:40e873bbc5f7 45
MACRUM 6:40e873bbc5f7 46 #else
MACRUM 6:40e873bbc5f7 47 /** Non-asynch SPI HAL structure
MACRUM 6:40e873bbc5f7 48 */
MACRUM 6:40e873bbc5f7 49 typedef struct spi_s spi_t;
MACRUM 6:40e873bbc5f7 50
MACRUM 6:40e873bbc5f7 51 #endif
MACRUM 6:40e873bbc5f7 52
MACRUM 6:40e873bbc5f7 53 #ifdef __cplusplus
MACRUM 6:40e873bbc5f7 54 extern "C" {
MACRUM 6:40e873bbc5f7 55 #endif
MACRUM 6:40e873bbc5f7 56
MACRUM 6:40e873bbc5f7 57 /**
MACRUM 6:40e873bbc5f7 58 * \defgroup hal_GeneralSPI SPI Configuration Functions
MACRUM 6:40e873bbc5f7 59 * @{
MACRUM 6:40e873bbc5f7 60 */
MACRUM 6:40e873bbc5f7 61
MACRUM 6:40e873bbc5f7 62 /** Initialize the SPI peripheral
MACRUM 6:40e873bbc5f7 63 *
MACRUM 6:40e873bbc5f7 64 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
MACRUM 6:40e873bbc5f7 65 * @param[out] obj The SPI object to initialize
MACRUM 6:40e873bbc5f7 66 * @param[in] mosi The pin to use for MOSI
MACRUM 6:40e873bbc5f7 67 * @param[in] miso The pin to use for MISO
MACRUM 6:40e873bbc5f7 68 * @param[in] sclk The pin to use for SCLK
MACRUM 6:40e873bbc5f7 69 * @param[in] ssel The pin to use for SSEL
MACRUM 6:40e873bbc5f7 70 */
MACRUM 6:40e873bbc5f7 71 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
MACRUM 6:40e873bbc5f7 72
MACRUM 6:40e873bbc5f7 73 /** Release a SPI object
MACRUM 6:40e873bbc5f7 74 *
MACRUM 6:40e873bbc5f7 75 * TODO: spi_free is currently unimplemented
MACRUM 6:40e873bbc5f7 76 * This will require reference counting at the C++ level to be safe
MACRUM 6:40e873bbc5f7 77 *
MACRUM 6:40e873bbc5f7 78 * Return the pins owned by the SPI object to their reset state
MACRUM 6:40e873bbc5f7 79 * Disable the SPI peripheral
MACRUM 6:40e873bbc5f7 80 * Disable the SPI clock
MACRUM 6:40e873bbc5f7 81 * @param[in] obj The SPI object to deinitialize
MACRUM 6:40e873bbc5f7 82 */
MACRUM 6:40e873bbc5f7 83 void spi_free(spi_t *obj);
MACRUM 6:40e873bbc5f7 84
MACRUM 6:40e873bbc5f7 85 /** Configure the SPI format
MACRUM 6:40e873bbc5f7 86 *
MACRUM 6:40e873bbc5f7 87 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
MACRUM 6:40e873bbc5f7 88 * The default bit order is MSB.
MACRUM 6:40e873bbc5f7 89 * @param[in,out] obj The SPI object to configure
MACRUM 6:40e873bbc5f7 90 * @param[in] bits The number of bits per frame
MACRUM 6:40e873bbc5f7 91 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
MACRUM 6:40e873bbc5f7 92 * @param[in] slave Zero for master mode or non-zero for slave mode
MACRUM 6:40e873bbc5f7 93 */
MACRUM 6:40e873bbc5f7 94 void spi_format(spi_t *obj, int bits, int mode, int slave);
MACRUM 6:40e873bbc5f7 95
MACRUM 6:40e873bbc5f7 96 /** Set the SPI baud rate
MACRUM 6:40e873bbc5f7 97 *
MACRUM 6:40e873bbc5f7 98 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
MACRUM 6:40e873bbc5f7 99 * Configures the SPI peripheral's baud rate
MACRUM 6:40e873bbc5f7 100 * @param[in,out] obj The SPI object to configure
MACRUM 6:40e873bbc5f7 101 * @param[in] hz The baud rate in Hz
MACRUM 6:40e873bbc5f7 102 */
MACRUM 6:40e873bbc5f7 103 void spi_frequency(spi_t *obj, int hz);
MACRUM 6:40e873bbc5f7 104
MACRUM 6:40e873bbc5f7 105 /**@}*/
MACRUM 6:40e873bbc5f7 106 /**
MACRUM 6:40e873bbc5f7 107 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
MACRUM 6:40e873bbc5f7 108 * @{
MACRUM 6:40e873bbc5f7 109 */
MACRUM 6:40e873bbc5f7 110
MACRUM 6:40e873bbc5f7 111 /** Write a byte out in master mode and receive a value
MACRUM 6:40e873bbc5f7 112 *
MACRUM 6:40e873bbc5f7 113 * @param[in] obj The SPI peripheral to use for sending
MACRUM 6:40e873bbc5f7 114 * @param[in] value The value to send
MACRUM 6:40e873bbc5f7 115 * @return Returns the value received during send
MACRUM 6:40e873bbc5f7 116 */
MACRUM 6:40e873bbc5f7 117 int spi_master_write(spi_t *obj, int value);
MACRUM 6:40e873bbc5f7 118
MACRUM 6:40e873bbc5f7 119 /** Check if a value is available to read
MACRUM 6:40e873bbc5f7 120 *
MACRUM 6:40e873bbc5f7 121 * @param[in] obj The SPI peripheral to check
MACRUM 6:40e873bbc5f7 122 * @return non-zero if a value is available
MACRUM 6:40e873bbc5f7 123 */
MACRUM 6:40e873bbc5f7 124 int spi_slave_receive(spi_t *obj);
MACRUM 6:40e873bbc5f7 125
MACRUM 6:40e873bbc5f7 126 /** Get a received value out of the SPI receive buffer in slave mode
MACRUM 6:40e873bbc5f7 127 *
MACRUM 6:40e873bbc5f7 128 * Blocks until a value is available
MACRUM 6:40e873bbc5f7 129 * @param[in] obj The SPI peripheral to read
MACRUM 6:40e873bbc5f7 130 * @return The value received
MACRUM 6:40e873bbc5f7 131 */
MACRUM 6:40e873bbc5f7 132 int spi_slave_read(spi_t *obj);
MACRUM 6:40e873bbc5f7 133
MACRUM 6:40e873bbc5f7 134 /** Write a value to the SPI peripheral in slave mode
MACRUM 6:40e873bbc5f7 135 *
MACRUM 6:40e873bbc5f7 136 * Blocks until the SPI peripheral can be written to
MACRUM 6:40e873bbc5f7 137 * @param[in] obj The SPI peripheral to write
MACRUM 6:40e873bbc5f7 138 * @param[in] value The value to write
MACRUM 6:40e873bbc5f7 139 */
MACRUM 6:40e873bbc5f7 140 void spi_slave_write(spi_t *obj, int value);
MACRUM 6:40e873bbc5f7 141
MACRUM 6:40e873bbc5f7 142 /** Checks if the specified SPI peripheral is in use
MACRUM 6:40e873bbc5f7 143 *
MACRUM 6:40e873bbc5f7 144 * @param[in] obj The SPI peripheral to check
MACRUM 6:40e873bbc5f7 145 * @return non-zero if the peripheral is currently transmitting
MACRUM 6:40e873bbc5f7 146 */
MACRUM 6:40e873bbc5f7 147 int spi_busy(spi_t *obj);
MACRUM 6:40e873bbc5f7 148
MACRUM 6:40e873bbc5f7 149 /** Get the module number
MACRUM 6:40e873bbc5f7 150 *
MACRUM 6:40e873bbc5f7 151 * @param[in] obj The SPI peripheral to check
MACRUM 6:40e873bbc5f7 152 * @return The module number
MACRUM 6:40e873bbc5f7 153 */
MACRUM 6:40e873bbc5f7 154 uint8_t spi_get_module(spi_t *obj);
MACRUM 6:40e873bbc5f7 155
MACRUM 6:40e873bbc5f7 156 /**@}*/
MACRUM 6:40e873bbc5f7 157
MACRUM 6:40e873bbc5f7 158 #if DEVICE_SPI_ASYNCH
MACRUM 6:40e873bbc5f7 159 /**
MACRUM 6:40e873bbc5f7 160 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
MACRUM 6:40e873bbc5f7 161 * @{
MACRUM 6:40e873bbc5f7 162 */
MACRUM 6:40e873bbc5f7 163
MACRUM 6:40e873bbc5f7 164 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
MACRUM 6:40e873bbc5f7 165 *
MACRUM 6:40e873bbc5f7 166 * @param[in] obj The SPI object that holds the transfer information
MACRUM 6:40e873bbc5f7 167 * @param[in] tx The transmit buffer
MACRUM 6:40e873bbc5f7 168 * @param[in] tx_length The number of bytes to transmit
MACRUM 6:40e873bbc5f7 169 * @param[in] rx The receive buffer
MACRUM 6:40e873bbc5f7 170 * @param[in] rx_length The number of bytes to receive
MACRUM 6:40e873bbc5f7 171 * @param[in] bit_width The bit width of buffer words
MACRUM 6:40e873bbc5f7 172 * @param[in] event The logical OR of events to be registered
MACRUM 6:40e873bbc5f7 173 * @param[in] handler SPI interrupt handler
MACRUM 6:40e873bbc5f7 174 * @param[in] hint A suggestion for how to use DMA with this transfer
MACRUM 6:40e873bbc5f7 175 */
MACRUM 6:40e873bbc5f7 176 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
MACRUM 6:40e873bbc5f7 177
MACRUM 6:40e873bbc5f7 178 /** The asynchronous IRQ handler
MACRUM 6:40e873bbc5f7 179 *
MACRUM 6:40e873bbc5f7 180 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
MACRUM 6:40e873bbc5f7 181 * conditions, such as buffer overflows or transfer complete.
MACRUM 6:40e873bbc5f7 182 * @param[in] obj The SPI object that holds the transfer information
MACRUM 6:40e873bbc5f7 183 * @return Event flags if a transfer termination condition was met; otherwise 0.
MACRUM 6:40e873bbc5f7 184 */
MACRUM 6:40e873bbc5f7 185 uint32_t spi_irq_handler_asynch(spi_t *obj);
MACRUM 6:40e873bbc5f7 186
MACRUM 6:40e873bbc5f7 187 /** Attempts to determine if the SPI peripheral is already in use
MACRUM 6:40e873bbc5f7 188 *
MACRUM 6:40e873bbc5f7 189 * If a temporary DMA channel has been allocated, peripheral is in use.
MACRUM 6:40e873bbc5f7 190 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
MACRUM 6:40e873bbc5f7 191 * channel were allocated.
MACRUM 6:40e873bbc5f7 192 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
MACRUM 6:40e873bbc5f7 193 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
MACRUM 6:40e873bbc5f7 194 * there are any bytes in the FIFOs.
MACRUM 6:40e873bbc5f7 195 * @param[in] obj The SPI object to check for activity
MACRUM 6:40e873bbc5f7 196 * @return Non-zero if the SPI port is active or zero if it is not.
MACRUM 6:40e873bbc5f7 197 */
MACRUM 6:40e873bbc5f7 198 uint8_t spi_active(spi_t *obj);
MACRUM 6:40e873bbc5f7 199
MACRUM 6:40e873bbc5f7 200 /** Abort an SPI transfer
MACRUM 6:40e873bbc5f7 201 *
MACRUM 6:40e873bbc5f7 202 * @param obj The SPI peripheral to stop
MACRUM 6:40e873bbc5f7 203 */
MACRUM 6:40e873bbc5f7 204 void spi_abort_asynch(spi_t *obj);
MACRUM 6:40e873bbc5f7 205
MACRUM 6:40e873bbc5f7 206
MACRUM 6:40e873bbc5f7 207 #endif
MACRUM 6:40e873bbc5f7 208
MACRUM 6:40e873bbc5f7 209 /**@}*/
MACRUM 6:40e873bbc5f7 210
MACRUM 6:40e873bbc5f7 211 #ifdef __cplusplus
MACRUM 6:40e873bbc5f7 212 }
MACRUM 6:40e873bbc5f7 213 #endif // __cplusplus
MACRUM 6:40e873bbc5f7 214
MACRUM 6:40e873bbc5f7 215 #endif // SPI_DEVICE
MACRUM 6:40e873bbc5f7 216
MACRUM 6:40e873bbc5f7 217 #endif // MBED_SPI_API_H
MACRUM 6:40e873bbc5f7 218
MACRUM 6:40e873bbc5f7 219 /** @}*/