Toyomasa Watarai / Mbed OS armcc_info

Describes predefine macros for mbed online compiler (armcc)

mbed/TARGET_LPC1114/core_cmInstr.h@6:40e873bbc5f7, 2017-03-16 (annotated)

Committer:
MACRUM
Date:
Thu Mar 16 21:58:09 2017 +0900
Revision:
6:40e873bbc5f7
Add licence header info

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MACRUM 6:40e873bbc5f7 1 /**************************************************************************//**
MACRUM 6:40e873bbc5f7 2 * @file core_cmInstr.h
MACRUM 6:40e873bbc5f7 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
MACRUM 6:40e873bbc5f7 4 * @version V4.10
MACRUM 6:40e873bbc5f7 5 * @date 18. March 2015
MACRUM 6:40e873bbc5f7 6 *
MACRUM 6:40e873bbc5f7 7 * @note
MACRUM 6:40e873bbc5f7 8 *
MACRUM 6:40e873bbc5f7 9 ******************************************************************************/
MACRUM 6:40e873bbc5f7 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
MACRUM 6:40e873bbc5f7 11
MACRUM 6:40e873bbc5f7 12 All rights reserved.
MACRUM 6:40e873bbc5f7 13 Redistribution and use in source and binary forms, with or without
MACRUM 6:40e873bbc5f7 14 modification, are permitted provided that the following conditions are met:
MACRUM 6:40e873bbc5f7 15 - Redistributions of source code must retain the above copyright
MACRUM 6:40e873bbc5f7 16 notice, this list of conditions and the following disclaimer.
MACRUM 6:40e873bbc5f7 17 - Redistributions in binary form must reproduce the above copyright
MACRUM 6:40e873bbc5f7 18 notice, this list of conditions and the following disclaimer in the
MACRUM 6:40e873bbc5f7 19 documentation and/or other materials provided with the distribution.
MACRUM 6:40e873bbc5f7 20 - Neither the name of ARM nor the names of its contributors may be used
MACRUM 6:40e873bbc5f7 21 to endorse or promote products derived from this software without
MACRUM 6:40e873bbc5f7 22 specific prior written permission.
MACRUM 6:40e873bbc5f7 23 *
MACRUM 6:40e873bbc5f7 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
MACRUM 6:40e873bbc5f7 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
MACRUM 6:40e873bbc5f7 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
MACRUM 6:40e873bbc5f7 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
MACRUM 6:40e873bbc5f7 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
MACRUM 6:40e873bbc5f7 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
MACRUM 6:40e873bbc5f7 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
MACRUM 6:40e873bbc5f7 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
MACRUM 6:40e873bbc5f7 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
MACRUM 6:40e873bbc5f7 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
MACRUM 6:40e873bbc5f7 34 POSSIBILITY OF SUCH DAMAGE.
MACRUM 6:40e873bbc5f7 35 ---------------------------------------------------------------------------*/
MACRUM 6:40e873bbc5f7 36
MACRUM 6:40e873bbc5f7 37
MACRUM 6:40e873bbc5f7 38 #ifndef __CORE_CMINSTR_H
MACRUM 6:40e873bbc5f7 39 #define __CORE_CMINSTR_H
MACRUM 6:40e873bbc5f7 40
MACRUM 6:40e873bbc5f7 41
MACRUM 6:40e873bbc5f7 42 /* ########################## Core Instruction Access ######################### */
MACRUM 6:40e873bbc5f7 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
MACRUM 6:40e873bbc5f7 44 Access to dedicated instructions
MACRUM 6:40e873bbc5f7 45 @{
MACRUM 6:40e873bbc5f7 46 */
MACRUM 6:40e873bbc5f7 47
MACRUM 6:40e873bbc5f7 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
MACRUM 6:40e873bbc5f7 49 /* ARM armcc specific functions */
MACRUM 6:40e873bbc5f7 50
MACRUM 6:40e873bbc5f7 51 #if (__ARMCC_VERSION < 400677)
MACRUM 6:40e873bbc5f7 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
MACRUM 6:40e873bbc5f7 53 #endif
MACRUM 6:40e873bbc5f7 54
MACRUM 6:40e873bbc5f7 55
MACRUM 6:40e873bbc5f7 56 /** \brief No Operation
MACRUM 6:40e873bbc5f7 57
MACRUM 6:40e873bbc5f7 58 No Operation does nothing. This instruction can be used for code alignment purposes.
MACRUM 6:40e873bbc5f7 59 */
MACRUM 6:40e873bbc5f7 60 #define __NOP __nop
MACRUM 6:40e873bbc5f7 61
MACRUM 6:40e873bbc5f7 62
MACRUM 6:40e873bbc5f7 63 /** \brief Wait For Interrupt
MACRUM 6:40e873bbc5f7 64
MACRUM 6:40e873bbc5f7 65 Wait For Interrupt is a hint instruction that suspends execution
MACRUM 6:40e873bbc5f7 66 until one of a number of events occurs.
MACRUM 6:40e873bbc5f7 67 */
MACRUM 6:40e873bbc5f7 68 #define __WFI __wfi
MACRUM 6:40e873bbc5f7 69
MACRUM 6:40e873bbc5f7 70
MACRUM 6:40e873bbc5f7 71 /** \brief Wait For Event
MACRUM 6:40e873bbc5f7 72
MACRUM 6:40e873bbc5f7 73 Wait For Event is a hint instruction that permits the processor to enter
MACRUM 6:40e873bbc5f7 74 a low-power state until one of a number of events occurs.
MACRUM 6:40e873bbc5f7 75 */
MACRUM 6:40e873bbc5f7 76 #define __WFE __wfe
MACRUM 6:40e873bbc5f7 77
MACRUM 6:40e873bbc5f7 78
MACRUM 6:40e873bbc5f7 79 /** \brief Send Event
MACRUM 6:40e873bbc5f7 80
MACRUM 6:40e873bbc5f7 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
MACRUM 6:40e873bbc5f7 82 */
MACRUM 6:40e873bbc5f7 83 #define __SEV __sev
MACRUM 6:40e873bbc5f7 84
MACRUM 6:40e873bbc5f7 85
MACRUM 6:40e873bbc5f7 86 /** \brief Instruction Synchronization Barrier
MACRUM 6:40e873bbc5f7 87
MACRUM 6:40e873bbc5f7 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
MACRUM 6:40e873bbc5f7 89 so that all instructions following the ISB are fetched from cache or
MACRUM 6:40e873bbc5f7 90 memory, after the instruction has been completed.
MACRUM 6:40e873bbc5f7 91 */
MACRUM 6:40e873bbc5f7 92 #define __ISB() do {\
MACRUM 6:40e873bbc5f7 93 __schedule_barrier();\
MACRUM 6:40e873bbc5f7 94 __isb(0xF);\
MACRUM 6:40e873bbc5f7 95 __schedule_barrier();\
MACRUM 6:40e873bbc5f7 96 } while (0)
MACRUM 6:40e873bbc5f7 97
MACRUM 6:40e873bbc5f7 98 /** \brief Data Synchronization Barrier
MACRUM 6:40e873bbc5f7 99
MACRUM 6:40e873bbc5f7 100 This function acts as a special kind of Data Memory Barrier.
MACRUM 6:40e873bbc5f7 101 It completes when all explicit memory accesses before this instruction complete.
MACRUM 6:40e873bbc5f7 102 */
MACRUM 6:40e873bbc5f7 103 #define __DSB() do {\
MACRUM 6:40e873bbc5f7 104 __schedule_barrier();\
MACRUM 6:40e873bbc5f7 105 __dsb(0xF);\
MACRUM 6:40e873bbc5f7 106 __schedule_barrier();\
MACRUM 6:40e873bbc5f7 107 } while (0)
MACRUM 6:40e873bbc5f7 108
MACRUM 6:40e873bbc5f7 109 /** \brief Data Memory Barrier
MACRUM 6:40e873bbc5f7 110
MACRUM 6:40e873bbc5f7 111 This function ensures the apparent order of the explicit memory operations before
MACRUM 6:40e873bbc5f7 112 and after the instruction, without ensuring their completion.
MACRUM 6:40e873bbc5f7 113 */
MACRUM 6:40e873bbc5f7 114 #define __DMB() do {\
MACRUM 6:40e873bbc5f7 115 __schedule_barrier();\
MACRUM 6:40e873bbc5f7 116 __dmb(0xF);\
MACRUM 6:40e873bbc5f7 117 __schedule_barrier();\
MACRUM 6:40e873bbc5f7 118 } while (0)
MACRUM 6:40e873bbc5f7 119
MACRUM 6:40e873bbc5f7 120 /** \brief Reverse byte order (32 bit)
MACRUM 6:40e873bbc5f7 121
MACRUM 6:40e873bbc5f7 122 This function reverses the byte order in integer value.
MACRUM 6:40e873bbc5f7 123
MACRUM 6:40e873bbc5f7 124 \param [in] value Value to reverse
MACRUM 6:40e873bbc5f7 125 \return Reversed value
MACRUM 6:40e873bbc5f7 126 */
MACRUM 6:40e873bbc5f7 127 #define __REV __rev
MACRUM 6:40e873bbc5f7 128
MACRUM 6:40e873bbc5f7 129
MACRUM 6:40e873bbc5f7 130 /** \brief Reverse byte order (16 bit)
MACRUM 6:40e873bbc5f7 131
MACRUM 6:40e873bbc5f7 132 This function reverses the byte order in two unsigned short values.
MACRUM 6:40e873bbc5f7 133
MACRUM 6:40e873bbc5f7 134 \param [in] value Value to reverse
MACRUM 6:40e873bbc5f7 135 \return Reversed value
MACRUM 6:40e873bbc5f7 136 */
MACRUM 6:40e873bbc5f7 137 #ifndef __NO_EMBEDDED_ASM
MACRUM 6:40e873bbc5f7 138 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
MACRUM 6:40e873bbc5f7 139 {
MACRUM 6:40e873bbc5f7 140 rev16 r0, r0
MACRUM 6:40e873bbc5f7 141 bx lr
MACRUM 6:40e873bbc5f7 142 }
MACRUM 6:40e873bbc5f7 143 #endif
MACRUM 6:40e873bbc5f7 144
MACRUM 6:40e873bbc5f7 145 /** \brief Reverse byte order in signed short value
MACRUM 6:40e873bbc5f7 146
MACRUM 6:40e873bbc5f7 147 This function reverses the byte order in a signed short value with sign extension to integer.
MACRUM 6:40e873bbc5f7 148
MACRUM 6:40e873bbc5f7 149 \param [in] value Value to reverse
MACRUM 6:40e873bbc5f7 150 \return Reversed value
MACRUM 6:40e873bbc5f7 151 */
MACRUM 6:40e873bbc5f7 152 #ifndef __NO_EMBEDDED_ASM
MACRUM 6:40e873bbc5f7 153 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
MACRUM 6:40e873bbc5f7 154 {
MACRUM 6:40e873bbc5f7 155 revsh r0, r0
MACRUM 6:40e873bbc5f7 156 bx lr
MACRUM 6:40e873bbc5f7 157 }
MACRUM 6:40e873bbc5f7 158 #endif
MACRUM 6:40e873bbc5f7 159
MACRUM 6:40e873bbc5f7 160
MACRUM 6:40e873bbc5f7 161 /** \brief Rotate Right in unsigned value (32 bit)
MACRUM 6:40e873bbc5f7 162
MACRUM 6:40e873bbc5f7 163 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
MACRUM 6:40e873bbc5f7 164
MACRUM 6:40e873bbc5f7 165 \param [in] value Value to rotate
MACRUM 6:40e873bbc5f7 166 \param [in] value Number of Bits to rotate
MACRUM 6:40e873bbc5f7 167 \return Rotated value
MACRUM 6:40e873bbc5f7 168 */
MACRUM 6:40e873bbc5f7 169 #define __ROR __ror
MACRUM 6:40e873bbc5f7 170
MACRUM 6:40e873bbc5f7 171
MACRUM 6:40e873bbc5f7 172 /** \brief Breakpoint
MACRUM 6:40e873bbc5f7 173
MACRUM 6:40e873bbc5f7 174 This function causes the processor to enter Debug state.
MACRUM 6:40e873bbc5f7 175 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
MACRUM 6:40e873bbc5f7 176
MACRUM 6:40e873bbc5f7 177 \param [in] value is ignored by the processor.
MACRUM 6:40e873bbc5f7 178 If required, a debugger can use it to store additional information about the breakpoint.
MACRUM 6:40e873bbc5f7 179 */
MACRUM 6:40e873bbc5f7 180 #define __BKPT(value) __breakpoint(value)
MACRUM 6:40e873bbc5f7 181
MACRUM 6:40e873bbc5f7 182
MACRUM 6:40e873bbc5f7 183 /** \brief Reverse bit order of value
MACRUM 6:40e873bbc5f7 184
MACRUM 6:40e873bbc5f7 185 This function reverses the bit order of the given value.
MACRUM 6:40e873bbc5f7 186
MACRUM 6:40e873bbc5f7 187 \param [in] value Value to reverse
MACRUM 6:40e873bbc5f7 188 \return Reversed value
MACRUM 6:40e873bbc5f7 189 */
MACRUM 6:40e873bbc5f7 190 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
MACRUM 6:40e873bbc5f7 191 #define __RBIT __rbit
MACRUM 6:40e873bbc5f7 192 #else
MACRUM 6:40e873bbc5f7 193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
MACRUM 6:40e873bbc5f7 194 {
MACRUM 6:40e873bbc5f7 195 uint32_t result;
MACRUM 6:40e873bbc5f7 196 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
MACRUM 6:40e873bbc5f7 197
MACRUM 6:40e873bbc5f7 198 result = value; // r will be reversed bits of v; first get LSB of v
MACRUM 6:40e873bbc5f7 199 for (value >>= 1; value; value >>= 1)
MACRUM 6:40e873bbc5f7 200 {
MACRUM 6:40e873bbc5f7 201 result <<= 1;
MACRUM 6:40e873bbc5f7 202 result |= value & 1;
MACRUM 6:40e873bbc5f7 203 s--;
MACRUM 6:40e873bbc5f7 204 }
MACRUM 6:40e873bbc5f7 205 result <<= s; // shift when v's highest bits are zero
MACRUM 6:40e873bbc5f7 206 return(result);
MACRUM 6:40e873bbc5f7 207 }
MACRUM 6:40e873bbc5f7 208 #endif
MACRUM 6:40e873bbc5f7 209
MACRUM 6:40e873bbc5f7 210
MACRUM 6:40e873bbc5f7 211 /** \brief Count leading zeros
MACRUM 6:40e873bbc5f7 212
MACRUM 6:40e873bbc5f7 213 This function counts the number of leading zeros of a data value.
MACRUM 6:40e873bbc5f7 214
MACRUM 6:40e873bbc5f7 215 \param [in] value Value to count the leading zeros
MACRUM 6:40e873bbc5f7 216 \return number of leading zeros in value
MACRUM 6:40e873bbc5f7 217 */
MACRUM 6:40e873bbc5f7 218 #define __CLZ __clz
MACRUM 6:40e873bbc5f7 219
MACRUM 6:40e873bbc5f7 220
MACRUM 6:40e873bbc5f7 221 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
MACRUM 6:40e873bbc5f7 222
MACRUM 6:40e873bbc5f7 223 /** \brief LDR Exclusive (8 bit)
MACRUM 6:40e873bbc5f7 224
MACRUM 6:40e873bbc5f7 225 This function executes a exclusive LDR instruction for 8 bit value.
MACRUM 6:40e873bbc5f7 226
MACRUM 6:40e873bbc5f7 227 \param [in] ptr Pointer to data
MACRUM 6:40e873bbc5f7 228 \return value of type uint8_t at (*ptr)
MACRUM 6:40e873bbc5f7 229 */
MACRUM 6:40e873bbc5f7 230 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
MACRUM 6:40e873bbc5f7 231
MACRUM 6:40e873bbc5f7 232
MACRUM 6:40e873bbc5f7 233 /** \brief LDR Exclusive (16 bit)
MACRUM 6:40e873bbc5f7 234
MACRUM 6:40e873bbc5f7 235 This function executes a exclusive LDR instruction for 16 bit values.
MACRUM 6:40e873bbc5f7 236
MACRUM 6:40e873bbc5f7 237 \param [in] ptr Pointer to data
MACRUM 6:40e873bbc5f7 238 \return value of type uint16_t at (*ptr)
MACRUM 6:40e873bbc5f7 239 */
MACRUM 6:40e873bbc5f7 240 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
MACRUM 6:40e873bbc5f7 241
MACRUM 6:40e873bbc5f7 242
MACRUM 6:40e873bbc5f7 243 /** \brief LDR Exclusive (32 bit)
MACRUM 6:40e873bbc5f7 244
MACRUM 6:40e873bbc5f7 245 This function executes a exclusive LDR instruction for 32 bit values.
MACRUM 6:40e873bbc5f7 246
MACRUM 6:40e873bbc5f7 247 \param [in] ptr Pointer to data
MACRUM 6:40e873bbc5f7 248 \return value of type uint32_t at (*ptr)
MACRUM 6:40e873bbc5f7 249 */
MACRUM 6:40e873bbc5f7 250 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
MACRUM 6:40e873bbc5f7 251
MACRUM 6:40e873bbc5f7 252
MACRUM 6:40e873bbc5f7 253 /** \brief STR Exclusive (8 bit)
MACRUM 6:40e873bbc5f7 254
MACRUM 6:40e873bbc5f7 255 This function executes a exclusive STR instruction for 8 bit values.
MACRUM 6:40e873bbc5f7 256
MACRUM 6:40e873bbc5f7 257 \param [in] value Value to store
MACRUM 6:40e873bbc5f7 258 \param [in] ptr Pointer to location
MACRUM 6:40e873bbc5f7 259 \return 0 Function succeeded
MACRUM 6:40e873bbc5f7 260 \return 1 Function failed
MACRUM 6:40e873bbc5f7 261 */
MACRUM 6:40e873bbc5f7 262 #define __STREXB(value, ptr) __strex(value, ptr)
MACRUM 6:40e873bbc5f7 263
MACRUM 6:40e873bbc5f7 264
MACRUM 6:40e873bbc5f7 265 /** \brief STR Exclusive (16 bit)
MACRUM 6:40e873bbc5f7 266
MACRUM 6:40e873bbc5f7 267 This function executes a exclusive STR instruction for 16 bit values.
MACRUM 6:40e873bbc5f7 268
MACRUM 6:40e873bbc5f7 269 \param [in] value Value to store
MACRUM 6:40e873bbc5f7 270 \param [in] ptr Pointer to location
MACRUM 6:40e873bbc5f7 271 \return 0 Function succeeded
MACRUM 6:40e873bbc5f7 272 \return 1 Function failed
MACRUM 6:40e873bbc5f7 273 */
MACRUM 6:40e873bbc5f7 274 #define __STREXH(value, ptr) __strex(value, ptr)
MACRUM 6:40e873bbc5f7 275
MACRUM 6:40e873bbc5f7 276
MACRUM 6:40e873bbc5f7 277 /** \brief STR Exclusive (32 bit)
MACRUM 6:40e873bbc5f7 278
MACRUM 6:40e873bbc5f7 279 This function executes a exclusive STR instruction for 32 bit values.
MACRUM 6:40e873bbc5f7 280
MACRUM 6:40e873bbc5f7 281 \param [in] value Value to store
MACRUM 6:40e873bbc5f7 282 \param [in] ptr Pointer to location
MACRUM 6:40e873bbc5f7 283 \return 0 Function succeeded
MACRUM 6:40e873bbc5f7 284 \return 1 Function failed
MACRUM 6:40e873bbc5f7 285 */
MACRUM 6:40e873bbc5f7 286 #define __STREXW(value, ptr) __strex(value, ptr)
MACRUM 6:40e873bbc5f7 287
MACRUM 6:40e873bbc5f7 288
MACRUM 6:40e873bbc5f7 289 /** \brief Remove the exclusive lock
MACRUM 6:40e873bbc5f7 290
MACRUM 6:40e873bbc5f7 291 This function removes the exclusive lock which is created by LDREX.
MACRUM 6:40e873bbc5f7 292
MACRUM 6:40e873bbc5f7 293 */
MACRUM 6:40e873bbc5f7 294 #define __CLREX __clrex
MACRUM 6:40e873bbc5f7 295
MACRUM 6:40e873bbc5f7 296
MACRUM 6:40e873bbc5f7 297 /** \brief Signed Saturate
MACRUM 6:40e873bbc5f7 298
MACRUM 6:40e873bbc5f7 299 This function saturates a signed value.
MACRUM 6:40e873bbc5f7 300
MACRUM 6:40e873bbc5f7 301 \param [in] value Value to be saturated
MACRUM 6:40e873bbc5f7 302 \param [in] sat Bit position to saturate to (1..32)
MACRUM 6:40e873bbc5f7 303 \return Saturated value
MACRUM 6:40e873bbc5f7 304 */
MACRUM 6:40e873bbc5f7 305 #define __SSAT __ssat
MACRUM 6:40e873bbc5f7 306
MACRUM 6:40e873bbc5f7 307
MACRUM 6:40e873bbc5f7 308 /** \brief Unsigned Saturate
MACRUM 6:40e873bbc5f7 309
MACRUM 6:40e873bbc5f7 310 This function saturates an unsigned value.
MACRUM 6:40e873bbc5f7 311
MACRUM 6:40e873bbc5f7 312 \param [in] value Value to be saturated
MACRUM 6:40e873bbc5f7 313 \param [in] sat Bit position to saturate to (0..31)
MACRUM 6:40e873bbc5f7 314 \return Saturated value
MACRUM 6:40e873bbc5f7 315 */
MACRUM 6:40e873bbc5f7 316 #define __USAT __usat
MACRUM 6:40e873bbc5f7 317
MACRUM 6:40e873bbc5f7 318
MACRUM 6:40e873bbc5f7 319 /** \brief Rotate Right with Extend (32 bit)
MACRUM 6:40e873bbc5f7 320
MACRUM 6:40e873bbc5f7 321 This function moves each bit of a bitstring right by one bit.
MACRUM 6:40e873bbc5f7 322 The carry input is shifted in at the left end of the bitstring.
MACRUM 6:40e873bbc5f7 323
MACRUM 6:40e873bbc5f7 324 \param [in] value Value to rotate
MACRUM 6:40e873bbc5f7 325 \return Rotated value
MACRUM 6:40e873bbc5f7 326 */
MACRUM 6:40e873bbc5f7 327 #ifndef __NO_EMBEDDED_ASM
MACRUM 6:40e873bbc5f7 328 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
MACRUM 6:40e873bbc5f7 329 {
MACRUM 6:40e873bbc5f7 330 rrx r0, r0
MACRUM 6:40e873bbc5f7 331 bx lr
MACRUM 6:40e873bbc5f7 332 }
MACRUM 6:40e873bbc5f7 333 #endif
MACRUM 6:40e873bbc5f7 334
MACRUM 6:40e873bbc5f7 335
MACRUM 6:40e873bbc5f7 336 /** \brief LDRT Unprivileged (8 bit)
MACRUM 6:40e873bbc5f7 337
MACRUM 6:40e873bbc5f7 338 This function executes a Unprivileged LDRT instruction for 8 bit value.
MACRUM 6:40e873bbc5f7 339
MACRUM 6:40e873bbc5f7 340 \param [in] ptr Pointer to data
MACRUM 6:40e873bbc5f7 341 \return value of type uint8_t at (*ptr)
MACRUM 6:40e873bbc5f7 342 */
MACRUM 6:40e873bbc5f7 343 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
MACRUM 6:40e873bbc5f7 344
MACRUM 6:40e873bbc5f7 345
MACRUM 6:40e873bbc5f7 346 /** \brief LDRT Unprivileged (16 bit)
MACRUM 6:40e873bbc5f7 347
MACRUM 6:40e873bbc5f7 348 This function executes a Unprivileged LDRT instruction for 16 bit values.
MACRUM 6:40e873bbc5f7 349
MACRUM 6:40e873bbc5f7 350 \param [in] ptr Pointer to data
MACRUM 6:40e873bbc5f7 351 \return value of type uint16_t at (*ptr)
MACRUM 6:40e873bbc5f7 352 */
MACRUM 6:40e873bbc5f7 353 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
MACRUM 6:40e873bbc5f7 354
MACRUM 6:40e873bbc5f7 355
MACRUM 6:40e873bbc5f7 356 /** \brief LDRT Unprivileged (32 bit)
MACRUM 6:40e873bbc5f7 357
MACRUM 6:40e873bbc5f7 358 This function executes a Unprivileged LDRT instruction for 32 bit values.
MACRUM 6:40e873bbc5f7 359
MACRUM 6:40e873bbc5f7 360 \param [in] ptr Pointer to data
MACRUM 6:40e873bbc5f7 361 \return value of type uint32_t at (*ptr)
MACRUM 6:40e873bbc5f7 362 */
MACRUM 6:40e873bbc5f7 363 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
MACRUM 6:40e873bbc5f7 364
MACRUM 6:40e873bbc5f7 365
MACRUM 6:40e873bbc5f7 366 /** \brief STRT Unprivileged (8 bit)
MACRUM 6:40e873bbc5f7 367
MACRUM 6:40e873bbc5f7 368 This function executes a Unprivileged STRT instruction for 8 bit values.
MACRUM 6:40e873bbc5f7 369
MACRUM 6:40e873bbc5f7 370 \param [in] value Value to store
MACRUM 6:40e873bbc5f7 371 \param [in] ptr Pointer to location
MACRUM 6:40e873bbc5f7 372 */
MACRUM 6:40e873bbc5f7 373 #define __STRBT(value, ptr) __strt(value, ptr)
MACRUM 6:40e873bbc5f7 374
MACRUM 6:40e873bbc5f7 375
MACRUM 6:40e873bbc5f7 376 /** \brief STRT Unprivileged (16 bit)
MACRUM 6:40e873bbc5f7 377
MACRUM 6:40e873bbc5f7 378 This function executes a Unprivileged STRT instruction for 16 bit values.
MACRUM 6:40e873bbc5f7 379
MACRUM 6:40e873bbc5f7 380 \param [in] value Value to store
MACRUM 6:40e873bbc5f7 381 \param [in] ptr Pointer to location
MACRUM 6:40e873bbc5f7 382 */
MACRUM 6:40e873bbc5f7 383 #define __STRHT(value, ptr) __strt(value, ptr)
MACRUM 6:40e873bbc5f7 384
MACRUM 6:40e873bbc5f7 385
MACRUM 6:40e873bbc5f7 386 /** \brief STRT Unprivileged (32 bit)
MACRUM 6:40e873bbc5f7 387
MACRUM 6:40e873bbc5f7 388 This function executes a Unprivileged STRT instruction for 32 bit values.
MACRUM 6:40e873bbc5f7 389
MACRUM 6:40e873bbc5f7 390 \param [in] value Value to store
MACRUM 6:40e873bbc5f7 391 \param [in] ptr Pointer to location
MACRUM 6:40e873bbc5f7 392 */
MACRUM 6:40e873bbc5f7 393 #define __STRT(value, ptr) __strt(value, ptr)
MACRUM 6:40e873bbc5f7 394
MACRUM 6:40e873bbc5f7 395 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
MACRUM 6:40e873bbc5f7 396
MACRUM 6:40e873bbc5f7 397
MACRUM 6:40e873bbc5f7 398 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
MACRUM 6:40e873bbc5f7 399 /* GNU gcc specific functions */
MACRUM 6:40e873bbc5f7 400
MACRUM 6:40e873bbc5f7 401 /* Define macros for porting to both thumb1 and thumb2.
MACRUM 6:40e873bbc5f7 402 * For thumb1, use low register (r0-r7), specified by constrant "l"
MACRUM 6:40e873bbc5f7 403 * Otherwise, use general registers, specified by constrant "r" */
MACRUM 6:40e873bbc5f7 404 #if defined (__thumb__) && !defined (__thumb2__)
MACRUM 6:40e873bbc5f7 405 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
MACRUM 6:40e873bbc5f7 406 #define __CMSIS_GCC_USE_REG(r) "l" (r)
MACRUM 6:40e873bbc5f7 407 #else
MACRUM 6:40e873bbc5f7 408 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
MACRUM 6:40e873bbc5f7 409 #define __CMSIS_GCC_USE_REG(r) "r" (r)
MACRUM 6:40e873bbc5f7 410 #endif
MACRUM 6:40e873bbc5f7 411
MACRUM 6:40e873bbc5f7 412 /** \brief No Operation
MACRUM 6:40e873bbc5f7 413
MACRUM 6:40e873bbc5f7 414 No Operation does nothing. This instruction can be used for code alignment purposes.
MACRUM 6:40e873bbc5f7 415 */
MACRUM 6:40e873bbc5f7 416 __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
MACRUM 6:40e873bbc5f7 417 {
MACRUM 6:40e873bbc5f7 418 __ASM volatile ("nop");
MACRUM 6:40e873bbc5f7 419 }
MACRUM 6:40e873bbc5f7 420
MACRUM 6:40e873bbc5f7 421
MACRUM 6:40e873bbc5f7 422 /** \brief Wait For Interrupt
MACRUM 6:40e873bbc5f7 423
MACRUM 6:40e873bbc5f7 424 Wait For Interrupt is a hint instruction that suspends execution
MACRUM 6:40e873bbc5f7 425 until one of a number of events occurs.
MACRUM 6:40e873bbc5f7 426 */
MACRUM 6:40e873bbc5f7 427 __attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
MACRUM 6:40e873bbc5f7 428 {
MACRUM 6:40e873bbc5f7 429 __ASM volatile ("wfi");
MACRUM 6:40e873bbc5f7 430 }
MACRUM 6:40e873bbc5f7 431
MACRUM 6:40e873bbc5f7 432
MACRUM 6:40e873bbc5f7 433 /** \brief Wait For Event
MACRUM 6:40e873bbc5f7 434
MACRUM 6:40e873bbc5f7 435 Wait For Event is a hint instruction that permits the processor to enter
MACRUM 6:40e873bbc5f7 436 a low-power state until one of a number of events occurs.
MACRUM 6:40e873bbc5f7 437 */
MACRUM 6:40e873bbc5f7 438 __attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
MACRUM 6:40e873bbc5f7 439 {
MACRUM 6:40e873bbc5f7 440 __ASM volatile ("wfe");
MACRUM 6:40e873bbc5f7 441 }
MACRUM 6:40e873bbc5f7 442
MACRUM 6:40e873bbc5f7 443
MACRUM 6:40e873bbc5f7 444 /** \brief Send Event
MACRUM 6:40e873bbc5f7 445
MACRUM 6:40e873bbc5f7 446 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
MACRUM 6:40e873bbc5f7 447 */
MACRUM 6:40e873bbc5f7 448 __attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
MACRUM 6:40e873bbc5f7 449 {
MACRUM 6:40e873bbc5f7 450 __ASM volatile ("sev");
MACRUM 6:40e873bbc5f7 451 }
MACRUM 6:40e873bbc5f7 452
MACRUM 6:40e873bbc5f7 453
MACRUM 6:40e873bbc5f7 454 /** \brief Instruction Synchronization Barrier
MACRUM 6:40e873bbc5f7 455
MACRUM 6:40e873bbc5f7 456 Instruction Synchronization Barrier flushes the pipeline in the processor,
MACRUM 6:40e873bbc5f7 457 so that all instructions following the ISB are fetched from cache or
MACRUM 6:40e873bbc5f7 458 memory, after the instruction has been completed.
MACRUM 6:40e873bbc5f7 459 */
MACRUM 6:40e873bbc5f7 460 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
MACRUM 6:40e873bbc5f7 461 {
MACRUM 6:40e873bbc5f7 462 __ASM volatile ("isb 0xF":::"memory");
MACRUM 6:40e873bbc5f7 463 }
MACRUM 6:40e873bbc5f7 464
MACRUM 6:40e873bbc5f7 465
MACRUM 6:40e873bbc5f7 466 /** \brief Data Synchronization Barrier
MACRUM 6:40e873bbc5f7 467
MACRUM 6:40e873bbc5f7 468 This function acts as a special kind of Data Memory Barrier.
MACRUM 6:40e873bbc5f7 469 It completes when all explicit memory accesses before this instruction complete.
MACRUM 6:40e873bbc5f7 470 */
MACRUM 6:40e873bbc5f7 471 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
MACRUM 6:40e873bbc5f7 472 {
MACRUM 6:40e873bbc5f7 473 __ASM volatile ("dsb 0xF":::"memory");
MACRUM 6:40e873bbc5f7 474 }
MACRUM 6:40e873bbc5f7 475
MACRUM 6:40e873bbc5f7 476
MACRUM 6:40e873bbc5f7 477 /** \brief Data Memory Barrier
MACRUM 6:40e873bbc5f7 478
MACRUM 6:40e873bbc5f7 479 This function ensures the apparent order of the explicit memory operations before
MACRUM 6:40e873bbc5f7 480 and after the instruction, without ensuring their completion.
MACRUM 6:40e873bbc5f7 481 */
MACRUM 6:40e873bbc5f7 482 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
MACRUM 6:40e873bbc5f7 483 {
MACRUM 6:40e873bbc5f7 484 __ASM volatile ("dmb 0xF":::"memory");
MACRUM 6:40e873bbc5f7 485 }
MACRUM 6:40e873bbc5f7 486
MACRUM 6:40e873bbc5f7 487
MACRUM 6:40e873bbc5f7 488 /** \brief Reverse byte order (32 bit)
MACRUM 6:40e873bbc5f7 489
MACRUM 6:40e873bbc5f7 490 This function reverses the byte order in integer value.
MACRUM 6:40e873bbc5f7 491
MACRUM 6:40e873bbc5f7 492 \param [in] value Value to reverse
MACRUM 6:40e873bbc5f7 493 \return Reversed value
MACRUM 6:40e873bbc5f7 494 */
MACRUM 6:40e873bbc5f7 495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
MACRUM 6:40e873bbc5f7 496 {
MACRUM 6:40e873bbc5f7 497 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
MACRUM 6:40e873bbc5f7 498 return __builtin_bswap32(value);
MACRUM 6:40e873bbc5f7 499 #else
MACRUM 6:40e873bbc5f7 500 uint32_t result;
MACRUM 6:40e873bbc5f7 501
MACRUM 6:40e873bbc5f7 502 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
MACRUM 6:40e873bbc5f7 503 return(result);
MACRUM 6:40e873bbc5f7 504 #endif
MACRUM 6:40e873bbc5f7 505 }
MACRUM 6:40e873bbc5f7 506
MACRUM 6:40e873bbc5f7 507
MACRUM 6:40e873bbc5f7 508 /** \brief Reverse byte order (16 bit)
MACRUM 6:40e873bbc5f7 509
MACRUM 6:40e873bbc5f7 510 This function reverses the byte order in two unsigned short values.
MACRUM 6:40e873bbc5f7 511
MACRUM 6:40e873bbc5f7 512 \param [in] value Value to reverse
MACRUM 6:40e873bbc5f7 513 \return Reversed value
MACRUM 6:40e873bbc5f7 514 */
MACRUM 6:40e873bbc5f7 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
MACRUM 6:40e873bbc5f7 516 {
MACRUM 6:40e873bbc5f7 517 uint32_t result;
MACRUM 6:40e873bbc5f7 518
MACRUM 6:40e873bbc5f7 519 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
MACRUM 6:40e873bbc5f7 520 return(result);
MACRUM 6:40e873bbc5f7 521 }
MACRUM 6:40e873bbc5f7 522
MACRUM 6:40e873bbc5f7 523
MACRUM 6:40e873bbc5f7 524 /** \brief Reverse byte order in signed short value
MACRUM 6:40e873bbc5f7 525
MACRUM 6:40e873bbc5f7 526 This function reverses the byte order in a signed short value with sign extension to integer.
MACRUM 6:40e873bbc5f7 527
MACRUM 6:40e873bbc5f7 528 \param [in] value Value to reverse
MACRUM 6:40e873bbc5f7 529 \return Reversed value
MACRUM 6:40e873bbc5f7 530 */
MACRUM 6:40e873bbc5f7 531 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
MACRUM 6:40e873bbc5f7 532 {
MACRUM 6:40e873bbc5f7 533 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
MACRUM 6:40e873bbc5f7 534 return (short)__builtin_bswap16(value);
MACRUM 6:40e873bbc5f7 535 #else
MACRUM 6:40e873bbc5f7 536 uint32_t result;
MACRUM 6:40e873bbc5f7 537
MACRUM 6:40e873bbc5f7 538 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
MACRUM 6:40e873bbc5f7 539 return(result);
MACRUM 6:40e873bbc5f7 540 #endif
MACRUM 6:40e873bbc5f7 541 }
MACRUM 6:40e873bbc5f7 542
MACRUM 6:40e873bbc5f7 543
MACRUM 6:40e873bbc5f7 544 /** \brief Rotate Right in unsigned value (32 bit)
MACRUM 6:40e873bbc5f7 545
MACRUM 6:40e873bbc5f7 546 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
MACRUM 6:40e873bbc5f7 547
MACRUM 6:40e873bbc5f7 548 \param [in] value Value to rotate
MACRUM 6:40e873bbc5f7 549 \param [in] value Number of Bits to rotate
MACRUM 6:40e873bbc5f7 550 \return Rotated value
MACRUM 6:40e873bbc5f7 551 */
MACRUM 6:40e873bbc5f7 552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
MACRUM 6:40e873bbc5f7 553 {
MACRUM 6:40e873bbc5f7 554 return (op1 >> op2) | (op1 << (32 - op2));
MACRUM 6:40e873bbc5f7 555 }
MACRUM 6:40e873bbc5f7 556
MACRUM 6:40e873bbc5f7 557
MACRUM 6:40e873bbc5f7 558 /** \brief Breakpoint
MACRUM 6:40e873bbc5f7 559
MACRUM 6:40e873bbc5f7 560 This function causes the processor to enter Debug state.
MACRUM 6:40e873bbc5f7 561 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
MACRUM 6:40e873bbc5f7 562
MACRUM 6:40e873bbc5f7 563 \param [in] value is ignored by the processor.
MACRUM 6:40e873bbc5f7 564 If required, a debugger can use it to store additional information about the breakpoint.
MACRUM 6:40e873bbc5f7 565 */
MACRUM 6:40e873bbc5f7 566 #define __BKPT(value) __ASM volatile ("bkpt "#value)
MACRUM 6:40e873bbc5f7 567
MACRUM 6:40e873bbc5f7 568
MACRUM 6:40e873bbc5f7 569 /** \brief Reverse bit order of value
MACRUM 6:40e873bbc5f7 570
MACRUM 6:40e873bbc5f7 571 This function reverses the bit order of the given value.
MACRUM 6:40e873bbc5f7 572
MACRUM 6:40e873bbc5f7 573 \param [in] value Value to reverse
MACRUM 6:40e873bbc5f7 574 \return Reversed value
MACRUM 6:40e873bbc5f7 575 */
MACRUM 6:40e873bbc5f7 576 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
MACRUM 6:40e873bbc5f7 577 {
MACRUM 6:40e873bbc5f7 578 uint32_t result;
MACRUM 6:40e873bbc5f7 579
MACRUM 6:40e873bbc5f7 580 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
MACRUM 6:40e873bbc5f7 581 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
MACRUM 6:40e873bbc5f7 582 #else
MACRUM 6:40e873bbc5f7 583 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
MACRUM 6:40e873bbc5f7 584
MACRUM 6:40e873bbc5f7 585 result = value; // r will be reversed bits of v; first get LSB of v
MACRUM 6:40e873bbc5f7 586 for (value >>= 1; value; value >>= 1)
MACRUM 6:40e873bbc5f7 587 {
MACRUM 6:40e873bbc5f7 588 result <<= 1;
MACRUM 6:40e873bbc5f7 589 result |= value & 1;
MACRUM 6:40e873bbc5f7 590 s--;
MACRUM 6:40e873bbc5f7 591 }
MACRUM 6:40e873bbc5f7 592 result <<= s; // shift when v's highest bits are zero
MACRUM 6:40e873bbc5f7 593 #endif
MACRUM 6:40e873bbc5f7 594 return(result);
MACRUM 6:40e873bbc5f7 595 }
MACRUM 6:40e873bbc5f7 596
MACRUM 6:40e873bbc5f7 597
MACRUM 6:40e873bbc5f7 598 /** \brief Count leading zeros
MACRUM 6:40e873bbc5f7 599
MACRUM 6:40e873bbc5f7 600 This function counts the number of leading zeros of a data value.
MACRUM 6:40e873bbc5f7 601
MACRUM 6:40e873bbc5f7 602 \param [in] value Value to count the leading zeros
MACRUM 6:40e873bbc5f7 603 \return number of leading zeros in value
MACRUM 6:40e873bbc5f7 604 */
MACRUM 6:40e873bbc5f7 605 #define __CLZ __builtin_clz
MACRUM 6:40e873bbc5f7 606
MACRUM 6:40e873bbc5f7 607
MACRUM 6:40e873bbc5f7 608 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
MACRUM 6:40e873bbc5f7 609
MACRUM 6:40e873bbc5f7 610 /** \brief LDR Exclusive (8 bit)
MACRUM 6:40e873bbc5f7 611
MACRUM 6:40e873bbc5f7 612 This function executes a exclusive LDR instruction for 8 bit value.
MACRUM 6:40e873bbc5f7 613
MACRUM 6:40e873bbc5f7 614 \param [in] ptr Pointer to data
MACRUM 6:40e873bbc5f7 615 \return value of type uint8_t at (*ptr)
MACRUM 6:40e873bbc5f7 616 */
MACRUM 6:40e873bbc5f7 617 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
MACRUM 6:40e873bbc5f7 618 {
MACRUM 6:40e873bbc5f7 619 uint32_t result;
MACRUM 6:40e873bbc5f7 620
MACRUM 6:40e873bbc5f7 621 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
MACRUM 6:40e873bbc5f7 622 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
MACRUM 6:40e873bbc5f7 623 #else
MACRUM 6:40e873bbc5f7 624 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
MACRUM 6:40e873bbc5f7 625 accepted by assembler. So has to use following less efficient pattern.
MACRUM 6:40e873bbc5f7 626 */
MACRUM 6:40e873bbc5f7 627 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
MACRUM 6:40e873bbc5f7 628 #endif
MACRUM 6:40e873bbc5f7 629 return ((uint8_t) result); /* Add explicit type cast here */
MACRUM 6:40e873bbc5f7 630 }
MACRUM 6:40e873bbc5f7 631
MACRUM 6:40e873bbc5f7 632
MACRUM 6:40e873bbc5f7 633 /** \brief LDR Exclusive (16 bit)
MACRUM 6:40e873bbc5f7 634
MACRUM 6:40e873bbc5f7 635 This function executes a exclusive LDR instruction for 16 bit values.
MACRUM 6:40e873bbc5f7 636
MACRUM 6:40e873bbc5f7 637 \param [in] ptr Pointer to data
MACRUM 6:40e873bbc5f7 638 \return value of type uint16_t at (*ptr)
MACRUM 6:40e873bbc5f7 639 */
MACRUM 6:40e873bbc5f7 640 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
MACRUM 6:40e873bbc5f7 641 {
MACRUM 6:40e873bbc5f7 642 uint32_t result;
MACRUM 6:40e873bbc5f7 643
MACRUM 6:40e873bbc5f7 644 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
MACRUM 6:40e873bbc5f7 645 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
MACRUM 6:40e873bbc5f7 646 #else
MACRUM 6:40e873bbc5f7 647 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
MACRUM 6:40e873bbc5f7 648 accepted by assembler. So has to use following less efficient pattern.
MACRUM 6:40e873bbc5f7 649 */
MACRUM 6:40e873bbc5f7 650 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
MACRUM 6:40e873bbc5f7 651 #endif
MACRUM 6:40e873bbc5f7 652 return ((uint16_t) result); /* Add explicit type cast here */
MACRUM 6:40e873bbc5f7 653 }
MACRUM 6:40e873bbc5f7 654
MACRUM 6:40e873bbc5f7 655
MACRUM 6:40e873bbc5f7 656 /** \brief LDR Exclusive (32 bit)
MACRUM 6:40e873bbc5f7 657
MACRUM 6:40e873bbc5f7 658 This function executes a exclusive LDR instruction for 32 bit values.
MACRUM 6:40e873bbc5f7 659
MACRUM 6:40e873bbc5f7 660 \param [in] ptr Pointer to data
MACRUM 6:40e873bbc5f7 661 \return value of type uint32_t at (*ptr)
MACRUM 6:40e873bbc5f7 662 */
MACRUM 6:40e873bbc5f7 663 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
MACRUM 6:40e873bbc5f7 664 {
MACRUM 6:40e873bbc5f7 665 uint32_t result;
MACRUM 6:40e873bbc5f7 666
MACRUM 6:40e873bbc5f7 667 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
MACRUM 6:40e873bbc5f7 668 return(result);
MACRUM 6:40e873bbc5f7 669 }
MACRUM 6:40e873bbc5f7 670
MACRUM 6:40e873bbc5f7 671
MACRUM 6:40e873bbc5f7 672 /** \brief STR Exclusive (8 bit)
MACRUM 6:40e873bbc5f7 673
MACRUM 6:40e873bbc5f7 674 This function executes a exclusive STR instruction for 8 bit values.
MACRUM 6:40e873bbc5f7 675
MACRUM 6:40e873bbc5f7 676 \param [in] value Value to store
MACRUM 6:40e873bbc5f7 677 \param [in] ptr Pointer to location
MACRUM 6:40e873bbc5f7 678 \return 0 Function succeeded
MACRUM 6:40e873bbc5f7 679 \return 1 Function failed
MACRUM 6:40e873bbc5f7 680 */
MACRUM 6:40e873bbc5f7 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
MACRUM 6:40e873bbc5f7 682 {
MACRUM 6:40e873bbc5f7 683 uint32_t result;
MACRUM 6:40e873bbc5f7 684
MACRUM 6:40e873bbc5f7 685 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
MACRUM 6:40e873bbc5f7 686 return(result);
MACRUM 6:40e873bbc5f7 687 }
MACRUM 6:40e873bbc5f7 688
MACRUM 6:40e873bbc5f7 689
MACRUM 6:40e873bbc5f7 690 /** \brief STR Exclusive (16 bit)
MACRUM 6:40e873bbc5f7 691
MACRUM 6:40e873bbc5f7 692 This function executes a exclusive STR instruction for 16 bit values.
MACRUM 6:40e873bbc5f7 693
MACRUM 6:40e873bbc5f7 694 \param [in] value Value to store
MACRUM 6:40e873bbc5f7 695 \param [in] ptr Pointer to location
MACRUM 6:40e873bbc5f7 696 \return 0 Function succeeded
MACRUM 6:40e873bbc5f7 697 \return 1 Function failed
MACRUM 6:40e873bbc5f7 698 */
MACRUM 6:40e873bbc5f7 699 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
MACRUM 6:40e873bbc5f7 700 {
MACRUM 6:40e873bbc5f7 701 uint32_t result;
MACRUM 6:40e873bbc5f7 702
MACRUM 6:40e873bbc5f7 703 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
MACRUM 6:40e873bbc5f7 704 return(result);
MACRUM 6:40e873bbc5f7 705 }
MACRUM 6:40e873bbc5f7 706
MACRUM 6:40e873bbc5f7 707
MACRUM 6:40e873bbc5f7 708 /** \brief STR Exclusive (32 bit)
MACRUM 6:40e873bbc5f7 709
MACRUM 6:40e873bbc5f7 710 This function executes a exclusive STR instruction for 32 bit values.
MACRUM 6:40e873bbc5f7 711
MACRUM 6:40e873bbc5f7 712 \param [in] value Value to store
MACRUM 6:40e873bbc5f7 713 \param [in] ptr Pointer to location
MACRUM 6:40e873bbc5f7 714 \return 0 Function succeeded
MACRUM 6:40e873bbc5f7 715 \return 1 Function failed
MACRUM 6:40e873bbc5f7 716 */
MACRUM 6:40e873bbc5f7 717 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
MACRUM 6:40e873bbc5f7 718 {
MACRUM 6:40e873bbc5f7 719 uint32_t result;
MACRUM 6:40e873bbc5f7 720
MACRUM 6:40e873bbc5f7 721 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
MACRUM 6:40e873bbc5f7 722 return(result);
MACRUM 6:40e873bbc5f7 723 }
MACRUM 6:40e873bbc5f7 724
MACRUM 6:40e873bbc5f7 725
MACRUM 6:40e873bbc5f7 726 /** \brief Remove the exclusive lock
MACRUM 6:40e873bbc5f7 727
MACRUM 6:40e873bbc5f7 728 This function removes the exclusive lock which is created by LDREX.
MACRUM 6:40e873bbc5f7 729
MACRUM 6:40e873bbc5f7 730 */
MACRUM 6:40e873bbc5f7 731 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
MACRUM 6:40e873bbc5f7 732 {
MACRUM 6:40e873bbc5f7 733 __ASM volatile ("clrex" ::: "memory");
MACRUM 6:40e873bbc5f7 734 }
MACRUM 6:40e873bbc5f7 735
MACRUM 6:40e873bbc5f7 736
MACRUM 6:40e873bbc5f7 737 /** \brief Signed Saturate
MACRUM 6:40e873bbc5f7 738
MACRUM 6:40e873bbc5f7 739 This function saturates a signed value.
MACRUM 6:40e873bbc5f7 740
MACRUM 6:40e873bbc5f7 741 \param [in] value Value to be saturated
MACRUM 6:40e873bbc5f7 742 \param [in] sat Bit position to saturate to (1..32)
MACRUM 6:40e873bbc5f7 743 \return Saturated value
MACRUM 6:40e873bbc5f7 744 */
MACRUM 6:40e873bbc5f7 745 #define __SSAT(ARG1,ARG2) \
MACRUM 6:40e873bbc5f7 746 ({ \
MACRUM 6:40e873bbc5f7 747 uint32_t __RES, __ARG1 = (ARG1); \
MACRUM 6:40e873bbc5f7 748 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
MACRUM 6:40e873bbc5f7 749 __RES; \
MACRUM 6:40e873bbc5f7 750 })
MACRUM 6:40e873bbc5f7 751
MACRUM 6:40e873bbc5f7 752
MACRUM 6:40e873bbc5f7 753 /** \brief Unsigned Saturate
MACRUM 6:40e873bbc5f7 754
MACRUM 6:40e873bbc5f7 755 This function saturates an unsigned value.
MACRUM 6:40e873bbc5f7 756
MACRUM 6:40e873bbc5f7 757 \param [in] value Value to be saturated
MACRUM 6:40e873bbc5f7 758 \param [in] sat Bit position to saturate to (0..31)
MACRUM 6:40e873bbc5f7 759 \return Saturated value
MACRUM 6:40e873bbc5f7 760 */
MACRUM 6:40e873bbc5f7 761 #define __USAT(ARG1,ARG2) \
MACRUM 6:40e873bbc5f7 762 ({ \
MACRUM 6:40e873bbc5f7 763 uint32_t __RES, __ARG1 = (ARG1); \
MACRUM 6:40e873bbc5f7 764 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
MACRUM 6:40e873bbc5f7 765 __RES; \
MACRUM 6:40e873bbc5f7 766 })
MACRUM 6:40e873bbc5f7 767
MACRUM 6:40e873bbc5f7 768
MACRUM 6:40e873bbc5f7 769 /** \brief Rotate Right with Extend (32 bit)
MACRUM 6:40e873bbc5f7 770
MACRUM 6:40e873bbc5f7 771 This function moves each bit of a bitstring right by one bit.
MACRUM 6:40e873bbc5f7 772 The carry input is shifted in at the left end of the bitstring.
MACRUM 6:40e873bbc5f7 773
MACRUM 6:40e873bbc5f7 774 \param [in] value Value to rotate
MACRUM 6:40e873bbc5f7 775 \return Rotated value
MACRUM 6:40e873bbc5f7 776 */
MACRUM 6:40e873bbc5f7 777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
MACRUM 6:40e873bbc5f7 778 {
MACRUM 6:40e873bbc5f7 779 uint32_t result;
MACRUM 6:40e873bbc5f7 780
MACRUM 6:40e873bbc5f7 781 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
MACRUM 6:40e873bbc5f7 782 return(result);
MACRUM 6:40e873bbc5f7 783 }
MACRUM 6:40e873bbc5f7 784
MACRUM 6:40e873bbc5f7 785
MACRUM 6:40e873bbc5f7 786 /** \brief LDRT Unprivileged (8 bit)
MACRUM 6:40e873bbc5f7 787
MACRUM 6:40e873bbc5f7 788 This function executes a Unprivileged LDRT instruction for 8 bit value.
MACRUM 6:40e873bbc5f7 789
MACRUM 6:40e873bbc5f7 790 \param [in] ptr Pointer to data
MACRUM 6:40e873bbc5f7 791 \return value of type uint8_t at (*ptr)
MACRUM 6:40e873bbc5f7 792 */
MACRUM 6:40e873bbc5f7 793 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
MACRUM 6:40e873bbc5f7 794 {
MACRUM 6:40e873bbc5f7 795 uint32_t result;
MACRUM 6:40e873bbc5f7 796
MACRUM 6:40e873bbc5f7 797 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
MACRUM 6:40e873bbc5f7 798 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
MACRUM 6:40e873bbc5f7 799 #else
MACRUM 6:40e873bbc5f7 800 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
MACRUM 6:40e873bbc5f7 801 accepted by assembler. So has to use following less efficient pattern.
MACRUM 6:40e873bbc5f7 802 */
MACRUM 6:40e873bbc5f7 803 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
MACRUM 6:40e873bbc5f7 804 #endif
MACRUM 6:40e873bbc5f7 805 return ((uint8_t) result); /* Add explicit type cast here */
MACRUM 6:40e873bbc5f7 806 }
MACRUM 6:40e873bbc5f7 807
MACRUM 6:40e873bbc5f7 808
MACRUM 6:40e873bbc5f7 809 /** \brief LDRT Unprivileged (16 bit)
MACRUM 6:40e873bbc5f7 810
MACRUM 6:40e873bbc5f7 811 This function executes a Unprivileged LDRT instruction for 16 bit values.
MACRUM 6:40e873bbc5f7 812
MACRUM 6:40e873bbc5f7 813 \param [in] ptr Pointer to data
MACRUM 6:40e873bbc5f7 814 \return value of type uint16_t at (*ptr)
MACRUM 6:40e873bbc5f7 815 */
MACRUM 6:40e873bbc5f7 816 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
MACRUM 6:40e873bbc5f7 817 {
MACRUM 6:40e873bbc5f7 818 uint32_t result;
MACRUM 6:40e873bbc5f7 819
MACRUM 6:40e873bbc5f7 820 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
MACRUM 6:40e873bbc5f7 821 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
MACRUM 6:40e873bbc5f7 822 #else
MACRUM 6:40e873bbc5f7 823 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
MACRUM 6:40e873bbc5f7 824 accepted by assembler. So has to use following less efficient pattern.
MACRUM 6:40e873bbc5f7 825 */
MACRUM 6:40e873bbc5f7 826 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
MACRUM 6:40e873bbc5f7 827 #endif
MACRUM 6:40e873bbc5f7 828 return ((uint16_t) result); /* Add explicit type cast here */
MACRUM 6:40e873bbc5f7 829 }
MACRUM 6:40e873bbc5f7 830
MACRUM 6:40e873bbc5f7 831
MACRUM 6:40e873bbc5f7 832 /** \brief LDRT Unprivileged (32 bit)
MACRUM 6:40e873bbc5f7 833
MACRUM 6:40e873bbc5f7 834 This function executes a Unprivileged LDRT instruction for 32 bit values.
MACRUM 6:40e873bbc5f7 835
MACRUM 6:40e873bbc5f7 836 \param [in] ptr Pointer to data
MACRUM 6:40e873bbc5f7 837 \return value of type uint32_t at (*ptr)
MACRUM 6:40e873bbc5f7 838 */
MACRUM 6:40e873bbc5f7 839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
MACRUM 6:40e873bbc5f7 840 {
MACRUM 6:40e873bbc5f7 841 uint32_t result;
MACRUM 6:40e873bbc5f7 842
MACRUM 6:40e873bbc5f7 843 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
MACRUM 6:40e873bbc5f7 844 return(result);
MACRUM 6:40e873bbc5f7 845 }
MACRUM 6:40e873bbc5f7 846
MACRUM 6:40e873bbc5f7 847
MACRUM 6:40e873bbc5f7 848 /** \brief STRT Unprivileged (8 bit)
MACRUM 6:40e873bbc5f7 849
MACRUM 6:40e873bbc5f7 850 This function executes a Unprivileged STRT instruction for 8 bit values.
MACRUM 6:40e873bbc5f7 851
MACRUM 6:40e873bbc5f7 852 \param [in] value Value to store
MACRUM 6:40e873bbc5f7 853 \param [in] ptr Pointer to location
MACRUM 6:40e873bbc5f7 854 */
MACRUM 6:40e873bbc5f7 855 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
MACRUM 6:40e873bbc5f7 856 {
MACRUM 6:40e873bbc5f7 857 __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
MACRUM 6:40e873bbc5f7 858 }
MACRUM 6:40e873bbc5f7 859
MACRUM 6:40e873bbc5f7 860
MACRUM 6:40e873bbc5f7 861 /** \brief STRT Unprivileged (16 bit)
MACRUM 6:40e873bbc5f7 862
MACRUM 6:40e873bbc5f7 863 This function executes a Unprivileged STRT instruction for 16 bit values.
MACRUM 6:40e873bbc5f7 864
MACRUM 6:40e873bbc5f7 865 \param [in] value Value to store
MACRUM 6:40e873bbc5f7 866 \param [in] ptr Pointer to location
MACRUM 6:40e873bbc5f7 867 */
MACRUM 6:40e873bbc5f7 868 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
MACRUM 6:40e873bbc5f7 869 {
MACRUM 6:40e873bbc5f7 870 __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
MACRUM 6:40e873bbc5f7 871 }
MACRUM 6:40e873bbc5f7 872
MACRUM 6:40e873bbc5f7 873
MACRUM 6:40e873bbc5f7 874 /** \brief STRT Unprivileged (32 bit)
MACRUM 6:40e873bbc5f7 875
MACRUM 6:40e873bbc5f7 876 This function executes a Unprivileged STRT instruction for 32 bit values.
MACRUM 6:40e873bbc5f7 877
MACRUM 6:40e873bbc5f7 878 \param [in] value Value to store
MACRUM 6:40e873bbc5f7 879 \param [in] ptr Pointer to location
MACRUM 6:40e873bbc5f7 880 */
MACRUM 6:40e873bbc5f7 881 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
MACRUM 6:40e873bbc5f7 882 {
MACRUM 6:40e873bbc5f7 883 __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
MACRUM 6:40e873bbc5f7 884 }
MACRUM 6:40e873bbc5f7 885
MACRUM 6:40e873bbc5f7 886 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
MACRUM 6:40e873bbc5f7 887
MACRUM 6:40e873bbc5f7 888
MACRUM 6:40e873bbc5f7 889 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
MACRUM 6:40e873bbc5f7 890 /* IAR iccarm specific functions */
MACRUM 6:40e873bbc5f7 891 #include <cmsis_iar.h>
MACRUM 6:40e873bbc5f7 892
MACRUM 6:40e873bbc5f7 893
MACRUM 6:40e873bbc5f7 894 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
MACRUM 6:40e873bbc5f7 895 /* TI CCS specific functions */
MACRUM 6:40e873bbc5f7 896 #include <cmsis_ccs.h>
MACRUM 6:40e873bbc5f7 897
MACRUM 6:40e873bbc5f7 898
MACRUM 6:40e873bbc5f7 899 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
MACRUM 6:40e873bbc5f7 900 /* TASKING carm specific functions */
MACRUM 6:40e873bbc5f7 901 /*
MACRUM 6:40e873bbc5f7 902 * The CMSIS functions have been implemented as intrinsics in the compiler.
MACRUM 6:40e873bbc5f7 903 * Please use "carm -?i" to get an up to date list of all intrinsics,
MACRUM 6:40e873bbc5f7 904 * Including the CMSIS ones.
MACRUM 6:40e873bbc5f7 905 */
MACRUM 6:40e873bbc5f7 906
MACRUM 6:40e873bbc5f7 907
MACRUM 6:40e873bbc5f7 908 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
MACRUM 6:40e873bbc5f7 909 /* Cosmic specific functions */
MACRUM 6:40e873bbc5f7 910 #include <cmsis_csm.h>
MACRUM 6:40e873bbc5f7 911
MACRUM 6:40e873bbc5f7 912 #endif
MACRUM 6:40e873bbc5f7 913
MACRUM 6:40e873bbc5f7 914 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
MACRUM 6:40e873bbc5f7 915
MACRUM 6:40e873bbc5f7 916 #endif /* __CORE_CMINSTR_H */