Toyomasa Watarai / MB85RSxx_SPI

Fujitsu MB85RSxx SPI FRAM access library

Dependents:   MB85RSxx_Hello TYBLE16_simple_data_logger

MB85RSxx_SPI.cpp@0:f397b42257f8, 2017-04-24 (annotated)

Committer:
MACRUM
Date:
Mon Apr 24 14:03:41 2017 +0000
Revision:
0:f397b42257f8
Initial commit

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MACRUM 0:f397b42257f8 1 /**
MACRUM 0:f397b42257f8 2 ******************************************************************************
MACRUM 0:f397b42257f8 3 * @file MB85RSxx_SPI.cpp
MACRUM 0:f397b42257f8 4 * @author Toyomasa Watarai
MACRUM 0:f397b42257f8 5 * @version V1.0.0
MACRUM 0:f397b42257f8 6 * @date 24 April 2017
MACRUM 0:f397b42257f8 7 * @brief MB85RSxx_SPI class implementation
MACRUM 0:f397b42257f8 8 ******************************************************************************
MACRUM 0:f397b42257f8 9 * @attention
MACRUM 0:f397b42257f8 10 *
MACRUM 0:f397b42257f8 11 * Permission is hereby granted, free of charge, to any person obtaining a copy
MACRUM 0:f397b42257f8 12 * of this software and associated documentation files (the "Software"), to deal
MACRUM 0:f397b42257f8 13 * in the Software without restriction, including without limitation the rights
MACRUM 0:f397b42257f8 14 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
MACRUM 0:f397b42257f8 15 * copies of the Software, and to permit persons to whom the Software is
MACRUM 0:f397b42257f8 16 * furnished to do so, subject to the following conditions:
MACRUM 0:f397b42257f8 17 *
MACRUM 0:f397b42257f8 18 * The above copyright notice and this permission notice shall be included in
MACRUM 0:f397b42257f8 19 * all copies or substantial portions of the Software.
MACRUM 0:f397b42257f8 20 *
MACRUM 0:f397b42257f8 21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
MACRUM 0:f397b42257f8 22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
MACRUM 0:f397b42257f8 23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
MACRUM 0:f397b42257f8 24 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
MACRUM 0:f397b42257f8 25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
MACRUM 0:f397b42257f8 26 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
MACRUM 0:f397b42257f8 27 * THE SOFTWARE.
MACRUM 0:f397b42257f8 28 */
MACRUM 0:f397b42257f8 29 #include "mbed.h"
MACRUM 0:f397b42257f8 30 #include "MB85RSxx_SPI.h"
MACRUM 0:f397b42257f8 31
MACRUM 0:f397b42257f8 32 MB85RSxx_SPI::MB85RSxx_SPI(PinName mosi, PinName miso, PinName sclk, PinName cs)
MACRUM 0:f397b42257f8 33 :
MACRUM 0:f397b42257f8 34 _spi(mosi, miso, sclk),
MACRUM 0:f397b42257f8 35 _cs(cs)
MACRUM 0:f397b42257f8 36 {
MACRUM 0:f397b42257f8 37 uint8_t buf[4];
MACRUM 0:f397b42257f8 38
MACRUM 0:f397b42257f8 39 _cs = 1;
MACRUM 0:f397b42257f8 40 _spi.format(8, 0);
MACRUM 0:f397b42257f8 41 read_device_id(buf);
MACRUM 0:f397b42257f8 42 if ((buf[2] & 0x1F) > MB85_DENSITY_512K) {
MACRUM 0:f397b42257f8 43 _address_bits = 24;
MACRUM 0:f397b42257f8 44 } else {
MACRUM 0:f397b42257f8 45 _address_bits = 16;
MACRUM 0:f397b42257f8 46 }
MACRUM 0:f397b42257f8 47 }
MACRUM 0:f397b42257f8 48
MACRUM 0:f397b42257f8 49 MB85RSxx_SPI::~MB85RSxx_SPI()
MACRUM 0:f397b42257f8 50 {
MACRUM 0:f397b42257f8 51 }
MACRUM 0:f397b42257f8 52
MACRUM 0:f397b42257f8 53 void MB85RSxx_SPI::frequency(int hz)
MACRUM 0:f397b42257f8 54 {
MACRUM 0:f397b42257f8 55 _spi.frequency(hz);
MACRUM 0:f397b42257f8 56 }
MACRUM 0:f397b42257f8 57
MACRUM 0:f397b42257f8 58 void MB85RSxx_SPI::read_device_id(uint8_t* device_id)
MACRUM 0:f397b42257f8 59 {
MACRUM 0:f397b42257f8 60 _cs = 0;
MACRUM 0:f397b42257f8 61 _spi.write(MB85_RDID);
MACRUM 0:f397b42257f8 62 for (int i = 0; i < 4; i++) {
MACRUM 0:f397b42257f8 63 *device_id++ = (uint8_t)_spi.write(0);
MACRUM 0:f397b42257f8 64 }
MACRUM 0:f397b42257f8 65 _cs = 1;
MACRUM 0:f397b42257f8 66 }
MACRUM 0:f397b42257f8 67
MACRUM 0:f397b42257f8 68 uint8_t MB85RSxx_SPI::read_status()
MACRUM 0:f397b42257f8 69 {
MACRUM 0:f397b42257f8 70 _cs = 0;
MACRUM 0:f397b42257f8 71 _spi.write(MB85_RDSR);
MACRUM 0:f397b42257f8 72 uint8_t st = (uint8_t)_spi.write(0);
MACRUM 0:f397b42257f8 73 _cs = 1;
MACRUM 0:f397b42257f8 74
MACRUM 0:f397b42257f8 75 return st;
MACRUM 0:f397b42257f8 76 }
MACRUM 0:f397b42257f8 77
MACRUM 0:f397b42257f8 78 void MB85RSxx_SPI::read(uint32_t address, uint8_t* data, uint32_t length)
MACRUM 0:f397b42257f8 79 {
MACRUM 0:f397b42257f8 80 _cs = 0;
MACRUM 0:f397b42257f8 81 _spi.write(MB85_READ);
MACRUM 0:f397b42257f8 82 if (_address_bits == 24) {
MACRUM 0:f397b42257f8 83 _spi.write((uint8_t)((address >> 16) & 0xFF));
MACRUM 0:f397b42257f8 84 }
MACRUM 0:f397b42257f8 85 _spi.write((uint8_t)((address >> 8) & 0xFF));
MACRUM 0:f397b42257f8 86 _spi.write((uint8_t)((address >> 0) & 0xFF));
MACRUM 0:f397b42257f8 87 for (uint32_t i = 0; i < length; i++) {
MACRUM 0:f397b42257f8 88 *data++ = (uint8_t)_spi.write(0);
MACRUM 0:f397b42257f8 89 }
MACRUM 0:f397b42257f8 90 _cs = 1;
MACRUM 0:f397b42257f8 91 }
MACRUM 0:f397b42257f8 92
MACRUM 0:f397b42257f8 93 uint8_t MB85RSxx_SPI::read(uint32_t address)
MACRUM 0:f397b42257f8 94 {
MACRUM 0:f397b42257f8 95 uint8_t data;
MACRUM 0:f397b42257f8 96
MACRUM 0:f397b42257f8 97 _cs = 0;
MACRUM 0:f397b42257f8 98 _spi.write(MB85_READ);
MACRUM 0:f397b42257f8 99 if (_address_bits == 24) {
MACRUM 0:f397b42257f8 100 _spi.write((uint8_t)((address >> 16) & 0xFF));
MACRUM 0:f397b42257f8 101 }
MACRUM 0:f397b42257f8 102 _spi.write((uint8_t)((address >> 8) & 0xFF));
MACRUM 0:f397b42257f8 103 _spi.write((uint8_t)((address >> 0) & 0xFF));
MACRUM 0:f397b42257f8 104 data = (uint8_t)_spi.write(0);
MACRUM 0:f397b42257f8 105 _cs = 1;
MACRUM 0:f397b42257f8 106
MACRUM 0:f397b42257f8 107 return data;
MACRUM 0:f397b42257f8 108 }
MACRUM 0:f397b42257f8 109
MACRUM 0:f397b42257f8 110 void MB85RSxx_SPI::write(uint32_t address, uint8_t* data, uint32_t length)
MACRUM 0:f397b42257f8 111 {
MACRUM 0:f397b42257f8 112 _cs = 0;
MACRUM 0:f397b42257f8 113 _spi.write(MB85_WRITE);
MACRUM 0:f397b42257f8 114 if (_address_bits == 24) {
MACRUM 0:f397b42257f8 115 _spi.write((uint8_t)((address >> 16) & 0xFF));
MACRUM 0:f397b42257f8 116 }
MACRUM 0:f397b42257f8 117 _spi.write((uint8_t)((address >> 8) & 0xFF));
MACRUM 0:f397b42257f8 118 _spi.write((uint8_t)((address >> 0) & 0xFF));
MACRUM 0:f397b42257f8 119 for (uint32_t i = 0; i < length; i++) {
MACRUM 0:f397b42257f8 120 _spi.write(*data++);
MACRUM 0:f397b42257f8 121 }
MACRUM 0:f397b42257f8 122 _cs = 1;
MACRUM 0:f397b42257f8 123 }
MACRUM 0:f397b42257f8 124
MACRUM 0:f397b42257f8 125 void MB85RSxx_SPI::write(uint32_t address, uint8_t data)
MACRUM 0:f397b42257f8 126 {
MACRUM 0:f397b42257f8 127 _cs = 0;
MACRUM 0:f397b42257f8 128 _spi.write(MB85_WRITE);
MACRUM 0:f397b42257f8 129 if (_address_bits == 24) {
MACRUM 0:f397b42257f8 130 _spi.write((uint8_t)((address >> 16) & 0xFF));
MACRUM 0:f397b42257f8 131 }
MACRUM 0:f397b42257f8 132 _spi.write((uint8_t)((address >> 8) & 0xFF));
MACRUM 0:f397b42257f8 133 _spi.write((uint8_t)((address >> 0) & 0xFF));
MACRUM 0:f397b42257f8 134 _spi.write(data);
MACRUM 0:f397b42257f8 135 _cs = 1;
MACRUM 0:f397b42257f8 136 }
MACRUM 0:f397b42257f8 137
MACRUM 0:f397b42257f8 138 void MB85RSxx_SPI::fill(uint32_t address, uint8_t data, uint32_t length)
MACRUM 0:f397b42257f8 139 {
MACRUM 0:f397b42257f8 140 _cs = 0;
MACRUM 0:f397b42257f8 141 _spi.write(MB85_WRITE);
MACRUM 0:f397b42257f8 142 if (_address_bits == 24) {
MACRUM 0:f397b42257f8 143 _spi.write((uint8_t)((address >> 16) & 0xFF));
MACRUM 0:f397b42257f8 144 }
MACRUM 0:f397b42257f8 145 _spi.write((uint8_t)((address >> 8) & 0xFF));
MACRUM 0:f397b42257f8 146 _spi.write((uint8_t)((address >> 0) & 0xFF));
MACRUM 0:f397b42257f8 147 for (uint32_t i = 0; i < length; i++) {
MACRUM 0:f397b42257f8 148 _spi.write(data);
MACRUM 0:f397b42257f8 149 }
MACRUM 0:f397b42257f8 150 _cs = 1;
MACRUM 0:f397b42257f8 151 }
MACRUM 0:f397b42257f8 152
MACRUM 0:f397b42257f8 153 void MB85RSxx_SPI::write_enable()
MACRUM 0:f397b42257f8 154 {
MACRUM 0:f397b42257f8 155 _cs = 0;
MACRUM 0:f397b42257f8 156 _spi.write(MB85_WREN);
MACRUM 0:f397b42257f8 157 _cs = 1;
MACRUM 0:f397b42257f8 158 }
MACRUM 0:f397b42257f8 159
MACRUM 0:f397b42257f8 160 void MB85RSxx_SPI::write_disable()
MACRUM 0:f397b42257f8 161 {
MACRUM 0:f397b42257f8 162 _cs = 0;
MACRUM 0:f397b42257f8 163 _spi.write(MB85_WRDI);
MACRUM 0:f397b42257f8 164 _cs = 1;
MACRUM 0:f397b42257f8 165 }