Library for MCP4822 SPI 12-bit DAC, both outputs supported, nLDAC connected to GND.
MCP4822.cpp@11:96eff565b2c0, 2011-01-31 (annotated)
- Committer:
- Lerche
- Date:
- Mon Jan 31 07:22:18 2011 +0000
- Revision:
- 11:96eff565b2c0
- Parent:
- 1:5c1e0d492b59
Added .shdn() command, and write(channel, value) command
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Lerche | 0:014a10a4fed1 | 1 | /* MCP4822 library |
Lerche | 0:014a10a4fed1 | 2 | * Copyright (c) 2008-2010, Lerche |
Lerche | 0:014a10a4fed1 | 3 | * |
Lerche | 0:014a10a4fed1 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
Lerche | 0:014a10a4fed1 | 5 | * of this software and associated documentation files (the "Software"), to deal |
Lerche | 0:014a10a4fed1 | 6 | * in the Software without restriction, including without limitation the rights |
Lerche | 0:014a10a4fed1 | 7 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
Lerche | 0:014a10a4fed1 | 8 | * copies of the Software, and to permit persons to whom the Software is |
Lerche | 0:014a10a4fed1 | 9 | * furnished to do so, subject to the following conditions: |
Lerche | 0:014a10a4fed1 | 10 | * |
Lerche | 0:014a10a4fed1 | 11 | * The above copyright notice and this permission notice shall be included in |
Lerche | 0:014a10a4fed1 | 12 | * all copies or substantial portions of the Software. |
Lerche | 0:014a10a4fed1 | 13 | * |
Lerche | 0:014a10a4fed1 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
Lerche | 0:014a10a4fed1 | 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
Lerche | 0:014a10a4fed1 | 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
Lerche | 0:014a10a4fed1 | 17 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
Lerche | 0:014a10a4fed1 | 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
Lerche | 0:014a10a4fed1 | 19 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
Lerche | 0:014a10a4fed1 | 20 | * THE SOFTWARE. |
Lerche | 0:014a10a4fed1 | 21 | */ |
Lerche | 0:014a10a4fed1 | 22 | |
Lerche | 0:014a10a4fed1 | 23 | #include "mbed.h" |
Lerche | 0:014a10a4fed1 | 24 | #include "MCP4822.h" |
Lerche | 0:014a10a4fed1 | 25 | |
Lerche | 0:014a10a4fed1 | 26 | using namespace mbed; |
Lerche | 0:014a10a4fed1 | 27 | |
Lerche | 0:014a10a4fed1 | 28 | MCP4822::MCP4822(PinName mosi, PinName sclk, PinName ncs) : _spi(mosi, NC, sclk), _ncs(ncs) { |
Lerche | 0:014a10a4fed1 | 29 | _init(); |
Lerche | 0:014a10a4fed1 | 30 | } |
Lerche | 0:014a10a4fed1 | 31 | |
Lerche | 0:014a10a4fed1 | 32 | void MCP4822::_init() { |
Lerche | 0:014a10a4fed1 | 33 | _spi.format(16, 0); // Setup the SPI |
Lerche | 0:014a10a4fed1 | 34 | return; |
Lerche | 0:014a10a4fed1 | 35 | } |
Lerche | 0:014a10a4fed1 | 36 | |
Lerche | 0:014a10a4fed1 | 37 | void MCP4822::writeA(int ValueA) { |
Lerche | 0:014a10a4fed1 | 38 | ValueA = ValueA &= 0x0FFF; |
Lerche | 0:014a10a4fed1 | 39 | ValueA = ValueA |= 0x1000; // Write to A register |
Lerche | 11:96eff565b2c0 | 40 | _ncs = 0; // Chipselect the device. |
Lerche | 0:014a10a4fed1 | 41 | _spi.write(ValueA); |
Lerche | 0:014a10a4fed1 | 42 | _ncs = 1; |
Lerche | 0:014a10a4fed1 | 43 | return; |
Lerche | 0:014a10a4fed1 | 44 | } |
Lerche | 0:014a10a4fed1 | 45 | |
Lerche | 0:014a10a4fed1 | 46 | void MCP4822::writeB(int ValueB) { |
Lerche | 0:014a10a4fed1 | 47 | ValueB = ValueB &= 0x0FFF; |
Lerche | 0:014a10a4fed1 | 48 | ValueB = ValueB |= 0x9000; // Write to B register |
Lerche | 11:96eff565b2c0 | 49 | _ncs = 0; // Chipselect the device. |
Lerche | 0:014a10a4fed1 | 50 | _spi.write(ValueB); |
Lerche | 0:014a10a4fed1 | 51 | _ncs = 1; |
Lerche | 0:014a10a4fed1 | 52 | return; |
Lerche | 11:96eff565b2c0 | 53 | } |
Lerche | 11:96eff565b2c0 | 54 | |
Lerche | 11:96eff565b2c0 | 55 | void MCP4822::write(char chan, int value) { |
Lerche | 11:96eff565b2c0 | 56 | value = value &= 0x0FFF; |
Lerche | 11:96eff565b2c0 | 57 | switch(chan){ |
Lerche | 11:96eff565b2c0 | 58 | case('A'): |
Lerche | 11:96eff565b2c0 | 59 | value = value |= 0x1000; |
Lerche | 11:96eff565b2c0 | 60 | break; |
Lerche | 11:96eff565b2c0 | 61 | case('B'): |
Lerche | 11:96eff565b2c0 | 62 | value = value |= 0x9000; |
Lerche | 11:96eff565b2c0 | 63 | break; |
Lerche | 11:96eff565b2c0 | 64 | case('a'): |
Lerche | 11:96eff565b2c0 | 65 | value = value |= 0x1000; |
Lerche | 11:96eff565b2c0 | 66 | break; |
Lerche | 11:96eff565b2c0 | 67 | case('b'): |
Lerche | 11:96eff565b2c0 | 68 | value = value |= 0x9000; |
Lerche | 11:96eff565b2c0 | 69 | break; |
Lerche | 11:96eff565b2c0 | 70 | case(0x01): |
Lerche | 11:96eff565b2c0 | 71 | value = value |= 0x1000; |
Lerche | 11:96eff565b2c0 | 72 | break; |
Lerche | 11:96eff565b2c0 | 73 | case(0x02): |
Lerche | 11:96eff565b2c0 | 74 | value = value |= 0x9000; |
Lerche | 11:96eff565b2c0 | 75 | break; |
Lerche | 11:96eff565b2c0 | 76 | default: |
Lerche | 11:96eff565b2c0 | 77 | break; |
Lerche | 11:96eff565b2c0 | 78 | } |
Lerche | 11:96eff565b2c0 | 79 | _ncs = 0; |
Lerche | 11:96eff565b2c0 | 80 | _spi.write(value); |
Lerche | 11:96eff565b2c0 | 81 | _ncs = 1; |
Lerche | 11:96eff565b2c0 | 82 | return; |
Lerche | 11:96eff565b2c0 | 83 | } |
Lerche | 11:96eff565b2c0 | 84 | |
Lerche | 11:96eff565b2c0 | 85 | void MCP4822::shdn() { |
Lerche | 11:96eff565b2c0 | 86 | _ncs = 0; |
Lerche | 11:96eff565b2c0 | 87 | _spi.write(0x0000); |
Lerche | 11:96eff565b2c0 | 88 | _ncs = 1; |
Lerche | 11:96eff565b2c0 | 89 | return; |
Lerche | 11:96eff565b2c0 | 90 | } |