Library for MCP4822 SPI 12-bit DAC, both outputs supported, nLDAC connected to GND.

Dependents:   MCP4822_2aLerche

Committer:
Lerche
Date:
Fri Jan 21 10:55:58 2011 +0000
Revision:
0:014a10a4fed1
Child:
1:5c1e0d492b59
First creation, works.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Lerche 0:014a10a4fed1 1 /* MCP4822 library
Lerche 0:014a10a4fed1 2 * Copyright (c) 2008-2010, Lerche
Lerche 0:014a10a4fed1 3 *
Lerche 0:014a10a4fed1 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
Lerche 0:014a10a4fed1 5 * of this software and associated documentation files (the "Software"), to deal
Lerche 0:014a10a4fed1 6 * in the Software without restriction, including without limitation the rights
Lerche 0:014a10a4fed1 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
Lerche 0:014a10a4fed1 8 * copies of the Software, and to permit persons to whom the Software is
Lerche 0:014a10a4fed1 9 * furnished to do so, subject to the following conditions:
Lerche 0:014a10a4fed1 10 *
Lerche 0:014a10a4fed1 11 * The above copyright notice and this permission notice shall be included in
Lerche 0:014a10a4fed1 12 * all copies or substantial portions of the Software.
Lerche 0:014a10a4fed1 13 *
Lerche 0:014a10a4fed1 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Lerche 0:014a10a4fed1 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Lerche 0:014a10a4fed1 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Lerche 0:014a10a4fed1 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Lerche 0:014a10a4fed1 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Lerche 0:014a10a4fed1 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Lerche 0:014a10a4fed1 20 * THE SOFTWARE.
Lerche 0:014a10a4fed1 21 */
Lerche 0:014a10a4fed1 22
Lerche 0:014a10a4fed1 23 #include "mbed.h"
Lerche 0:014a10a4fed1 24 #include "MCP4822.h"
Lerche 0:014a10a4fed1 25
Lerche 0:014a10a4fed1 26 using namespace mbed;
Lerche 0:014a10a4fed1 27
Lerche 0:014a10a4fed1 28 MCP4822::MCP4822(PinName mosi, PinName sclk, PinName ncs) : _spi(mosi, NC, sclk), _ncs(ncs) {
Lerche 0:014a10a4fed1 29 _init();
Lerche 0:014a10a4fed1 30 }
Lerche 0:014a10a4fed1 31
Lerche 0:014a10a4fed1 32 void MCP4822::_init() {
Lerche 0:014a10a4fed1 33 _spi.format(16, 0); // Setup the SPI
Lerche 0:014a10a4fed1 34 return;
Lerche 0:014a10a4fed1 35 }
Lerche 0:014a10a4fed1 36
Lerche 0:014a10a4fed1 37 void MCP4822::writeA(int ValueA) {
Lerche 0:014a10a4fed1 38 _ncs = 0; // Chipselect the device.
Lerche 0:014a10a4fed1 39 ValueA = ValueA &= 0x0FFF;
Lerche 0:014a10a4fed1 40 ValueA = ValueA |= 0x1000; // Write to A register
Lerche 0:014a10a4fed1 41 _spi.write(ValueA);
Lerche 0:014a10a4fed1 42 _ncs = 1;
Lerche 0:014a10a4fed1 43 return;
Lerche 0:014a10a4fed1 44 }
Lerche 0:014a10a4fed1 45
Lerche 0:014a10a4fed1 46 void MCP4822::writeB(int ValueB) {
Lerche 0:014a10a4fed1 47 _ncs = 0; // Chipselect the device.
Lerche 0:014a10a4fed1 48 ValueB = ValueB &= 0x0FFF;
Lerche 0:014a10a4fed1 49 ValueB = ValueB |= 0x9000; // Write to B register
Lerche 0:014a10a4fed1 50 _spi.write(ValueB);
Lerche 0:014a10a4fed1 51 _ncs = 1;
Lerche 0:014a10a4fed1 52 return;
Lerche 0:014a10a4fed1 53 }
Lerche 0:014a10a4fed1 54
Lerche 0:014a10a4fed1 55 void MCP4822::writeAB(int ValueAB) {
Lerche 0:014a10a4fed1 56 _ncs = 0;
Lerche 0:014a10a4fed1 57 ValueAB = ValueAB &= 0x0FFF;
Lerche 0:014a10a4fed1 58 ValueAB = ValueAB |= 0x1000;
Lerche 0:014a10a4fed1 59 _spi.write(ValueAB);
Lerche 0:014a10a4fed1 60 _ncs = 1;
Lerche 0:014a10a4fed1 61 wait_us(500);
Lerche 0:014a10a4fed1 62 _ncs = 0;
Lerche 0:014a10a4fed1 63 ValueAB = ValueAB |= 0x9000;
Lerche 0:014a10a4fed1 64 _spi.write(ValueAB);
Lerche 0:014a10a4fed1 65 _ncs = 1;
Lerche 0:014a10a4fed1 66 }