Library for MCP4822 SPI 12-bit DAC, both outputs supported, nLDAC connected to GND.

Dependents:   MCP4822_2aLerche

Committer:
Lerche
Date:
Fri Jan 21 16:22:08 2011 +0000
Revision:
6:ac02ff2992fe
Parent:
5:c4acc07d6998
Child:
7:a89ef6c30783
Add documentation

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Lerche 0:014a10a4fed1 1 /* MCP4822 library
Lerche 0:014a10a4fed1 2 * Copyright (c) 2008-2010, Lerche
Lerche 0:014a10a4fed1 3 *
Lerche 0:014a10a4fed1 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
Lerche 0:014a10a4fed1 5 * of this software and associated documentation files (the "Software"), to deal
Lerche 0:014a10a4fed1 6 * in the Software without restriction, including without limitation the rights
Lerche 0:014a10a4fed1 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
Lerche 0:014a10a4fed1 8 * copies of the Software, and to permit persons to whom the Software is
Lerche 0:014a10a4fed1 9 * furnished to do so, subject to the following conditions:
Lerche 0:014a10a4fed1 10 *
Lerche 0:014a10a4fed1 11 * The above copyright notice and this permission notice shall be included in
Lerche 0:014a10a4fed1 12 * all copies or substantial portions of the Software.
Lerche 0:014a10a4fed1 13 *
Lerche 0:014a10a4fed1 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Lerche 0:014a10a4fed1 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Lerche 0:014a10a4fed1 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Lerche 0:014a10a4fed1 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Lerche 0:014a10a4fed1 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Lerche 0:014a10a4fed1 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Lerche 0:014a10a4fed1 20 * THE SOFTWARE.
Lerche 0:014a10a4fed1 21 */
Lerche 0:014a10a4fed1 22
Lerche 0:014a10a4fed1 23 #include "mbed.h"
Lerche 0:014a10a4fed1 24
Lerche 5:c4acc07d6998 25 #ifndef MCP4822_H
Lerche 5:c4acc07d6998 26 #define MCP4822_H
Lerche 0:014a10a4fed1 27
Lerche 0:014a10a4fed1 28 class MCP4822 {
Lerche 0:014a10a4fed1 29 public:
Lerche 5:c4acc07d6998 30 /** Constructor: MCP4822
Lerche 0:014a10a4fed1 31 *
Lerche 2:eb2c8b6c0b42 32 * @param SCK - The SPI clock pin
Lerche 2:eb2c8b6c0b42 33 * @param SDO - The SPI Data out pin
Lerche 2:eb2c8b6c0b42 34 * @param /CS - The ChipSelect pin
Lerche 0:014a10a4fed1 35 */
Lerche 0:014a10a4fed1 36 MCP4822 (PinName mosi, PinName sclk, PinName ncs);
Lerche 6:ac02ff2992fe 37 /** Write to the A-output, max 4095 (0xFFF) with 1 mV steps
Lerche 6:ac02ff2992fe 38 *
Lerche 2:eb2c8b6c0b42 39 * @param ValueA The value to be written
Lerche 0:014a10a4fed1 40 */
Lerche 0:014a10a4fed1 41 void writeA (int ValueA);
Lerche 6:ac02ff2992fe 42 /** Write to the B-output, max 4095 (0xFFF) with 1 mV steps
Lerche 6:ac02ff2992fe 43 *
Lerche 2:eb2c8b6c0b42 44 * @param ValueB The valkue to be written
Lerche 0:014a10a4fed1 45 */
Lerche 0:014a10a4fed1 46 void writeB (int ValueB);
Lerche 0:014a10a4fed1 47
Lerche 0:014a10a4fed1 48 private :
Lerche 0:014a10a4fed1 49 SPI _spi;
Lerche 0:014a10a4fed1 50 DigitalOut _ncs;
Lerche 0:014a10a4fed1 51 void _init();
Lerche 0:014a10a4fed1 52 };
Lerche 0:014a10a4fed1 53 }
Lerche 0:014a10a4fed1 54 #endif