fork

Dependencies:   mbed

Fork of LG by igor Apu

Committer:
Kovalev_D
Date:
Wed Sep 27 13:09:24 2017 +0000
Revision:
219:2d3475d0dd1b
Parent:
132:2c7bec5cf6fe
hnjtfgyy

Who changed what in which revision?

UserRevisionLine numberNew contents of line
igor_v 0:8ad47e2b6f00 1 /******************************************************************************
igor_v 0:8ad47e2b6f00 2 * @file: system_LPC17xx.h
igor_v 0:8ad47e2b6f00 3 * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Header File
igor_v 0:8ad47e2b6f00 4 * for the NXP LPC17xx Device Series
igor_v 0:8ad47e2b6f00 5 * @version: V1.01
igor_v 0:8ad47e2b6f00 6 * @date: 22. Jul. 2009
igor_v 0:8ad47e2b6f00 7 *----------------------------------------------------------------------------
igor_v 0:8ad47e2b6f00 8 *
igor_v 0:8ad47e2b6f00 9 * Copyright (C) 2009 ARM Limited. All rights reserved.
igor_v 0:8ad47e2b6f00 10 *
igor_v 0:8ad47e2b6f00 11 * ARM Limited (ARM) is supplying this software for use with Cortex-M3
igor_v 0:8ad47e2b6f00 12 * processor based microcontrollers. This file can be freely distributed
igor_v 0:8ad47e2b6f00 13 * within development tools that are supporting such ARM based processors.
igor_v 0:8ad47e2b6f00 14 *
igor_v 0:8ad47e2b6f00 15 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
igor_v 0:8ad47e2b6f00 16 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
igor_v 0:8ad47e2b6f00 17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
igor_v 0:8ad47e2b6f00 18 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
igor_v 0:8ad47e2b6f00 19 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
igor_v 0:8ad47e2b6f00 20 *
igor_v 0:8ad47e2b6f00 21 ******************************************************************************/
igor_v 0:8ad47e2b6f00 22
igor_v 0:8ad47e2b6f00 23
igor_v 0:8ad47e2b6f00 24 #ifndef __SYSTEM_LPC17xx_H
igor_v 0:8ad47e2b6f00 25 #define __SYSTEM_LPC17xx_H
igor_v 0:8ad47e2b6f00 26
igor_v 0:8ad47e2b6f00 27 #ifdef __cplusplus
igor_v 0:8ad47e2b6f00 28 extern "C" {
igor_v 0:8ad47e2b6f00 29 #endif
igor_v 0:8ad47e2b6f00 30
igor_v 48:8697dfe679b9 31 extern uint32_t SystemFrequency1; /*!< System Clock Frequency (Core Clock) */
Kovalev_D 132:2c7bec5cf6fe 32 extern uint32_t SystemCoreClock1;
igor_v 0:8ad47e2b6f00 33
igor_v 0:8ad47e2b6f00 34 /**
igor_v 0:8ad47e2b6f00 35 * Initialize the system
igor_v 0:8ad47e2b6f00 36 *
igor_v 0:8ad47e2b6f00 37 * @param none
igor_v 0:8ad47e2b6f00 38 * @return none
igor_v 0:8ad47e2b6f00 39 *
igor_v 0:8ad47e2b6f00 40 * @brief Setup the microcontroller system.
igor_v 0:8ad47e2b6f00 41 * Initialize the System and update the SystemFrequency variable.
igor_v 0:8ad47e2b6f00 42 */
igor_v 48:8697dfe679b9 43 extern void SystemInit1 (void);
igor_v 48:8697dfe679b9 44
igor_v 48:8697dfe679b9 45
igor_v 48:8697dfe679b9 46 extern void SystemCoreClockUpdate1 (void);
igor_v 48:8697dfe679b9 47
igor_v 0:8ad47e2b6f00 48
igor_v 0:8ad47e2b6f00 49 #ifdef __cplusplus
igor_v 0:8ad47e2b6f00 50 }
igor_v 0:8ad47e2b6f00 51 #endif
igor_v 0:8ad47e2b6f00 52
igor_v 0:8ad47e2b6f00 53 #endif /* __SYSTEM_LPC17xx_H */
igor_v 0:8ad47e2b6f00 54