Jing Qiu / Mbed 2 deprecated Pacemaker

fork the master

Dependencies:   TextLCD mbed-rtos mbed

Fork of Pacemaker by pacemaker team

main.cpp@9:5021d78ed4a0, 2014-12-01 (annotated)

Committer:
mfrede
Date:
Mon Dec 01 00:19:40 2014 +0000
Revision:
9:5021d78ed4a0
Parent:
8:ce2565cfe709
Parent:
7:98474554bb1d
Child:
10:19a2ce5660ea
merge

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mfrede 0:6d04b1860ecf 1 /*
mfrede 0:6d04b1860ecf 2 * Pacemaker MBED code
mfrede 0:6d04b1860ecf 3 *
mfrede 0:6d04b1860ecf 4 * CIS541 Embedded Systems for Life Critical Applications
mfrede 8:ce2565cfe709 5 * Author: Jing Qiu
mfrede 8:ce2565cfe709 6 * Michael Frederick
mfrede 0:6d04b1860ecf 7 *
mfrede 1:e37d0cad77e2 8 */
Jing_Qiu 3:34e9766539fe 9
mfrede 1:e37d0cad77e2 10 #include "mbed.h"
mfrede 1:e37d0cad77e2 11 #include "LPC17xx.h"
mfrede 1:e37d0cad77e2 12 #include "TextLCD.h"
mfrede 1:e37d0cad77e2 13 #include "rtos.h"
mfrede 1:e37d0cad77e2 14
Jing_Qiu 3:34e9766539fe 15 #define AVI_h 100
Jing_Qiu 3:34e9766539fe 16 #define AVI_l 30
Jing_Qiu 3:34e9766539fe 17 #define PVARP_h 500
Jing_Qiu 3:34e9766539fe 18 #define PVARP_l 150
Jing_Qiu 3:34e9766539fe 19
Jing_Qiu 3:34e9766539fe 20 #define VRP_h 500
Jing_Qiu 3:34e9766539fe 21 #define VRP_l 150
Jing_Qiu 3:34e9766539fe 22 #define BM(x) (1<<(x))
Jing_Qiu 3:34e9766539fe 23 #define PULSE_WIDTH_V 200
Jing_Qiu 3:34e9766539fe 24 #define PULSE_WIDTH_A 100
Jing_Qiu 3:34e9766539fe 25
Jing_Qiu 5:376358077dc8 26
Jing_Qiu 3:34e9766539fe 27 int LRI_h = 1666;
Jing_Qiu 3:34e9766539fe 28 int LRI_l = 666;
Jing_Qiu 5:376358077dc8 29 int observation_interval=10000; //ms
mfrede 8:ce2565cfe709 30 bool setObservation = false;
Jing_Qiu 3:34e9766539fe 31
mfrede 1:e37d0cad77e2 32 Serial pc(USBTX, USBRX);
mfrede 1:e37d0cad77e2 33 TextLCD myPanel(p15,p16,p17,p18,p19,p20,TextLCD::LCD16x2);
mfrede 1:e37d0cad77e2 34 char mode = 'N';
Jing_Qiu 3:34e9766539fe 35
mfrede 1:e37d0cad77e2 36 int a_clock;
mfrede 1:e37d0cad77e2 37 int v_clock;
mfrede 6:6bc5e65ada4e 38 bool setobservation = false;
mfrede 1:e37d0cad77e2 39
Jing_Qiu 5:376358077dc8 40 int beat;
Jing_Qiu 5:376358077dc8 41
Jing_Qiu 3:34e9766539fe 42 InterruptIn atrial_int(p17);
Jing_Qiu 3:34e9766539fe 43 InterruptIn vent_int(p18);
Jing_Qiu 3:34e9766539fe 44
Jing_Qiu 3:34e9766539fe 45 const int a_pace = 5; //pin 21 a pace output
Jing_Qiu 3:34e9766539fe 46 const int v_pace = 3; //pin 23 v pace output
Jing_Qiu 3:34e9766539fe 47
Jing_Qiu 3:34e9766539fe 48 bool aSensed = 0; // 0 means that we are expecting Apace or Asense next
Jing_Qiu 5:376358077dc8 49 DigitalOut led1(LED1); //apace
Jing_Qiu 5:376358077dc8 50 DigitalOut led2(LED2); //vpace
Jing_Qiu 5:376358077dc8 51 DigitalOut led3(LED3); //asense
Jing_Qiu 5:376358077dc8 52 DigitalOut led4(LED4); //vsense
Jing_Qiu 3:34e9766539fe 53
Jing_Qiu 3:34e9766539fe 54 void initTimer();
Jing_Qiu 3:34e9766539fe 55 void startTimer();
Jing_Qiu 3:34e9766539fe 56 void initGPIO_outputs();
Jing_Qiu 3:34e9766539fe 57 void setGPIO(const int pinName);
Jing_Qiu 3:34e9766539fe 58 void clearGPIO(const int pinName);
Jing_Qiu 3:34e9766539fe 59
Jing_Qiu 3:34e9766539fe 60 void asense();
Jing_Qiu 3:34e9766539fe 61 void vsense();
Jing_Qiu 3:34e9766539fe 62
Jing_Qiu 3:34e9766539fe 63 void apace();
Jing_Qiu 3:34e9766539fe 64 void vpace();
Jing_Qiu 3:34e9766539fe 65
Jing_Qiu 3:34e9766539fe 66
Jing_Qiu 3:34e9766539fe 67 void apace()
Jing_Qiu 3:34e9766539fe 68 {
Jing_Qiu 5:376358077dc8 69 led1 = 1;
Jing_Qiu 3:34e9766539fe 70 setGPIO(a_pace);
Jing_Qiu 3:34e9766539fe 71 wait_us(PULSE_WIDTH_A);
Jing_Qiu 5:376358077dc8 72 clearGPIO(a_pace);
mfrede 8:ce2565cfe709 73 led1 = 0;
Jing_Qiu 5:376358077dc8 74
Jing_Qiu 3:34e9766539fe 75 }
Jing_Qiu 3:34e9766539fe 76
Jing_Qiu 3:34e9766539fe 77 void vpace()
Jing_Qiu 3:34e9766539fe 78 {
Jing_Qiu 5:376358077dc8 79 led2= 1;
Jing_Qiu 3:34e9766539fe 80 setGPIO(v_pace);
Jing_Qiu 3:34e9766539fe 81 wait_us(PULSE_WIDTH_V);
Jing_Qiu 3:34e9766539fe 82 clearGPIO(v_pace);
Jing_Qiu 5:376358077dc8 83 led2 = 0;
Jing_Qiu 3:34e9766539fe 84 }
Jing_Qiu 3:34e9766539fe 85
Jing_Qiu 3:34e9766539fe 86 void initGPIO_outputs()
Jing_Qiu 3:34e9766539fe 87 {
Jing_Qiu 3:34e9766539fe 88 LPC_SC->PCONP |= 1<<15;
Jing_Qiu 3:34e9766539fe 89 LPC_GPIO2->FIODIR |= 1<<5;
Jing_Qiu 3:34e9766539fe 90 LPC_GPIO2->FIODIR |= 1<<3;
Jing_Qiu 3:34e9766539fe 91 LPC_GPIO2->FIODIR &= ~(1<<1);
Jing_Qiu 3:34e9766539fe 92 LPC_GPIO2->FIODIR &= ~(1<<2);
Jing_Qiu 3:34e9766539fe 93 }
Jing_Qiu 3:34e9766539fe 94
Jing_Qiu 3:34e9766539fe 95 void setGPIO(const int pinName)
Jing_Qiu 3:34e9766539fe 96 {
Jing_Qiu 3:34e9766539fe 97 LPC_GPIO2->FIOPIN |= (1<<pinName);
Jing_Qiu 3:34e9766539fe 98 }
Jing_Qiu 3:34e9766539fe 99
Jing_Qiu 3:34e9766539fe 100 void clearGPIO(const int pinName)
Jing_Qiu 3:34e9766539fe 101 {
Jing_Qiu 3:34e9766539fe 102 LPC_GPIO2->FIOPIN &= ~(1<<pinName);
Jing_Qiu 3:34e9766539fe 103 }
Jing_Qiu 3:34e9766539fe 104
Jing_Qiu 3:34e9766539fe 105 void initTimer()
Jing_Qiu 3:34e9766539fe 106 {
Jing_Qiu 3:34e9766539fe 107 // set up OS timer (timer0)
Jing_Qiu 3:34e9766539fe 108 LPC_SC->PCONP |= BM(1); //power up timer0
Jing_Qiu 3:34e9766539fe 109 LPC_SC->PCLKSEL0 |= BM(2); // clock = CCLK (96 MHz)
Jing_Qiu 3:34e9766539fe 110 LPC_TIM0->PR = 48000; // set prescale to 48000 (2048 Hz timer)
Jing_Qiu 3:34e9766539fe 111 LPC_TIM0->MR0 = 1; // match0 compare value (32-bit)
Jing_Qiu 3:34e9766539fe 112 LPC_TIM0->MCR |= BM(0)|BM(1); // interrupt and reset on match0 compare
Jing_Qiu 3:34e9766539fe 113 NVIC_EnableIRQ(TIMER0_IRQn); // enable timer interrupt
Jing_Qiu 3:34e9766539fe 114 }
Jing_Qiu 3:34e9766539fe 115
Jing_Qiu 3:34e9766539fe 116 void startTimer()
Jing_Qiu 3:34e9766539fe 117 {
Jing_Qiu 3:34e9766539fe 118 LPC_TIM0->TCR |= BM(1); // reset timer1
Jing_Qiu 3:34e9766539fe 119 LPC_TIM0->TCR &= ~BM(1); // release reset
Jing_Qiu 3:34e9766539fe 120 LPC_TIM0->TCR |= BM(0); // start timer
Jing_Qiu 3:34e9766539fe 121 }
Jing_Qiu 3:34e9766539fe 122
Jing_Qiu 3:34e9766539fe 123 void resetTimer()
Jing_Qiu 3:34e9766539fe 124 {
Jing_Qiu 3:34e9766539fe 125 LPC_TIM0->TCR |= BM(1); // reset timer0
Jing_Qiu 3:34e9766539fe 126 LPC_TIM0->TCR &= ~BM(1); // release reset
Jing_Qiu 3:34e9766539fe 127 }
Jing_Qiu 3:34e9766539fe 128
Jing_Qiu 3:34e9766539fe 129
Jing_Qiu 3:34e9766539fe 130
mfrede 1:e37d0cad77e2 131 void display_thread_handler(void const *args)
mfrede 1:e37d0cad77e2 132 {
mfrede 1:e37d0cad77e2 133 while(1)
mfrede 1:e37d0cad77e2 134 {
Jing_Qiu 5:376358077dc8 135 wait_ms(observation_interval);
Jing_Qiu 5:376358077dc8 136 myPanel.printf("BPM: %d\r\n", beat/observation_interval * 60);
Jing_Qiu 5:376358077dc8 137 beat=0;
mfrede 1:e37d0cad77e2 138 }
mfrede 1:e37d0cad77e2 139 }
mfrede 1:e37d0cad77e2 140
mfrede 1:e37d0cad77e2 141
mfrede 1:e37d0cad77e2 142 void asense() {
Jing_Qiu 3:34e9766539fe 143 if (v_clock >= VRP_l) { //Ignore vSense outside this time interval
Jing_Qiu 3:34e9766539fe 144 v_clock = 0;
Jing_Qiu 3:34e9766539fe 145 aSensed = 0;
Jing_Qiu 3:34e9766539fe 146 }
Jing_Qiu 5:376358077dc8 147 led3 = 1;
Jing_Qiu 5:376358077dc8 148
mfrede 1:e37d0cad77e2 149 }
mfrede 1:e37d0cad77e2 150
mfrede 1:e37d0cad77e2 151 void vsense() {
Jing_Qiu 3:34e9766539fe 152 if ((v_clock >= PVARP_l) && aSensed == 0){
Jing_Qiu 3:34e9766539fe 153 a_clock = 0;
Jing_Qiu 3:34e9766539fe 154 aSensed = 1;
Jing_Qiu 5:376358077dc8 155 beat++;
Jing_Qiu 3:34e9766539fe 156 }
Jing_Qiu 5:376358077dc8 157 led4 = 1;
mfrede 1:e37d0cad77e2 158 }
mfrede 1:e37d0cad77e2 159
mfrede 1:e37d0cad77e2 160 void button_handler(void const *args)
mfrede 1:e37d0cad77e2 161 {
mfrede 8:ce2565cfe709 162 int observation_temp=0;
mfrede 1:e37d0cad77e2 163 while(1)
mfrede 1:e37d0cad77e2 164 {
mfrede 1:e37d0cad77e2 165 char buffer;
mfrede 1:e37d0cad77e2 166 if(pc.readable()) {
mfrede 1:e37d0cad77e2 167 buffer = pc.getc();
mfrede 1:e37d0cad77e2 168 if (buffer == 'N')
mfrede 1:e37d0cad77e2 169 mode = buffer;
mfrede 1:e37d0cad77e2 170 else if (buffer == 'S')
mfrede 1:e37d0cad77e2 171 mode = buffer;
mfrede 1:e37d0cad77e2 172 else if (buffer == 'E')
mfrede 1:e37d0cad77e2 173 mode = buffer;
mfrede 1:e37d0cad77e2 174 else if (buffer == 'M')
mfrede 1:e37d0cad77e2 175 mode = buffer;
mfrede 1:e37d0cad77e2 176 else if (buffer == 'A' && mode == 'M')
mfrede 1:e37d0cad77e2 177 apace();
mfrede 1:e37d0cad77e2 178 else if (buffer == 'V' && mode == 'M')
mfrede 1:e37d0cad77e2 179 vpace();
mfrede 8:ce2565cfe709 180 else if (buffer == 'O') {
mfrede 8:ce2565cfe709 181 setObservation = true;
mfrede 8:ce2565cfe709 182 observation_temp = 0;
mfrede 8:ce2565cfe709 183 }
mfrede 1:e37d0cad77e2 184 else if (buffer == '\n')
mfrede 6:6bc5e65ada4e 185 {
mfrede 8:ce2565cfe709 186 observation_interval = observation_temp*1000;
mfrede 8:ce2565cfe709 187 setObservation = false;
mfrede 6:6bc5e65ada4e 188 }
mfrede 8:ce2565cfe709 189 else if (setObservation)
mfrede 6:6bc5e65ada4e 190 {
mfrede 8:ce2565cfe709 191 observation_temp *= 10;
mfrede 8:ce2565cfe709 192 observation_temp += (int) buffer;
mfrede 1:e37d0cad77e2 193
mfrede 6:6bc5e65ada4e 194 }
mfrede 1:e37d0cad77e2 195 }
mfrede 1:e37d0cad77e2 196 }
mfrede 1:e37d0cad77e2 197 }
mfrede 1:e37d0cad77e2 198
Jing_Qiu 3:34e9766539fe 199 void pacemaker_thread_handler(void const *args)
Jing_Qiu 3:34e9766539fe 200 {
Jing_Qiu 3:34e9766539fe 201 initGPIO_outputs();
Jing_Qiu 3:34e9766539fe 202
Jing_Qiu 3:34e9766539fe 203 /**********************************************************
Jing_Qiu 3:34e9766539fe 204 ************Initialize timer to interrupt every 1 ms*********
Jing_Qiu 3:34e9766539fe 205 ***********************************************************/
Jing_Qiu 3:34e9766539fe 206
Jing_Qiu 3:34e9766539fe 207 initTimer();
Jing_Qiu 3:34e9766539fe 208 startTimer();
Jing_Qiu 3:34e9766539fe 209
Jing_Qiu 3:34e9766539fe 210 atrial_int.rise(&asense);
Jing_Qiu 3:34e9766539fe 211 vent_int.rise(&vsense);
Jing_Qiu 3:34e9766539fe 212 while(1){}
Jing_Qiu 3:34e9766539fe 213
Jing_Qiu 3:34e9766539fe 214 }
Jing_Qiu 3:34e9766539fe 215
Jing_Qiu 3:34e9766539fe 216
Jing_Qiu 3:34e9766539fe 217 /**********************************************************
Jing_Qiu 3:34e9766539fe 218 ************ timer interrupt every 1 ms*********
Jing_Qiu 3:34e9766539fe 219 ***********************************************************/
Jing_Qiu 3:34e9766539fe 220
Jing_Qiu 3:34e9766539fe 221 extern "C" void TIMER0_IRQHandler (void) {
Jing_Qiu 3:34e9766539fe 222 if((LPC_TIM0->IR & 0x01) == 0x01) // if MR0 interrupt
Jing_Qiu 3:34e9766539fe 223 {
Jing_Qiu 3:34e9766539fe 224 LPC_TIM0->IR |= (1 << 0); // Clear MR0 interrupt flag
Jing_Qiu 3:34e9766539fe 225 if (v_clock >= (LRI_h-AVI_l) && aSensed == 0) {
Jing_Qiu 3:34e9766539fe 226 a_clock = 0;
Jing_Qiu 3:34e9766539fe 227 aSensed = 1;
Jing_Qiu 5:376358077dc8 228 beat++;
Jing_Qiu 3:34e9766539fe 229 //printf("Apace %d\r\n",v_clk);
Jing_Qiu 3:34e9766539fe 230 apace();
Jing_Qiu 3:34e9766539fe 231 /*
Jing_Qiu 3:34e9766539fe 232 setGPIO(a_pace);
Jing_Qiu 3:34e9766539fe 233 wait_us(PULSE_WIDTH_A);
Jing_Qiu 3:34e9766539fe 234 clearGPIO(a_pace);
Jing_Qiu 3:34e9766539fe 235 */
Jing_Qiu 3:34e9766539fe 236 }
Jing_Qiu 3:34e9766539fe 237 if ((a_clock >= AVI_h) && aSensed == 1) {
Jing_Qiu 3:34e9766539fe 238 v_clock = 0;
Jing_Qiu 3:34e9766539fe 239 aSensed = 0;
Jing_Qiu 5:376358077dc8 240 //led3 = 0;
Jing_Qiu 3:34e9766539fe 241 //printf("Vpace %d\r\n",a_clk);
Jing_Qiu 3:34e9766539fe 242 /*
Jing_Qiu 3:34e9766539fe 243 setGPIO(v_pace);
Jing_Qiu 3:34e9766539fe 244 wait_us(PULSE_WIDTH_V);
Jing_Qiu 3:34e9766539fe 245 clearGPIO(v_pace);
Jing_Qiu 3:34e9766539fe 246 */
Jing_Qiu 3:34e9766539fe 247 vpace();
Jing_Qiu 3:34e9766539fe 248 }
Jing_Qiu 3:34e9766539fe 249 v_clock++;
Jing_Qiu 3:34e9766539fe 250 a_clock++;
Jing_Qiu 5:376358077dc8 251
Jing_Qiu 5:376358077dc8 252 if(v_clock>500) led3 = 0;
Jing_Qiu 5:376358077dc8 253 if(a_clock>500) led4 = 0;
Jing_Qiu 3:34e9766539fe 254 }
Jing_Qiu 3:34e9766539fe 255 }
mfrede 1:e37d0cad77e2 256
mfrede 1:e37d0cad77e2 257
Jing_Qiu 3:34e9766539fe 258 int main (void) {
Jing_Qiu 3:34e9766539fe 259 //TODO set parameters
Jing_Qiu 5:376358077dc8 260
Jing_Qiu 3:34e9766539fe 261
Jing_Qiu 3:34e9766539fe 262 Thread display(display_thread_handler);
Jing_Qiu 3:34e9766539fe 263 Thread keyboard(button_handler);
Jing_Qiu 3:34e9766539fe 264 Thread pacemaker(pacemaker_thread_handler);
Jing_Qiu 3:34e9766539fe 265
Jing_Qiu 3:34e9766539fe 266 while(1){}
Jing_Qiu 3:34e9766539fe 267
Jing_Qiu 3:34e9766539fe 268
mfrede 1:e37d0cad77e2 269 }