fork the master

Dependencies:   TextLCD mbed-rtos mbed

Fork of Pacemaker by pacemaker team

Committer:
Jing_Qiu
Date:
Sat Nov 29 21:21:59 2014 +0000
Revision:
5:376358077dc8
Parent:
4:cce9946d9dcd
Child:
8:ce2565cfe709
third commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mfrede 0:6d04b1860ecf 1 /*
mfrede 0:6d04b1860ecf 2 * Pacemaker MBED code
mfrede 0:6d04b1860ecf 3 *
mfrede 0:6d04b1860ecf 4 * CIS541 Embedded Systems for Life Critical Applications
Jing_Qiu 4:cce9946d9dcd 5 * Author: Jing
mfrede 0:6d04b1860ecf 6 *
mfrede 1:e37d0cad77e2 7 */
Jing_Qiu 3:34e9766539fe 8
mfrede 1:e37d0cad77e2 9 #include "mbed.h"
mfrede 1:e37d0cad77e2 10 #include "LPC17xx.h"
mfrede 1:e37d0cad77e2 11 #include "TextLCD.h"
mfrede 1:e37d0cad77e2 12 #include "rtos.h"
mfrede 1:e37d0cad77e2 13
Jing_Qiu 3:34e9766539fe 14 #define AVI_h 100
Jing_Qiu 3:34e9766539fe 15 #define AVI_l 30
Jing_Qiu 3:34e9766539fe 16 #define PVARP_h 500
Jing_Qiu 3:34e9766539fe 17 #define PVARP_l 150
Jing_Qiu 3:34e9766539fe 18
Jing_Qiu 3:34e9766539fe 19 #define VRP_h 500
Jing_Qiu 3:34e9766539fe 20 #define VRP_l 150
Jing_Qiu 3:34e9766539fe 21 #define BM(x) (1<<(x))
Jing_Qiu 3:34e9766539fe 22 #define PULSE_WIDTH_V 200
Jing_Qiu 3:34e9766539fe 23 #define PULSE_WIDTH_A 100
Jing_Qiu 3:34e9766539fe 24
Jing_Qiu 5:376358077dc8 25
Jing_Qiu 3:34e9766539fe 26 int LRI_h = 1666;
Jing_Qiu 3:34e9766539fe 27 int LRI_l = 666;
Jing_Qiu 5:376358077dc8 28 int observation_interval=10000; //ms
Jing_Qiu 3:34e9766539fe 29
mfrede 1:e37d0cad77e2 30 Serial pc(USBTX, USBRX);
mfrede 1:e37d0cad77e2 31 TextLCD myPanel(p15,p16,p17,p18,p19,p20,TextLCD::LCD16x2);
mfrede 1:e37d0cad77e2 32 char mode = 'N';
Jing_Qiu 3:34e9766539fe 33
mfrede 1:e37d0cad77e2 34 int a_clock;
mfrede 1:e37d0cad77e2 35 int v_clock;
mfrede 1:e37d0cad77e2 36
Jing_Qiu 5:376358077dc8 37 int beat;
Jing_Qiu 5:376358077dc8 38
Jing_Qiu 3:34e9766539fe 39 InterruptIn atrial_int(p17);
Jing_Qiu 3:34e9766539fe 40 InterruptIn vent_int(p18);
Jing_Qiu 3:34e9766539fe 41
Jing_Qiu 3:34e9766539fe 42 const int a_pace = 5; //pin 21 a pace output
Jing_Qiu 3:34e9766539fe 43 const int v_pace = 3; //pin 23 v pace output
Jing_Qiu 3:34e9766539fe 44
Jing_Qiu 3:34e9766539fe 45 bool aSensed = 0; // 0 means that we are expecting Apace or Asense next
Jing_Qiu 5:376358077dc8 46 DigitalOut led1(LED1); //apace
Jing_Qiu 5:376358077dc8 47 DigitalOut led2(LED2); //vpace
Jing_Qiu 5:376358077dc8 48 DigitalOut led3(LED3); //asense
Jing_Qiu 5:376358077dc8 49 DigitalOut led4(LED4); //vsense
Jing_Qiu 3:34e9766539fe 50
Jing_Qiu 3:34e9766539fe 51 void initTimer();
Jing_Qiu 3:34e9766539fe 52 void startTimer();
Jing_Qiu 3:34e9766539fe 53 void initGPIO_outputs();
Jing_Qiu 3:34e9766539fe 54 void setGPIO(const int pinName);
Jing_Qiu 3:34e9766539fe 55 void clearGPIO(const int pinName);
Jing_Qiu 3:34e9766539fe 56
Jing_Qiu 3:34e9766539fe 57 void asense();
Jing_Qiu 3:34e9766539fe 58 void vsense();
Jing_Qiu 3:34e9766539fe 59
Jing_Qiu 3:34e9766539fe 60 void apace();
Jing_Qiu 3:34e9766539fe 61 void vpace();
Jing_Qiu 3:34e9766539fe 62
Jing_Qiu 3:34e9766539fe 63
Jing_Qiu 3:34e9766539fe 64 void apace()
Jing_Qiu 3:34e9766539fe 65 {
Jing_Qiu 5:376358077dc8 66 led1 = 1;
Jing_Qiu 3:34e9766539fe 67 setGPIO(a_pace);
Jing_Qiu 3:34e9766539fe 68 wait_us(PULSE_WIDTH_A);
Jing_Qiu 5:376358077dc8 69 clearGPIO(a_pace);
Jing_Qiu 5:376358077dc8 70 led = 0;
Jing_Qiu 5:376358077dc8 71
Jing_Qiu 3:34e9766539fe 72 }
Jing_Qiu 3:34e9766539fe 73
Jing_Qiu 3:34e9766539fe 74 void vpace()
Jing_Qiu 3:34e9766539fe 75 {
Jing_Qiu 5:376358077dc8 76 led2= 1;
Jing_Qiu 3:34e9766539fe 77 setGPIO(v_pace);
Jing_Qiu 3:34e9766539fe 78 wait_us(PULSE_WIDTH_V);
Jing_Qiu 3:34e9766539fe 79 clearGPIO(v_pace);
Jing_Qiu 5:376358077dc8 80 led2 = 0;
Jing_Qiu 3:34e9766539fe 81 }
Jing_Qiu 3:34e9766539fe 82
Jing_Qiu 3:34e9766539fe 83 void initGPIO_outputs()
Jing_Qiu 3:34e9766539fe 84 {
Jing_Qiu 3:34e9766539fe 85 LPC_SC->PCONP |= 1<<15;
Jing_Qiu 3:34e9766539fe 86 LPC_GPIO2->FIODIR |= 1<<5;
Jing_Qiu 3:34e9766539fe 87 LPC_GPIO2->FIODIR |= 1<<3;
Jing_Qiu 3:34e9766539fe 88 LPC_GPIO2->FIODIR &= ~(1<<1);
Jing_Qiu 3:34e9766539fe 89 LPC_GPIO2->FIODIR &= ~(1<<2);
Jing_Qiu 3:34e9766539fe 90 }
Jing_Qiu 3:34e9766539fe 91
Jing_Qiu 3:34e9766539fe 92 void setGPIO(const int pinName)
Jing_Qiu 3:34e9766539fe 93 {
Jing_Qiu 3:34e9766539fe 94 LPC_GPIO2->FIOPIN |= (1<<pinName);
Jing_Qiu 3:34e9766539fe 95 }
Jing_Qiu 3:34e9766539fe 96
Jing_Qiu 3:34e9766539fe 97 void clearGPIO(const int pinName)
Jing_Qiu 3:34e9766539fe 98 {
Jing_Qiu 3:34e9766539fe 99 LPC_GPIO2->FIOPIN &= ~(1<<pinName);
Jing_Qiu 3:34e9766539fe 100 }
Jing_Qiu 3:34e9766539fe 101
Jing_Qiu 3:34e9766539fe 102 void initTimer()
Jing_Qiu 3:34e9766539fe 103 {
Jing_Qiu 3:34e9766539fe 104 // set up OS timer (timer0)
Jing_Qiu 3:34e9766539fe 105 LPC_SC->PCONP |= BM(1); //power up timer0
Jing_Qiu 3:34e9766539fe 106 LPC_SC->PCLKSEL0 |= BM(2); // clock = CCLK (96 MHz)
Jing_Qiu 3:34e9766539fe 107 LPC_TIM0->PR = 48000; // set prescale to 48000 (2048 Hz timer)
Jing_Qiu 3:34e9766539fe 108 LPC_TIM0->MR0 = 1; // match0 compare value (32-bit)
Jing_Qiu 3:34e9766539fe 109 LPC_TIM0->MCR |= BM(0)|BM(1); // interrupt and reset on match0 compare
Jing_Qiu 3:34e9766539fe 110 NVIC_EnableIRQ(TIMER0_IRQn); // enable timer interrupt
Jing_Qiu 3:34e9766539fe 111 }
Jing_Qiu 3:34e9766539fe 112
Jing_Qiu 3:34e9766539fe 113 void startTimer()
Jing_Qiu 3:34e9766539fe 114 {
Jing_Qiu 3:34e9766539fe 115 LPC_TIM0->TCR |= BM(1); // reset timer1
Jing_Qiu 3:34e9766539fe 116 LPC_TIM0->TCR &= ~BM(1); // release reset
Jing_Qiu 3:34e9766539fe 117 LPC_TIM0->TCR |= BM(0); // start timer
Jing_Qiu 3:34e9766539fe 118 }
Jing_Qiu 3:34e9766539fe 119
Jing_Qiu 3:34e9766539fe 120 void resetTimer()
Jing_Qiu 3:34e9766539fe 121 {
Jing_Qiu 3:34e9766539fe 122 LPC_TIM0->TCR |= BM(1); // reset timer0
Jing_Qiu 3:34e9766539fe 123 LPC_TIM0->TCR &= ~BM(1); // release reset
Jing_Qiu 3:34e9766539fe 124 }
Jing_Qiu 3:34e9766539fe 125
Jing_Qiu 3:34e9766539fe 126
Jing_Qiu 3:34e9766539fe 127
mfrede 1:e37d0cad77e2 128 void display_thread_handler(void const *args)
mfrede 1:e37d0cad77e2 129 {
mfrede 1:e37d0cad77e2 130 while(1)
mfrede 1:e37d0cad77e2 131 {
Jing_Qiu 5:376358077dc8 132 wait_ms(observation_interval);
Jing_Qiu 5:376358077dc8 133 myPanel.printf("BPM: %d\r\n", beat/observation_interval * 60);
Jing_Qiu 5:376358077dc8 134 beat=0;
mfrede 1:e37d0cad77e2 135 }
mfrede 1:e37d0cad77e2 136 }
mfrede 1:e37d0cad77e2 137
mfrede 1:e37d0cad77e2 138
mfrede 1:e37d0cad77e2 139 void asense() {
Jing_Qiu 3:34e9766539fe 140 if (v_clock >= VRP_l) { //Ignore vSense outside this time interval
Jing_Qiu 3:34e9766539fe 141 v_clock = 0;
Jing_Qiu 3:34e9766539fe 142 aSensed = 0;
Jing_Qiu 3:34e9766539fe 143 }
Jing_Qiu 5:376358077dc8 144 led3 = 1;
Jing_Qiu 5:376358077dc8 145
mfrede 1:e37d0cad77e2 146 }
mfrede 1:e37d0cad77e2 147
mfrede 1:e37d0cad77e2 148 void vsense() {
Jing_Qiu 3:34e9766539fe 149 if ((v_clock >= PVARP_l) && aSensed == 0){
Jing_Qiu 3:34e9766539fe 150 a_clock = 0;
Jing_Qiu 3:34e9766539fe 151 aSensed = 1;
Jing_Qiu 5:376358077dc8 152 beat++;
Jing_Qiu 3:34e9766539fe 153 }
Jing_Qiu 5:376358077dc8 154 led4 = 1;
mfrede 1:e37d0cad77e2 155 }
mfrede 1:e37d0cad77e2 156
mfrede 1:e37d0cad77e2 157 void button_handler(void const *args)
mfrede 1:e37d0cad77e2 158 {
mfrede 1:e37d0cad77e2 159 while(1)
mfrede 1:e37d0cad77e2 160 {
mfrede 1:e37d0cad77e2 161 char buffer;
mfrede 1:e37d0cad77e2 162 if(pc.readable()) {
mfrede 1:e37d0cad77e2 163 buffer = pc.getc();
mfrede 1:e37d0cad77e2 164 if (buffer == 'N')
mfrede 1:e37d0cad77e2 165 mode = buffer;
mfrede 1:e37d0cad77e2 166 else if (buffer == 'S')
mfrede 1:e37d0cad77e2 167 mode = buffer;
mfrede 1:e37d0cad77e2 168 else if (buffer == 'E')
mfrede 1:e37d0cad77e2 169 mode = buffer;
mfrede 1:e37d0cad77e2 170 else if (buffer == 'M')
mfrede 1:e37d0cad77e2 171 mode = buffer;
mfrede 1:e37d0cad77e2 172 else if (buffer == 'A' && mode == 'M')
mfrede 1:e37d0cad77e2 173 apace();
mfrede 1:e37d0cad77e2 174 else if (buffer == 'V' && mode == 'M')
mfrede 1:e37d0cad77e2 175 vpace();
Jing_Qiu 3:34e9766539fe 176 //else if (buffer == 'O');
Jing_Qiu 3:34e9766539fe 177 //setobervation
Jing_Qiu 3:34e9766539fe 178 //else if (buffer == '\n');
mfrede 1:e37d0cad77e2 179
Jing_Qiu 3:34e9766539fe 180 //else
mfrede 1:e37d0cad77e2 181
mfrede 1:e37d0cad77e2 182 }
mfrede 1:e37d0cad77e2 183 }
mfrede 1:e37d0cad77e2 184 }
mfrede 1:e37d0cad77e2 185
Jing_Qiu 3:34e9766539fe 186 void pacemaker_thread_handler(void const *args)
Jing_Qiu 3:34e9766539fe 187 {
Jing_Qiu 3:34e9766539fe 188 initGPIO_outputs();
Jing_Qiu 3:34e9766539fe 189
Jing_Qiu 3:34e9766539fe 190 /**********************************************************
Jing_Qiu 3:34e9766539fe 191 ************Initialize timer to interrupt every 1 ms*********
Jing_Qiu 3:34e9766539fe 192 ***********************************************************/
Jing_Qiu 3:34e9766539fe 193
Jing_Qiu 3:34e9766539fe 194 initTimer();
Jing_Qiu 3:34e9766539fe 195 startTimer();
Jing_Qiu 3:34e9766539fe 196
Jing_Qiu 3:34e9766539fe 197 atrial_int.rise(&asense);
Jing_Qiu 3:34e9766539fe 198 vent_int.rise(&vsense);
Jing_Qiu 3:34e9766539fe 199 while(1){}
Jing_Qiu 3:34e9766539fe 200
Jing_Qiu 3:34e9766539fe 201 }
Jing_Qiu 3:34e9766539fe 202
Jing_Qiu 3:34e9766539fe 203
Jing_Qiu 3:34e9766539fe 204 /**********************************************************
Jing_Qiu 3:34e9766539fe 205 ************ timer interrupt every 1 ms*********
Jing_Qiu 3:34e9766539fe 206 ***********************************************************/
Jing_Qiu 3:34e9766539fe 207
Jing_Qiu 3:34e9766539fe 208 extern "C" void TIMER0_IRQHandler (void) {
Jing_Qiu 3:34e9766539fe 209 if((LPC_TIM0->IR & 0x01) == 0x01) // if MR0 interrupt
Jing_Qiu 3:34e9766539fe 210 {
Jing_Qiu 3:34e9766539fe 211 LPC_TIM0->IR |= (1 << 0); // Clear MR0 interrupt flag
Jing_Qiu 3:34e9766539fe 212 if (v_clock >= (LRI_h-AVI_l) && aSensed == 0) {
Jing_Qiu 3:34e9766539fe 213 a_clock = 0;
Jing_Qiu 3:34e9766539fe 214 aSensed = 1;
Jing_Qiu 5:376358077dc8 215 beat++;
Jing_Qiu 3:34e9766539fe 216 //printf("Apace %d\r\n",v_clk);
Jing_Qiu 3:34e9766539fe 217 apace();
Jing_Qiu 3:34e9766539fe 218 /*
Jing_Qiu 3:34e9766539fe 219 setGPIO(a_pace);
Jing_Qiu 3:34e9766539fe 220 wait_us(PULSE_WIDTH_A);
Jing_Qiu 3:34e9766539fe 221 clearGPIO(a_pace);
Jing_Qiu 3:34e9766539fe 222 */
Jing_Qiu 3:34e9766539fe 223 }
Jing_Qiu 3:34e9766539fe 224 if ((a_clock >= AVI_h) && aSensed == 1) {
Jing_Qiu 3:34e9766539fe 225 v_clock = 0;
Jing_Qiu 3:34e9766539fe 226 aSensed = 0;
Jing_Qiu 5:376358077dc8 227 //led3 = 0;
Jing_Qiu 3:34e9766539fe 228 //printf("Vpace %d\r\n",a_clk);
Jing_Qiu 3:34e9766539fe 229 /*
Jing_Qiu 3:34e9766539fe 230 setGPIO(v_pace);
Jing_Qiu 3:34e9766539fe 231 wait_us(PULSE_WIDTH_V);
Jing_Qiu 3:34e9766539fe 232 clearGPIO(v_pace);
Jing_Qiu 3:34e9766539fe 233 */
Jing_Qiu 3:34e9766539fe 234 vpace();
Jing_Qiu 3:34e9766539fe 235 }
Jing_Qiu 3:34e9766539fe 236 v_clock++;
Jing_Qiu 3:34e9766539fe 237 a_clock++;
Jing_Qiu 5:376358077dc8 238
Jing_Qiu 5:376358077dc8 239 if(v_clock>500) led3 = 0;
Jing_Qiu 5:376358077dc8 240 if(a_clock>500) led4 = 0;
Jing_Qiu 3:34e9766539fe 241 }
Jing_Qiu 3:34e9766539fe 242 }
mfrede 1:e37d0cad77e2 243
mfrede 1:e37d0cad77e2 244
Jing_Qiu 3:34e9766539fe 245 int main (void) {
Jing_Qiu 3:34e9766539fe 246 //TODO set parameters
Jing_Qiu 5:376358077dc8 247
Jing_Qiu 3:34e9766539fe 248
Jing_Qiu 3:34e9766539fe 249 Thread display(display_thread_handler);
Jing_Qiu 3:34e9766539fe 250 Thread keyboard(button_handler);
Jing_Qiu 3:34e9766539fe 251 Thread pacemaker(pacemaker_thread_handler);
Jing_Qiu 3:34e9766539fe 252
Jing_Qiu 3:34e9766539fe 253 while(1){}
Jing_Qiu 3:34e9766539fe 254
Jing_Qiu 3:34e9766539fe 255
mfrede 1:e37d0cad77e2 256 }