Workshop example
Dependencies: X_NUCLEO_COMMON ST_INTERFACES
VL53L0X_device.h
00001 /******************************************************************************* 00002 Copyright © 2016, STMicroelectronics International N.V. 00003 All rights reserved. 00004 00005 Redistribution and use in source and binary forms, with or without 00006 modification, are permitted provided that the following conditions are met: 00007 * Redistributions of source code must retain the above copyright 00008 notice, this list of conditions and the following disclaimer. 00009 * Redistributions in binary form must reproduce the above copyright 00010 notice, this list of conditions and the following disclaimer in the 00011 documentation and/or other materials provided with the distribution. 00012 * Neither the name of STMicroelectronics nor the 00013 names of its contributors may be used to endorse or promote products 00014 derived from this software without specific prior written permission. 00015 00016 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 00017 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 00018 WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND 00019 NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS ARE DISCLAIMED. 00020 IN NO EVENT SHALL STMICROELECTRONICS INTERNATIONAL N.V. BE LIABLE FOR ANY 00021 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 00022 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00023 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 00024 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00025 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 00026 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00027 *******************************************************************************/ 00028 00029 /** 00030 * Device specific defines. To be adapted by implementer for the targeted 00031 * device. 00032 */ 00033 00034 #ifndef _VL53L0X_DEVICE_H_ 00035 #define _VL53L0X_DEVICE_H_ 00036 00037 #include "VL53L0X_types.h" 00038 00039 00040 /** @defgroup VL53L0X_DevSpecDefines_group VL53L0X cut1.1 Device Specific Defines 00041 * @brief VL53L0X cut1.1 Device Specific Defines 00042 * @{ 00043 */ 00044 00045 00046 /** @defgroup VL53L0X_DeviceError_group Device Error 00047 * @brief Device Error code 00048 * 00049 * This enum is Device specific it should be updated in the implementation 00050 * Use @a VL53L0X_GetStatusErrorString() to get the string. 00051 * It is related to Status Register of the Device. 00052 * @{ 00053 */ 00054 typedef uint8_t VL53L0X_DeviceError; 00055 00056 #define VL53L0X_DEVICEERROR_NONE ((VL53L0X_DeviceError) 0) 00057 /*!< 0 NoError */ 00058 #define VL53L0X_DEVICEERROR_VCSELCONTINUITYTESTFAILURE ((VL53L0X_DeviceError) 1) 00059 #define VL53L0X_DEVICEERROR_VCSELWATCHDOGTESTFAILURE ((VL53L0X_DeviceError) 2) 00060 #define VL53L0X_DEVICEERROR_NOVHVVALUEFOUND ((VL53L0X_DeviceError) 3) 00061 #define VL53L0X_DEVICEERROR_MSRCNOTARGET ((VL53L0X_DeviceError) 4) 00062 #define VL53L0X_DEVICEERROR_SNRCHECK ((VL53L0X_DeviceError) 5) 00063 #define VL53L0X_DEVICEERROR_RANGEPHASECHECK ((VL53L0X_DeviceError) 6) 00064 #define VL53L0X_DEVICEERROR_SIGMATHRESHOLDCHECK ((VL53L0X_DeviceError) 7) 00065 #define VL53L0X_DEVICEERROR_TCC ((VL53L0X_DeviceError) 8) 00066 #define VL53L0X_DEVICEERROR_PHASECONSISTENCY ((VL53L0X_DeviceError) 9) 00067 #define VL53L0X_DEVICEERROR_MINCLIP ((VL53L0X_DeviceError) 10) 00068 #define VL53L0X_DEVICEERROR_RANGECOMPLETE ((VL53L0X_DeviceError) 11) 00069 #define VL53L0X_DEVICEERROR_ALGOUNDERFLOW ((VL53L0X_DeviceError) 12) 00070 #define VL53L0X_DEVICEERROR_ALGOOVERFLOW ((VL53L0X_DeviceError) 13) 00071 #define VL53L0X_DEVICEERROR_RANGEIGNORETHRESHOLD ((VL53L0X_DeviceError) 14) 00072 00073 /** @} end of VL53L0X_DeviceError_group */ 00074 00075 00076 /** @defgroup VL53L0X_CheckEnable_group Check Enable list 00077 * @brief Check Enable code 00078 * 00079 * Define used to specify the LimitCheckId. 00080 * Use @a VL53L0X_GetLimitCheckInfo() to get the string. 00081 * @{ 00082 */ 00083 00084 #define VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE 0 00085 #define VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE 1 00086 #define VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP 2 00087 #define VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD 3 00088 #define VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC 4 00089 #define VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE 5 00090 00091 #define VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS 6 00092 00093 /** @} end of VL53L0X_CheckEnable_group */ 00094 00095 00096 /** @defgroup VL53L0X_GpioFunctionality_group Gpio Functionality 00097 * @brief Defines the different functionalities for the device GPIO(s) 00098 * @{ 00099 */ 00100 typedef uint8_t VL53L0X_GpioFunctionality; 00101 00102 #define VL53L0X_GPIOFUNCTIONALITY_OFF \ 00103 ((VL53L0X_GpioFunctionality) 0) /*!< NO Interrupt */ 00104 #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_LOW \ 00105 ((VL53L0X_GpioFunctionality) 1) /*!< Level Low (value < thresh_low) */ 00106 #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_HIGH \ 00107 ((VL53L0X_GpioFunctionality) 2) /*!< Level High (value > thresh_high) */ 00108 #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_OUT \ 00109 ((VL53L0X_GpioFunctionality) 3) 00110 /*!< Out Of Window (value < thresh_low OR value > thresh_high) */ 00111 #define VL53L0X_GPIOFUNCTIONALITY_NEW_MEASURE_READY \ 00112 ((VL53L0X_GpioFunctionality) 4) /*!< New Sample Ready */ 00113 00114 /** @} end of VL53L0X_GpioFunctionality_group */ 00115 00116 00117 /* Device register map */ 00118 00119 /** @defgroup VL53L0X_DefineRegisters_group Define Registers 00120 * @brief List of all the defined registers 00121 * @{ 00122 */ 00123 #define VL53L0X_REG_SYSRANGE_START 0x000 00124 /** mask existing bit in #VL53L0X_REG_SYSRANGE_START*/ 00125 #define VL53L0X_REG_SYSRANGE_MODE_MASK 0x0F 00126 /** bit 0 in #VL53L0X_REG_SYSRANGE_START write 1 toggle state in 00127 * continuous mode and arm next shot in single shot mode */ 00128 #define VL53L0X_REG_SYSRANGE_MODE_START_STOP 0x01 00129 /** bit 1 write 0 in #VL53L0X_REG_SYSRANGE_START set single shot mode */ 00130 #define VL53L0X_REG_SYSRANGE_MODE_SINGLESHOT 0x00 00131 /** bit 1 write 1 in #VL53L0X_REG_SYSRANGE_START set back-to-back 00132 * operation mode */ 00133 #define VL53L0X_REG_SYSRANGE_MODE_BACKTOBACK 0x02 00134 /** bit 2 write 1 in #VL53L0X_REG_SYSRANGE_START set timed operation 00135 * mode */ 00136 #define VL53L0X_REG_SYSRANGE_MODE_TIMED 0x04 00137 /** bit 3 write 1 in #VL53L0X_REG_SYSRANGE_START set histogram operation 00138 * mode */ 00139 #define VL53L0X_REG_SYSRANGE_MODE_HISTOGRAM 0x08 00140 00141 00142 #define VL53L0X_REG_SYSTEM_THRESH_HIGH 0x000C 00143 #define VL53L0X_REG_SYSTEM_THRESH_LOW 0x000E 00144 00145 00146 #define VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG 0x0001 00147 #define VL53L0X_REG_SYSTEM_RANGE_CONFIG 0x0009 00148 #define VL53L0X_REG_SYSTEM_INTERMEASUREMENT_PERIOD 0x0004 00149 00150 00151 #define VL53L0X_REG_SYSTEM_INTERRUPT_CONFIG_GPIO 0x000A 00152 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_DISABLED 0x00 00153 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_LOW 0x01 00154 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_HIGH 0x02 00155 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_OUT_OF_WINDOW 0x03 00156 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY 0x04 00157 00158 #define VL53L0X_REG_GPIO_HV_MUX_ACTIVE_HIGH 0x0084 00159 00160 00161 #define VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR 0x000B 00162 00163 /* Result registers */ 00164 #define VL53L0X_REG_RESULT_INTERRUPT_STATUS 0x0013 00165 #define VL53L0X_REG_RESULT_RANGE_STATUS 0x0014 00166 00167 #define VL53L0X_REG_RESULT_CORE_PAGE 1 00168 #define VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_RTN 0x00BC 00169 #define VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_RTN 0x00C0 00170 #define VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_REF 0x00D0 00171 #define VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_REF 0x00D4 00172 #define VL53L0X_REG_RESULT_PEAK_SIGNAL_RATE_REF 0x00B6 00173 00174 /* Algo register */ 00175 00176 #define VL53L0X_REG_ALGO_PART_TO_PART_RANGE_OFFSET_MM 0x0028 00177 00178 #define VL53L0X_REG_I2C_SLAVE_DEVICE_ADDRESS 0x008a 00179 00180 /* Check Limit registers */ 00181 #define VL53L0X_REG_MSRC_CONFIG_CONTROL 0x0060 00182 00183 #define VL53L0X_REG_PRE_RANGE_CONFIG_MIN_SNR 0X0027 00184 #define VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW 0x0056 00185 #define VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH 0x0057 00186 #define VL53L0X_REG_PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT 0x0064 00187 00188 #define VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_SNR 0X0067 00189 #define VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW 0x0047 00190 #define VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH 0x0048 00191 #define VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT 0x0044 00192 00193 00194 #define VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_HI 0X0061 00195 #define VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_LO 0X0062 00196 00197 /* PRE RANGE registers */ 00198 #define VL53L0X_REG_PRE_RANGE_CONFIG_VCSEL_PERIOD 0x0050 00199 #define VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI 0x0051 00200 #define VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_LO 0x0052 00201 00202 #define VL53L0X_REG_SYSTEM_HISTOGRAM_BIN 0x0081 00203 #define VL53L0X_REG_HISTOGRAM_CONFIG_INITIAL_PHASE_SELECT 0x0033 00204 #define VL53L0X_REG_HISTOGRAM_CONFIG_READOUT_CTRL 0x0055 00205 00206 #define VL53L0X_REG_FINAL_RANGE_CONFIG_VCSEL_PERIOD 0x0070 00207 #define VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI 0x0071 00208 #define VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_LO 0x0072 00209 #define VL53L0X_REG_CROSSTALK_COMPENSATION_PEAK_RATE_MCPS 0x0020 00210 00211 #define VL53L0X_REG_MSRC_CONFIG_TIMEOUT_MACROP 0x0046 00212 00213 00214 #define VL53L0X_REG_SOFT_RESET_GO2_SOFT_RESET_N 0x00bf 00215 #define VL53L0X_REG_IDENTIFICATION_MODEL_ID 0x00c0 00216 #define VL53L0X_REG_IDENTIFICATION_REVISION_ID 0x00c2 00217 00218 #define VL53L0X_REG_OSC_CALIBRATE_VAL 0x00f8 00219 00220 00221 #define VL53L0X_SIGMA_ESTIMATE_MAX_VALUE 65535 00222 /* equivalent to a range sigma of 655.35mm */ 00223 00224 #define VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH 0x032 00225 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0 0x0B0 00226 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_1 0x0B1 00227 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_2 0x0B2 00228 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_3 0x0B3 00229 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_4 0x0B4 00230 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_5 0x0B5 00231 00232 #define VL53L0X_REG_GLOBAL_CONFIG_REF_EN_START_SELECT 0xB6 00233 #define VL53L0X_REG_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD 0x4E /* 0x14E */ 00234 #define VL53L0X_REG_DYNAMIC_SPAD_REF_EN_START_OFFSET 0x4F /* 0x14F */ 00235 #define VL53L0X_REG_POWER_MANAGEMENT_GO1_POWER_FORCE 0x80 00236 00237 /* 00238 * Speed of light in um per 1E-10 Seconds 00239 */ 00240 00241 #define VL53L0X_SPEED_OF_LIGHT_IN_AIR 2997 00242 00243 #define VL53L0X_REG_VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV 0x0089 00244 00245 #define VL53L0X_REG_ALGO_PHASECAL_LIM 0x0030 /* 0x130 */ 00246 #define VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT 0x0030 00247 00248 /** @} VL53L0X_DefineRegisters_group */ 00249 00250 /** @} VL53L0X_DevSpecDefines_group */ 00251 00252 00253 #endif 00254 00255 /* _VL53L0X_DEVICE_H_ */ 00256 00257
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