Jack Berkhout / SystemClock

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Dependents:   20180621_FT813

SystemClock.cpp@0:86b437ce0d0f, 2018-07-23 (annotated)

Committer:
JackB
Date:
Mon Jul 23 12:25:39 2018 +0000
Revision:
0:86b437ce0d0f
SC

Who changed what in which revision?

UserRevisionLine numberNew contents of line
JackB 0:86b437ce0d0f 1 // ST_401_84MHZ
JackB 0:86b437ce0d0f 2 // https://os.mbed.com/users/dreschpe/code/ST_401_84MHZ/
JackB 0:86b437ce0d0f 3 // If you want to use a different crystal or frequency : the STM32CubeMX tool is your friend :-)
JackB 0:86b437ce0d0f 4 // use the STM32CubeMX Tool to calculate the register settings
JackB 0:86b437ce0d0f 5 // www.st.com/stm32cube‎
JackB 0:86b437ce0d0f 6 //
JackB 0:86b437ce0d0f 7
JackB 0:86b437ce0d0f 8 //#include "stm32f4xx_hal.h"
JackB 0:86b437ce0d0f 9 //#include "ST_F401_84MHZ.h"
JackB 0:86b437ce0d0f 10 //
JackB 0:86b437ce0d0f 11 //F401_init84::F401_init84(unsigned int external){
JackB 0:86b437ce0d0f 12 // if(external == 1){
JackB 0:86b437ce0d0f 13 // SystemClock_Config_84MHz_external();
JackB 0:86b437ce0d0f 14 // }
JackB 0:86b437ce0d0f 15 // else {
JackB 0:86b437ce0d0f 16 // SystemClock_Config_84MHz_internal();
JackB 0:86b437ce0d0f 17 // }
JackB 0:86b437ce0d0f 18 // }
JackB 0:86b437ce0d0f 19 //
JackB 0:86b437ce0d0f 20 //void F401_init84::SystemClock_Config_84MHz_internal(void)
JackB 0:86b437ce0d0f 21 //{
JackB 0:86b437ce0d0f 22 // HAL_RCC_DeInit(); // we have to reset the clock settings !
JackB 0:86b437ce0d0f 23 // RCC_ClkInitTypeDef RCC_ClkInitStruct;
JackB 0:86b437ce0d0f 24 // RCC_OscInitTypeDef RCC_OscInitStruct;
JackB 0:86b437ce0d0f 25 //
JackB 0:86b437ce0d0f 26 // RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; // internal 16MHz RC
JackB 0:86b437ce0d0f 27 // RCC_OscInitStruct.HSIState = RCC_HSI_ON;
JackB 0:86b437ce0d0f 28 // RCC_OscInitStruct.HSICalibrationValue = 6;
JackB 0:86b437ce0d0f 29 // RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; // PLL on
JackB 0:86b437ce0d0f 30 // RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
JackB 0:86b437ce0d0f 31 // RCC_OscInitStruct.PLL.PLLM = 16; // setup PLL divider
JackB 0:86b437ce0d0f 32 // RCC_OscInitStruct.PLL.PLLN = 336;
JackB 0:86b437ce0d0f 33 // RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
JackB 0:86b437ce0d0f 34 // RCC_OscInitStruct.PLL.PLLQ = 4;
JackB 0:86b437ce0d0f 35 // HAL_RCC_OscConfig(&RCC_OscInitStruct);
JackB 0:86b437ce0d0f 36 //
JackB 0:86b437ce0d0f 37 // RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1;
JackB 0:86b437ce0d0f 38 // RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
JackB 0:86b437ce0d0f 39 // RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
JackB 0:86b437ce0d0f 40 // HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
JackB 0:86b437ce0d0f 41 // SystemCoreClockUpdate(); // update SystemCoreClock var
JackB 0:86b437ce0d0f 42 //}
JackB 0:86b437ce0d0f 43 //
JackB 0:86b437ce0d0f 44 //
JackB 0:86b437ce0d0f 45 //// use a external 8 MHz crystal to generate the CPU clock
JackB 0:86b437ce0d0f 46 //// You have to add X3 8MHz
JackB 0:86b437ce0d0f 47 //// C33,C34 18pF 0603
JackB 0:86b437ce0d0f 48 //// R35,R37 0R 0603 or use wire
JackB 0:86b437ce0d0f 49 //
JackB 0:86b437ce0d0f 50 //
JackB 0:86b437ce0d0f 51 //void F401_init84::SystemClock_Config_84MHz_external(void)
JackB 0:86b437ce0d0f 52 //{
JackB 0:86b437ce0d0f 53 // HAL_RCC_DeInit(); // we have to reset the clock settings !
JackB 0:86b437ce0d0f 54 // RCC_ClkInitTypeDef RCC_ClkInitStruct;
JackB 0:86b437ce0d0f 55 // RCC_OscInitTypeDef RCC_OscInitStruct;
JackB 0:86b437ce0d0f 56 //
JackB 0:86b437ce0d0f 57 // RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
JackB 0:86b437ce0d0f 58 // RCC_OscInitStruct.HSEState = RCC_HSE_ON;
JackB 0:86b437ce0d0f 59 // RCC_OscInitStruct.LSIState = RCC_LSI_ON;
JackB 0:86b437ce0d0f 60 // RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
JackB 0:86b437ce0d0f 61 // RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
JackB 0:86b437ce0d0f 62 // RCC_OscInitStruct.PLL.PLLM = 8;
JackB 0:86b437ce0d0f 63 // RCC_OscInitStruct.PLL.PLLN = 336;
JackB 0:86b437ce0d0f 64 // RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
JackB 0:86b437ce0d0f 65 // RCC_OscInitStruct.PLL.PLLQ = 4;
JackB 0:86b437ce0d0f 66 // HAL_RCC_OscConfig(&RCC_OscInitStruct);
JackB 0:86b437ce0d0f 67 //
JackB 0:86b437ce0d0f 68 // RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1;
JackB 0:86b437ce0d0f 69 // RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
JackB 0:86b437ce0d0f 70 // RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
JackB 0:86b437ce0d0f 71 // HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
JackB 0:86b437ce0d0f 72 // SystemCoreClockUpdate(); // update SystemCoreClock var
JackB 0:86b437ce0d0f 73 //
JackB 0:86b437ce0d0f 74 //}