wifi test

Dependencies:   X_NUCLEO_IKS01A2 mbed-http

Committer:
JMF
Date:
Wed Sep 05 14:28:24 2018 +0000
Revision:
0:24d3eb812fd4
Initial commit

Who changed what in which revision?

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JMF 0:24d3eb812fd4 1 /**
JMF 0:24d3eb812fd4 2 ******************************************************************************
JMF 0:24d3eb812fd4 3 * @file SPIRIT_Irq.c
JMF 0:24d3eb812fd4 4 * @author VMA division - AMS
JMF 0:24d3eb812fd4 5 * @version 3.2.2
JMF 0:24d3eb812fd4 6 * @date 08-July-2015
JMF 0:24d3eb812fd4 7 * @brief Configuration and management of SPIRIT IRQs.
JMF 0:24d3eb812fd4 8 * @details
JMF 0:24d3eb812fd4 9 *
JMF 0:24d3eb812fd4 10 * @attention
JMF 0:24d3eb812fd4 11 *
JMF 0:24d3eb812fd4 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
JMF 0:24d3eb812fd4 13 *
JMF 0:24d3eb812fd4 14 * Redistribution and use in source and binary forms, with or without modification,
JMF 0:24d3eb812fd4 15 * are permitted provided that the following conditions are met:
JMF 0:24d3eb812fd4 16 * 1. Redistributions of source code must retain the above copyright notice,
JMF 0:24d3eb812fd4 17 * this list of conditions and the following disclaimer.
JMF 0:24d3eb812fd4 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
JMF 0:24d3eb812fd4 19 * this list of conditions and the following disclaimer in the documentation
JMF 0:24d3eb812fd4 20 * and/or other materials provided with the distribution.
JMF 0:24d3eb812fd4 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
JMF 0:24d3eb812fd4 22 * may be used to endorse or promote products derived from this software
JMF 0:24d3eb812fd4 23 * without specific prior written permission.
JMF 0:24d3eb812fd4 24 *
JMF 0:24d3eb812fd4 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
JMF 0:24d3eb812fd4 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
JMF 0:24d3eb812fd4 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
JMF 0:24d3eb812fd4 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
JMF 0:24d3eb812fd4 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
JMF 0:24d3eb812fd4 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
JMF 0:24d3eb812fd4 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
JMF 0:24d3eb812fd4 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
JMF 0:24d3eb812fd4 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
JMF 0:24d3eb812fd4 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
JMF 0:24d3eb812fd4 35 *
JMF 0:24d3eb812fd4 36 ******************************************************************************
JMF 0:24d3eb812fd4 37 */
JMF 0:24d3eb812fd4 38
JMF 0:24d3eb812fd4 39 /* Includes ------------------------------------------------------------------*/
JMF 0:24d3eb812fd4 40 #include "SPIRIT_Irq.h"
JMF 0:24d3eb812fd4 41 #include "MCU_Interface.h"
JMF 0:24d3eb812fd4 42
JMF 0:24d3eb812fd4 43
JMF 0:24d3eb812fd4 44
JMF 0:24d3eb812fd4 45 /**
JMF 0:24d3eb812fd4 46 * @addtogroup SPIRIT_Libraries
JMF 0:24d3eb812fd4 47 * @{
JMF 0:24d3eb812fd4 48 */
JMF 0:24d3eb812fd4 49
JMF 0:24d3eb812fd4 50
JMF 0:24d3eb812fd4 51 /**
JMF 0:24d3eb812fd4 52 * @addtogroup SPIRIT_Irq
JMF 0:24d3eb812fd4 53 * @{
JMF 0:24d3eb812fd4 54 */
JMF 0:24d3eb812fd4 55
JMF 0:24d3eb812fd4 56
JMF 0:24d3eb812fd4 57 /**
JMF 0:24d3eb812fd4 58 * @defgroup Irq_Private_TypesDefinitions IRQ Private Types Definitions
JMF 0:24d3eb812fd4 59 * @{
JMF 0:24d3eb812fd4 60 */
JMF 0:24d3eb812fd4 61
JMF 0:24d3eb812fd4 62 /**
JMF 0:24d3eb812fd4 63 *@}
JMF 0:24d3eb812fd4 64 */
JMF 0:24d3eb812fd4 65
JMF 0:24d3eb812fd4 66
JMF 0:24d3eb812fd4 67 /**
JMF 0:24d3eb812fd4 68 * @defgroup Irq_Private_Defines IRQ Private Defines
JMF 0:24d3eb812fd4 69 * @{
JMF 0:24d3eb812fd4 70 */
JMF 0:24d3eb812fd4 71
JMF 0:24d3eb812fd4 72 /**
JMF 0:24d3eb812fd4 73 *@}
JMF 0:24d3eb812fd4 74 */
JMF 0:24d3eb812fd4 75
JMF 0:24d3eb812fd4 76
JMF 0:24d3eb812fd4 77 /**
JMF 0:24d3eb812fd4 78 * @defgroup Irq_Private_Macros IRQ Private Macros
JMF 0:24d3eb812fd4 79 * @{
JMF 0:24d3eb812fd4 80 */
JMF 0:24d3eb812fd4 81
JMF 0:24d3eb812fd4 82 /**
JMF 0:24d3eb812fd4 83 *@}
JMF 0:24d3eb812fd4 84 */
JMF 0:24d3eb812fd4 85
JMF 0:24d3eb812fd4 86
JMF 0:24d3eb812fd4 87 /**
JMF 0:24d3eb812fd4 88 * @defgroup Irq_Private_Variables IRQ Private Variables
JMF 0:24d3eb812fd4 89 * @{
JMF 0:24d3eb812fd4 90 */
JMF 0:24d3eb812fd4 91
JMF 0:24d3eb812fd4 92
JMF 0:24d3eb812fd4 93 /**
JMF 0:24d3eb812fd4 94 *@}
JMF 0:24d3eb812fd4 95 */
JMF 0:24d3eb812fd4 96
JMF 0:24d3eb812fd4 97
JMF 0:24d3eb812fd4 98 /**
JMF 0:24d3eb812fd4 99 * @defgroup Irq_Private_FunctionPrototypes IRQ Private Function Prototypes
JMF 0:24d3eb812fd4 100 * @{
JMF 0:24d3eb812fd4 101 */
JMF 0:24d3eb812fd4 102
JMF 0:24d3eb812fd4 103 /**
JMF 0:24d3eb812fd4 104 *@}
JMF 0:24d3eb812fd4 105 */
JMF 0:24d3eb812fd4 106
JMF 0:24d3eb812fd4 107
JMF 0:24d3eb812fd4 108 /**
JMF 0:24d3eb812fd4 109 * @defgroup Irq_Private_Functions IRQ Private Functions
JMF 0:24d3eb812fd4 110 * @{
JMF 0:24d3eb812fd4 111 */
JMF 0:24d3eb812fd4 112
JMF 0:24d3eb812fd4 113
JMF 0:24d3eb812fd4 114 /**
JMF 0:24d3eb812fd4 115 * @brief De initializate the SpiritIrqs structure setting all the bitfield to 0.
JMF 0:24d3eb812fd4 116 * Moreover, it sets the IRQ mask registers to 0x00000000, disabling all IRQs.
JMF 0:24d3eb812fd4 117 * @param pxIrqInit pointer to a variable of type @ref SpiritIrqs, in which all the
JMF 0:24d3eb812fd4 118 * bitfields will be settled to zero.
JMF 0:24d3eb812fd4 119 * @retval None.
JMF 0:24d3eb812fd4 120 */
JMF 0:24d3eb812fd4 121 void SpiritIrqDeInit(SpiritIrqs* pxIrqInit)
JMF 0:24d3eb812fd4 122 {
JMF 0:24d3eb812fd4 123 uint8_t tempRegValue[4]={0x00,0x00,0x00,0x00};
JMF 0:24d3eb812fd4 124
JMF 0:24d3eb812fd4 125 if(pxIrqInit!=NULL)
JMF 0:24d3eb812fd4 126 {
JMF 0:24d3eb812fd4 127 /* Sets the bitfields of passed structure to one */
JMF 0:24d3eb812fd4 128 *(uint32_t*)pxIrqInit = 0x0;
JMF 0:24d3eb812fd4 129 }
JMF 0:24d3eb812fd4 130
JMF 0:24d3eb812fd4 131 /* Writes the IRQ_MASK registers */
JMF 0:24d3eb812fd4 132 g_xStatus = SpiritSpiWriteRegisters(IRQ_MASK3_BASE, 4, tempRegValue);
JMF 0:24d3eb812fd4 133 }
JMF 0:24d3eb812fd4 134
JMF 0:24d3eb812fd4 135
JMF 0:24d3eb812fd4 136 /**
JMF 0:24d3eb812fd4 137 * @brief Enables all the IRQs according to the user defined pxIrqInit structure.
JMF 0:24d3eb812fd4 138 * @param pxIrqInit pointer to a variable of type @ref SpiritIrqs, through which the
JMF 0:24d3eb812fd4 139 * user enable specific IRQs. This parameter is a pointer to a SpiritIrqs.
JMF 0:24d3eb812fd4 140 * For example suppose to enable only the two IRQ Low Battery Level and Tx Data Sent:
JMF 0:24d3eb812fd4 141 * @code
JMF 0:24d3eb812fd4 142 * SpiritIrqs myIrqInit = {0};
JMF 0:24d3eb812fd4 143 * myIrqInit.IRQ_LOW_BATT_LVL = 1;
JMF 0:24d3eb812fd4 144 * myIrqInit.IRQ_TX_DATA_SENT = 1;
JMF 0:24d3eb812fd4 145 * SpiritIrqInit(&myIrqInit);
JMF 0:24d3eb812fd4 146 * @endcode
JMF 0:24d3eb812fd4 147 * @retval None.
JMF 0:24d3eb812fd4 148 */
JMF 0:24d3eb812fd4 149 void SpiritIrqInit(SpiritIrqs* pxIrqInit)
JMF 0:24d3eb812fd4 150 {
JMF 0:24d3eb812fd4 151 /* Writes the IRQ_MASK registers */
JMF 0:24d3eb812fd4 152 g_xStatus = SpiritSpiWriteRegisters(IRQ_MASK3_BASE, 4, (uint8_t*)pxIrqInit);
JMF 0:24d3eb812fd4 153
JMF 0:24d3eb812fd4 154 }
JMF 0:24d3eb812fd4 155
JMF 0:24d3eb812fd4 156
JMF 0:24d3eb812fd4 157 /**
JMF 0:24d3eb812fd4 158 * @brief Enables or disables a specific IRQ.
JMF 0:24d3eb812fd4 159 * @param xIrq IRQ to enable or disable.
JMF 0:24d3eb812fd4 160 * This parameter can be any value of @ref IrqList.
JMF 0:24d3eb812fd4 161 * @param xNewState new state for the IRQ.
JMF 0:24d3eb812fd4 162 * This parameter can be: S_ENABLE or S_DISABLE.
JMF 0:24d3eb812fd4 163 * @retval None.
JMF 0:24d3eb812fd4 164 */
JMF 0:24d3eb812fd4 165 void SpiritIrq(IrqList xIrq, SpiritFunctionalState xNewState)
JMF 0:24d3eb812fd4 166 {
JMF 0:24d3eb812fd4 167 uint8_t tempRegValue[4];
JMF 0:24d3eb812fd4 168 uint32_t tempValue = 0;
JMF 0:24d3eb812fd4 169
JMF 0:24d3eb812fd4 170 /* Check the parameters */
JMF 0:24d3eb812fd4 171 s_assert_param(IS_SPIRIT_IRQ_LIST(xIrq));
JMF 0:24d3eb812fd4 172 s_assert_param(IS_SPIRIT_FUNCTIONAL_STATE(xNewState));
JMF 0:24d3eb812fd4 173
JMF 0:24d3eb812fd4 174 /* Reads the IRQ_MASK registers */
JMF 0:24d3eb812fd4 175 g_xStatus = SpiritSpiReadRegisters(IRQ_MASK3_BASE, 4, tempRegValue);
JMF 0:24d3eb812fd4 176
JMF 0:24d3eb812fd4 177 /* Build the IRQ mask word */
JMF 0:24d3eb812fd4 178 for(uint8_t i=0; i<4; i++)
JMF 0:24d3eb812fd4 179 {
JMF 0:24d3eb812fd4 180 tempValue += ((uint32_t)tempRegValue[i])<<(8*(3-i));
JMF 0:24d3eb812fd4 181 }
JMF 0:24d3eb812fd4 182
JMF 0:24d3eb812fd4 183 /* Rebuild the new mask according to user request */
JMF 0:24d3eb812fd4 184 if(xNewState == S_DISABLE)
JMF 0:24d3eb812fd4 185 {
JMF 0:24d3eb812fd4 186 tempValue &= (~xIrq);
JMF 0:24d3eb812fd4 187 }
JMF 0:24d3eb812fd4 188 else
JMF 0:24d3eb812fd4 189 {
JMF 0:24d3eb812fd4 190 tempValue |= (xIrq);
JMF 0:24d3eb812fd4 191 }
JMF 0:24d3eb812fd4 192
JMF 0:24d3eb812fd4 193 /* Build the array of bytes to write in the IRQ_MASK registers */
JMF 0:24d3eb812fd4 194 for(uint8_t j=0; j<4; j++)
JMF 0:24d3eb812fd4 195 {
JMF 0:24d3eb812fd4 196 tempRegValue[j] = (uint8_t)(tempValue>>(8*(3-j)));
JMF 0:24d3eb812fd4 197 }
JMF 0:24d3eb812fd4 198
JMF 0:24d3eb812fd4 199 /* Writes the new IRQ mask in the corresponding registers */
JMF 0:24d3eb812fd4 200 g_xStatus = SpiritSpiWriteRegisters(IRQ_MASK3_BASE, 4, tempRegValue);
JMF 0:24d3eb812fd4 201
JMF 0:24d3eb812fd4 202 }
JMF 0:24d3eb812fd4 203
JMF 0:24d3eb812fd4 204
JMF 0:24d3eb812fd4 205 /**
JMF 0:24d3eb812fd4 206 * @brief Fills a pointer to a structure of SpiritIrqs type reading the IRQ_MASK registers.
JMF 0:24d3eb812fd4 207 * @param pxIrqMask pointer to a variable of type @ref SpiritIrqs, through which the
JMF 0:24d3eb812fd4 208 * user can read which IRQs are enabled. All the bitfields equals to zero correspond
JMF 0:24d3eb812fd4 209 * to enabled IRQs, while all the bitfields equals to one correspond to disabled IRQs.
JMF 0:24d3eb812fd4 210 * This parameter is a pointer to a SpiritIrqs.
JMF 0:24d3eb812fd4 211 * For example suppose that the Power On Reset and RX Data ready are the only enabled IRQs.
JMF 0:24d3eb812fd4 212 * @code
JMF 0:24d3eb812fd4 213 * SpiritIrqs myIrqMask;
JMF 0:24d3eb812fd4 214 * SpiritIrqGetStatus(&myIrqMask);
JMF 0:24d3eb812fd4 215 * @endcode
JMF 0:24d3eb812fd4 216 * Then
JMF 0:24d3eb812fd4 217 * myIrqMask.IRQ_POR and myIrqMask.IRQ_RX_DATA_READY are equal to 0
JMF 0:24d3eb812fd4 218 * while all the other bitfields are equal to one.
JMF 0:24d3eb812fd4 219 * @retval None.
JMF 0:24d3eb812fd4 220 */
JMF 0:24d3eb812fd4 221 void SpiritIrqGetMask(SpiritIrqs* pxIrqMask)
JMF 0:24d3eb812fd4 222 {
JMF 0:24d3eb812fd4 223 /* Reads IRQ_MASK registers */
JMF 0:24d3eb812fd4 224 g_xStatus = SpiritSpiReadRegisters(IRQ_MASK3_BASE, 4, (uint8_t*)pxIrqMask);
JMF 0:24d3eb812fd4 225 }
JMF 0:24d3eb812fd4 226
JMF 0:24d3eb812fd4 227
JMF 0:24d3eb812fd4 228 /**
JMF 0:24d3eb812fd4 229 * @brief Filla a pointer to a structure of SpiritIrqs type reading the IRQ_STATUS registers.
JMF 0:24d3eb812fd4 230 * @param pxIrqStatus pointer to a variable of type @ref SpiritIrqs, through which the
JMF 0:24d3eb812fd4 231 * user can read the status of all the IRQs. All the bitfields equals to one correspond
JMF 0:24d3eb812fd4 232 * to the raised interrupts. This parameter is a pointer to a SpiritIrqs.
JMF 0:24d3eb812fd4 233 * For example suppose that the XO settling timeout is raised as well as the Sync word
JMF 0:24d3eb812fd4 234 * detection.
JMF 0:24d3eb812fd4 235 * @code
JMF 0:24d3eb812fd4 236 * SpiritIrqs myIrqStatus;
JMF 0:24d3eb812fd4 237 * SpiritIrqGetStatus(&myIrqStatus);
JMF 0:24d3eb812fd4 238 * @endcode
JMF 0:24d3eb812fd4 239 * Then
JMF 0:24d3eb812fd4 240 * myIrqStatus.IRQ_XO_COUNT_EXPIRED and myIrqStatus.IRQ_VALID_SYNC are equals to 1
JMF 0:24d3eb812fd4 241 * while all the other bitfields are equals to zero.
JMF 0:24d3eb812fd4 242 * @retval None.
JMF 0:24d3eb812fd4 243 */
JMF 0:24d3eb812fd4 244 void SpiritIrqGetStatus(SpiritIrqs* pxIrqStatus)
JMF 0:24d3eb812fd4 245 {
JMF 0:24d3eb812fd4 246 /* Reads IRQ_STATUS registers */
JMF 0:24d3eb812fd4 247 g_xStatus = SpiritSpiReadRegisters(IRQ_STATUS3_BASE, 4, (uint8_t*)pxIrqStatus);
JMF 0:24d3eb812fd4 248 }
JMF 0:24d3eb812fd4 249
JMF 0:24d3eb812fd4 250
JMF 0:24d3eb812fd4 251 /**
JMF 0:24d3eb812fd4 252 * @brief Clear the IRQ status registers.
JMF 0:24d3eb812fd4 253 * @param None.
JMF 0:24d3eb812fd4 254 * @retval None.
JMF 0:24d3eb812fd4 255 */
JMF 0:24d3eb812fd4 256 void SpiritIrqClearStatus(void)
JMF 0:24d3eb812fd4 257 {
JMF 0:24d3eb812fd4 258 uint8_t tempRegValue[4];
JMF 0:24d3eb812fd4 259
JMF 0:24d3eb812fd4 260 /* Reads the IRQ_STATUS registers clearing all the flags */
JMF 0:24d3eb812fd4 261 g_xStatus = SpiritSpiReadRegisters(IRQ_STATUS3_BASE, 4, tempRegValue);
JMF 0:24d3eb812fd4 262
JMF 0:24d3eb812fd4 263 }
JMF 0:24d3eb812fd4 264
JMF 0:24d3eb812fd4 265
JMF 0:24d3eb812fd4 266 /**
JMF 0:24d3eb812fd4 267 * @brief Verifies if a specific IRQ has been generated.
JMF 0:24d3eb812fd4 268 * The call resets all the IRQ status, so it can't be used in case of multiple raising interrupts.
JMF 0:24d3eb812fd4 269 * @param xFlag IRQ flag to be checked.
JMF 0:24d3eb812fd4 270 * This parameter can be any value of @ref IrqList.
JMF 0:24d3eb812fd4 271 * @retval SpiritBool S_TRUE or S_FALSE.
JMF 0:24d3eb812fd4 272 */
JMF 0:24d3eb812fd4 273 SpiritBool SpiritIrqCheckFlag(IrqList xFlag)
JMF 0:24d3eb812fd4 274 {
JMF 0:24d3eb812fd4 275 uint8_t tempRegValue[4];
JMF 0:24d3eb812fd4 276 uint32_t tempValue = 0;
JMF 0:24d3eb812fd4 277 SpiritBool flag;
JMF 0:24d3eb812fd4 278
JMF 0:24d3eb812fd4 279 /* Check the parameters */
JMF 0:24d3eb812fd4 280 s_assert_param(IS_SPIRIT_IRQ_LIST(xFlag));
JMF 0:24d3eb812fd4 281
JMF 0:24d3eb812fd4 282 /* Reads registers and build the status word */
JMF 0:24d3eb812fd4 283 g_xStatus = SpiritSpiReadRegisters(IRQ_STATUS3_BASE, 4, tempRegValue);
JMF 0:24d3eb812fd4 284 for(uint8_t i=0; i<4; i++)
JMF 0:24d3eb812fd4 285 {
JMF 0:24d3eb812fd4 286 tempValue += ((uint32_t)tempRegValue[i])<<(8*(3-i));
JMF 0:24d3eb812fd4 287 }
JMF 0:24d3eb812fd4 288
JMF 0:24d3eb812fd4 289 if(tempValue & xFlag)
JMF 0:24d3eb812fd4 290 {
JMF 0:24d3eb812fd4 291 flag = S_TRUE;
JMF 0:24d3eb812fd4 292 }
JMF 0:24d3eb812fd4 293 else
JMF 0:24d3eb812fd4 294 {
JMF 0:24d3eb812fd4 295 flag = S_FALSE;
JMF 0:24d3eb812fd4 296 }
JMF 0:24d3eb812fd4 297
JMF 0:24d3eb812fd4 298 return flag;
JMF 0:24d3eb812fd4 299
JMF 0:24d3eb812fd4 300 }
JMF 0:24d3eb812fd4 301
JMF 0:24d3eb812fd4 302
JMF 0:24d3eb812fd4 303 /**
JMF 0:24d3eb812fd4 304 *@}
JMF 0:24d3eb812fd4 305 */
JMF 0:24d3eb812fd4 306
JMF 0:24d3eb812fd4 307
JMF 0:24d3eb812fd4 308 /**
JMF 0:24d3eb812fd4 309 *@}
JMF 0:24d3eb812fd4 310 */
JMF 0:24d3eb812fd4 311
JMF 0:24d3eb812fd4 312
JMF 0:24d3eb812fd4 313 /**
JMF 0:24d3eb812fd4 314 *@}
JMF 0:24d3eb812fd4 315 */
JMF 0:24d3eb812fd4 316
JMF 0:24d3eb812fd4 317
JMF 0:24d3eb812fd4 318
JMF 0:24d3eb812fd4 319
JMF 0:24d3eb812fd4 320 /******************* (C) COPYRIGHT 2015 STMicroelectronics *****END OF FILE****/