wifi test

Dependencies:   X_NUCLEO_IKS01A2 mbed-http

Committer:
JMF
Date:
Wed Sep 05 14:28:24 2018 +0000
Revision:
0:24d3eb812fd4
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
JMF 0:24d3eb812fd4 1 /**
JMF 0:24d3eb812fd4 2 ******************************************************************************
JMF 0:24d3eb812fd4 3 * @file SPIRIT_Irq.h
JMF 0:24d3eb812fd4 4 * @author VMA division - AMS
JMF 0:24d3eb812fd4 5 * @version 3.2.2
JMF 0:24d3eb812fd4 6 * @date 08-July-2015
JMF 0:24d3eb812fd4 7 * @brief Configuration and management of SPIRIT IRQs.
JMF 0:24d3eb812fd4 8 *
JMF 0:24d3eb812fd4 9 * @details
JMF 0:24d3eb812fd4 10 *
JMF 0:24d3eb812fd4 11 * On the Spirit side specific IRQs can be enabled by setting a specific bitmask.
JMF 0:24d3eb812fd4 12 * The Spirit libraries allow the user to do this in two different ways:
JMF 0:24d3eb812fd4 13 * <ul>
JMF 0:24d3eb812fd4 14 *
JMF 0:24d3eb812fd4 15 * <li>The first enables the IRQs one by one, i.e. using an SPI transaction for each
JMF 0:24d3eb812fd4 16 * IRQ to enable.
JMF 0:24d3eb812fd4 17 *
JMF 0:24d3eb812fd4 18 * <b>Example:</b>
JMF 0:24d3eb812fd4 19 * @code
JMF 0:24d3eb812fd4 20 *
JMF 0:24d3eb812fd4 21 * SpiritIrqDeInit(NULL); // this call is used to reset the IRQ mask registers
JMF 0:24d3eb812fd4 22 * SpiritIrq(RX_DATA_READY , S_ENABLE);
JMF 0:24d3eb812fd4 23 * SpiritIrq(VALID_SYNC , S_ENABLE);
JMF 0:24d3eb812fd4 24 * SpiritIrq(RX_TIMEOUT , S_ENABLE);
JMF 0:24d3eb812fd4 25 *
JMF 0:24d3eb812fd4 26 * @endcode
JMF 0:24d3eb812fd4 27 *
JMF 0:24d3eb812fd4 28 * </li>
JMF 0:24d3eb812fd4 29 *
JMF 0:24d3eb812fd4 30 * <li>The second strategy is to set the IRQ bitfields structure. So, during the initialization the user
JMF 0:24d3eb812fd4 31 * has to fill the @ref SpiritIrqs structure setting to one the single field related to the IRQ he
JMF 0:24d3eb812fd4 32 * wants to enable, and to zero the single field related to all the IRQs he wants to disable.
JMF 0:24d3eb812fd4 33 *
JMF 0:24d3eb812fd4 34 * <b>Example:</b>
JMF 0:24d3eb812fd4 35 * @code
JMF 0:24d3eb812fd4 36 *
JMF 0:24d3eb812fd4 37 * SpiritIrqs irqMask;
JMF 0:24d3eb812fd4 38 *
JMF 0:24d3eb812fd4 39 * ...
JMF 0:24d3eb812fd4 40 *
JMF 0:24d3eb812fd4 41 * SpiritIrqDeInit(&irqMask); // this call is used to reset the IRQ mask registers
JMF 0:24d3eb812fd4 42 * // and to set to 0x00000000 the irq mask in order to disable
JMF 0:24d3eb812fd4 43 * // all IRQs (disabled by default on startup)
JMF 0:24d3eb812fd4 44 * irqMask.IRQ_RX_DATA_READY = 1;
JMF 0:24d3eb812fd4 45 * irqMask.IRQ_VALID_SYNC = 1;
JMF 0:24d3eb812fd4 46 * irqMask.IRQ_RX_TIMEOUT = 1;
JMF 0:24d3eb812fd4 47 *
JMF 0:24d3eb812fd4 48 * ...
JMF 0:24d3eb812fd4 49 * @endcode
JMF 0:24d3eb812fd4 50 * </li>
JMF 0:24d3eb812fd4 51 * </ul>
JMF 0:24d3eb812fd4 52 *
JMF 0:24d3eb812fd4 53 * The most applications will require a Spirit IRQ notification on an microcontroller EXTI line.
JMF 0:24d3eb812fd4 54 * Then, the user can check which IRQ has been raised using two different ways.
JMF 0:24d3eb812fd4 55 *
JMF 0:24d3eb812fd4 56 * On the ISR of the EXTI line phisically linked to the Spirit pin configured for IRQ:
JMF 0:24d3eb812fd4 57 *
JMF 0:24d3eb812fd4 58 * <ul>
JMF 0:24d3eb812fd4 59 * <li> Check <b>only one</b> Spirit IRQ (because the Spirit IRQ status register automatically blanks itself
JMF 0:24d3eb812fd4 60 * after an SPI reading) into the ISR.
JMF 0:24d3eb812fd4 61 *
JMF 0:24d3eb812fd4 62 * <b>Example:</b>
JMF 0:24d3eb812fd4 63 * @code
JMF 0:24d3eb812fd4 64 *
JMF 0:24d3eb812fd4 65 * if(SpiritIrqCheckFlag(RX_DATA_READY))
JMF 0:24d3eb812fd4 66 * {
JMF 0:24d3eb812fd4 67 * // do something...
JMF 0:24d3eb812fd4 68 * }
JMF 0:24d3eb812fd4 69 *
JMF 0:24d3eb812fd4 70 * @endcode
JMF 0:24d3eb812fd4 71 * </li>
JMF 0:24d3eb812fd4 72 *
JMF 0:24d3eb812fd4 73 * <li> Check more than one Spirit IRQ status by storing the entire IRQ status registers into a bitfields <i>@ref SpiritIrqs</i> structure
JMF 0:24d3eb812fd4 74 * and then check the interested bits.
JMF 0:24d3eb812fd4 75 *
JMF 0:24d3eb812fd4 76 * <b>Example:</b>
JMF 0:24d3eb812fd4 77 * @code
JMF 0:24d3eb812fd4 78 *
JMF 0:24d3eb812fd4 79 * SpiritIrqGetStatus(&irqStatus);
JMF 0:24d3eb812fd4 80 *
JMF 0:24d3eb812fd4 81 * if(irqStatus.IRQ_RX_DATA_READY)
JMF 0:24d3eb812fd4 82 * {
JMF 0:24d3eb812fd4 83 * // do something...
JMF 0:24d3eb812fd4 84 * }
JMF 0:24d3eb812fd4 85 * if(irqStatus.IRQ_VALID_SYNC)
JMF 0:24d3eb812fd4 86 * {
JMF 0:24d3eb812fd4 87 * // do something...
JMF 0:24d3eb812fd4 88 * }
JMF 0:24d3eb812fd4 89 * if(irqStatus.RX_TIMEOUT)
JMF 0:24d3eb812fd4 90 * {
JMF 0:24d3eb812fd4 91 * // do something...
JMF 0:24d3eb812fd4 92 * }
JMF 0:24d3eb812fd4 93 *
JMF 0:24d3eb812fd4 94 * @endcode
JMF 0:24d3eb812fd4 95 * </li>
JMF 0:24d3eb812fd4 96 * </ul>
JMF 0:24d3eb812fd4 97 *
JMF 0:24d3eb812fd4 98
JMF 0:24d3eb812fd4 99 * @attention
JMF 0:24d3eb812fd4 100 *
JMF 0:24d3eb812fd4 101 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
JMF 0:24d3eb812fd4 102 *
JMF 0:24d3eb812fd4 103 * Redistribution and use in source and binary forms, with or without modification,
JMF 0:24d3eb812fd4 104 * are permitted provided that the following conditions are met:
JMF 0:24d3eb812fd4 105 * 1. Redistributions of source code must retain the above copyright notice,
JMF 0:24d3eb812fd4 106 * this list of conditions and the following disclaimer.
JMF 0:24d3eb812fd4 107 * 2. Redistributions in binary form must reproduce the above copyright notice,
JMF 0:24d3eb812fd4 108 * this list of conditions and the following disclaimer in the documentation
JMF 0:24d3eb812fd4 109 * and/or other materials provided with the distribution.
JMF 0:24d3eb812fd4 110 * 3. Neither the name of STMicroelectronics nor the names of its contributors
JMF 0:24d3eb812fd4 111 * may be used to endorse or promote products derived from this software
JMF 0:24d3eb812fd4 112 * without specific prior written permission.
JMF 0:24d3eb812fd4 113 *
JMF 0:24d3eb812fd4 114 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
JMF 0:24d3eb812fd4 115 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
JMF 0:24d3eb812fd4 116 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
JMF 0:24d3eb812fd4 117 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
JMF 0:24d3eb812fd4 118 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
JMF 0:24d3eb812fd4 119 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
JMF 0:24d3eb812fd4 120 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
JMF 0:24d3eb812fd4 121 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
JMF 0:24d3eb812fd4 122 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
JMF 0:24d3eb812fd4 123 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
JMF 0:24d3eb812fd4 124 *
JMF 0:24d3eb812fd4 125 ******************************************************************************
JMF 0:24d3eb812fd4 126 */
JMF 0:24d3eb812fd4 127
JMF 0:24d3eb812fd4 128 /* Define to prevent recursive inclusion -------------------------------------*/
JMF 0:24d3eb812fd4 129 #ifndef __SPIRIT1_IRQ_H
JMF 0:24d3eb812fd4 130 #define __SPIRIT1_IRQ_H
JMF 0:24d3eb812fd4 131
JMF 0:24d3eb812fd4 132
JMF 0:24d3eb812fd4 133 /* Includes ------------------------------------------------------------------*/
JMF 0:24d3eb812fd4 134
JMF 0:24d3eb812fd4 135 #include "SPIRIT_Regs.h"
JMF 0:24d3eb812fd4 136 #include "SPIRIT_Types.h"
JMF 0:24d3eb812fd4 137
JMF 0:24d3eb812fd4 138
JMF 0:24d3eb812fd4 139 #ifdef __cplusplus
JMF 0:24d3eb812fd4 140 extern "C" {
JMF 0:24d3eb812fd4 141 #endif
JMF 0:24d3eb812fd4 142
JMF 0:24d3eb812fd4 143
JMF 0:24d3eb812fd4 144 /**
JMF 0:24d3eb812fd4 145 * @addtogroup SPIRIT_Libraries
JMF 0:24d3eb812fd4 146 * @{
JMF 0:24d3eb812fd4 147 */
JMF 0:24d3eb812fd4 148
JMF 0:24d3eb812fd4 149
JMF 0:24d3eb812fd4 150 /**
JMF 0:24d3eb812fd4 151 * @defgroup SPIRIT_Irq IRQ
JMF 0:24d3eb812fd4 152 * @brief Configuration and management of SPIRIT IRQs.
JMF 0:24d3eb812fd4 153 * @details See the file <i>@ref SPIRIT_Irq.h</i> for more details.
JMF 0:24d3eb812fd4 154 * @{
JMF 0:24d3eb812fd4 155 */
JMF 0:24d3eb812fd4 156
JMF 0:24d3eb812fd4 157 /**
JMF 0:24d3eb812fd4 158 * @defgroup Irq_Exported_Types IRQ Exported Types
JMF 0:24d3eb812fd4 159 * @{
JMF 0:24d3eb812fd4 160 */
JMF 0:24d3eb812fd4 161
JMF 0:24d3eb812fd4 162
JMF 0:24d3eb812fd4 163 /**
JMF 0:24d3eb812fd4 164 * @brief IRQ bitfield structure for SPIRIT. This structure is used to read or write the single IRQ bit.
JMF 0:24d3eb812fd4 165 * During the initialization the user has to fill this structure setting to one the single field related
JMF 0:24d3eb812fd4 166 * to the IRQ he wants to enable, and to zero the single field related to all the IRQs he wants to disable.
JMF 0:24d3eb812fd4 167 * The same structure can be used to retrieve all the IRQ events from the IRQ registers IRQ_STATUS[3:0],
JMF 0:24d3eb812fd4 168 * and read if one or more specific IRQ raised.
JMF 0:24d3eb812fd4 169 * @note The fields order in the structure depends on used endianness (little or big
JMF 0:24d3eb812fd4 170 * endian). The actual definition is valid ONLY for LITTLE ENDIAN mode. Be sure to
JMF 0:24d3eb812fd4 171 * change opportunely the fields order when use a different endianness.
JMF 0:24d3eb812fd4 172 */
JMF 0:24d3eb812fd4 173 typedef struct
JMF 0:24d3eb812fd4 174 {
JMF 0:24d3eb812fd4 175 SpiritFlagStatus IRQ_SYNTH_LOCK_TIMEOUT:1; /*!< IRQ: only for debug; LOCK state timeout */
JMF 0:24d3eb812fd4 176 SpiritFlagStatus IRQ_SYNTH_LOCK_STARTUP:1; /*!< IRQ: only for debug; see CALIBR_START_COUNTER */
JMF 0:24d3eb812fd4 177 SpiritFlagStatus IRQ_SYNTH_CAL_TIMEOUT:1; /*!< IRQ: only for debug; SYNTH calibration timeout */
JMF 0:24d3eb812fd4 178 SpiritFlagStatus IRQ_TX_START_TIME:1; /*!< IRQ: only for debug; TX circuitry startup time; see TX_START_COUNTER */
JMF 0:24d3eb812fd4 179 SpiritFlagStatus IRQ_RX_START_TIME:1; /*!< IRQ: only for debug; RX circuitry startup time; see TX_START_COUNTER */
JMF 0:24d3eb812fd4 180 SpiritFlagStatus IRQ_RX_TIMEOUT:1; /*!< IRQ: RX operation timeout */
JMF 0:24d3eb812fd4 181 SpiritFlagStatus IRQ_AES_END:1; /*!< IRQ: AES End of operation */
JMF 0:24d3eb812fd4 182 SpiritFlagStatus reserved:1; /*!< Reserved bit */
JMF 0:24d3eb812fd4 183
JMF 0:24d3eb812fd4 184 SpiritFlagStatus IRQ_READY:1; /*!< IRQ: READY state */
JMF 0:24d3eb812fd4 185 SpiritFlagStatus IRQ_STANDBY_DELAYED:1; /*!< IRQ: STANDBY state after MCU_CK_CONF_CLOCK_TAIL_X clock cycles */
JMF 0:24d3eb812fd4 186 SpiritFlagStatus IRQ_LOW_BATT_LVL:1; /*!< IRQ: Battery level below threshold*/
JMF 0:24d3eb812fd4 187 SpiritFlagStatus IRQ_POR:1; /*!< IRQ: Power On Reset */
JMF 0:24d3eb812fd4 188 SpiritFlagStatus IRQ_BOR:1; /*!< IRQ: Brown out event (both accurate and inaccurate)*/
JMF 0:24d3eb812fd4 189 SpiritFlagStatus IRQ_LOCK:1; /*!< IRQ: LOCK state */
JMF 0:24d3eb812fd4 190 SpiritFlagStatus IRQ_PM_COUNT_EXPIRED:1; /*!< IRQ: only for debug; Power Management startup timer expiration (see reg PM_START_COUNTER, 0xB5) */
JMF 0:24d3eb812fd4 191 SpiritFlagStatus IRQ_XO_COUNT_EXPIRED:1; /*!< IRQ: only for debug; Crystal oscillator settling time counter expired */
JMF 0:24d3eb812fd4 192
JMF 0:24d3eb812fd4 193 SpiritFlagStatus IRQ_TX_FIFO_ALMOST_EMPTY:1; /*!< IRQ: TX FIFO almost empty */
JMF 0:24d3eb812fd4 194 SpiritFlagStatus IRQ_RX_FIFO_ALMOST_FULL:1; /*!< IRQ: RX FIFO almost full */
JMF 0:24d3eb812fd4 195 SpiritFlagStatus IRQ_RX_FIFO_ALMOST_EMPTY:1; /*!< IRQ: RX FIFO almost empty */
JMF 0:24d3eb812fd4 196 SpiritFlagStatus IRQ_MAX_BO_CCA_REACH:1; /*!< IRQ: Max number of back-off during CCA */
JMF 0:24d3eb812fd4 197 SpiritFlagStatus IRQ_VALID_PREAMBLE:1; /*!< IRQ: Valid preamble detected */
JMF 0:24d3eb812fd4 198 SpiritFlagStatus IRQ_VALID_SYNC:1; /*!< IRQ: Sync word detected */
JMF 0:24d3eb812fd4 199 SpiritFlagStatus IRQ_RSSI_ABOVE_TH:1; /*!< IRQ: RSSI above threshold */
JMF 0:24d3eb812fd4 200 SpiritFlagStatus IRQ_WKUP_TOUT_LDC:1; /*!< IRQ: Wake-up timeout in LDC mode */
JMF 0:24d3eb812fd4 201
JMF 0:24d3eb812fd4 202 SpiritFlagStatus IRQ_RX_DATA_READY:1; /*!< IRQ: RX data ready */
JMF 0:24d3eb812fd4 203 SpiritFlagStatus IRQ_RX_DATA_DISC:1; /*!< IRQ: RX data discarded (upon filtering) */
JMF 0:24d3eb812fd4 204 SpiritFlagStatus IRQ_TX_DATA_SENT:1; /*!< IRQ: TX data sent */
JMF 0:24d3eb812fd4 205 SpiritFlagStatus IRQ_MAX_RE_TX_REACH:1; /*!< IRQ: Max re-TX reached */
JMF 0:24d3eb812fd4 206 SpiritFlagStatus IRQ_CRC_ERROR:1; /*!< IRQ: CRC error */
JMF 0:24d3eb812fd4 207 SpiritFlagStatus IRQ_TX_FIFO_ERROR:1; /*!< IRQ: TX FIFO underflow/overflow error */
JMF 0:24d3eb812fd4 208 SpiritFlagStatus IRQ_RX_FIFO_ERROR:1; /*!< IRQ: RX FIFO underflow/overflow error */
JMF 0:24d3eb812fd4 209 SpiritFlagStatus IRQ_TX_FIFO_ALMOST_FULL:1; /*!< IRQ: TX FIFO almost full */
JMF 0:24d3eb812fd4 210 } SpiritIrqs;
JMF 0:24d3eb812fd4 211
JMF 0:24d3eb812fd4 212 // betzw: uint32_t masks
JMF 0:24d3eb812fd4 213 #define IRQ_TX_FIFO_ALMOST_EMPTY_MASK (0x00010000) /* (1<<16) */
JMF 0:24d3eb812fd4 214 #define IRQ_RX_FIFO_ALMOST_FULL_MASK (0x00020000) /* (1<<17) */
JMF 0:24d3eb812fd4 215 #define IRQ_VALID_SYNC_MASK (0x00200000) /* (1<<21) */
JMF 0:24d3eb812fd4 216 #define IRQ_RX_DATA_READY_MASK (0x01000000) /* (1<<24) */
JMF 0:24d3eb812fd4 217 #define IRQ_RX_DATA_DISC_MASK (0x02000000) /* (1<<25) */
JMF 0:24d3eb812fd4 218 #define IRQ_TX_DATA_SENT_MASK (0x04000000) /* (1<<26) */
JMF 0:24d3eb812fd4 219 #define IRQ_TX_FIFO_ERROR_MASK (0x20000000) /* (1<<29) */
JMF 0:24d3eb812fd4 220 #define IRQ_RX_FIFO_ERROR_MASK (0x40000000) /* (1<<30) */
JMF 0:24d3eb812fd4 221
JMF 0:24d3eb812fd4 222 /**
JMF 0:24d3eb812fd4 223 * @brief IRQ list enumeration for SPIRIT. This enumeration type can be used to address a
JMF 0:24d3eb812fd4 224 * specific IRQ.
JMF 0:24d3eb812fd4 225 */
JMF 0:24d3eb812fd4 226 typedef enum
JMF 0:24d3eb812fd4 227 {
JMF 0:24d3eb812fd4 228 RX_DATA_READY = 0x00000001, /*!< IRQ: RX data ready */
JMF 0:24d3eb812fd4 229 RX_DATA_DISC = 0x00000002, /*!< IRQ: RX data discarded (upon filtering) */
JMF 0:24d3eb812fd4 230 TX_DATA_SENT = 0x00000004, /*!< IRQ: TX data sent */
JMF 0:24d3eb812fd4 231 MAX_RE_TX_REACH = 0x00000008, /*!< IRQ: Max re-TX reached */
JMF 0:24d3eb812fd4 232 CRC_ERROR = 0x00000010, /*!< IRQ: CRC error */
JMF 0:24d3eb812fd4 233 TX_FIFO_ERROR = 0x00000020, /*!< IRQ: TX FIFO underflow/overflow error */
JMF 0:24d3eb812fd4 234 RX_FIFO_ERROR = 0x00000040, /*!< IRQ: RX FIFO underflow/overflow error */
JMF 0:24d3eb812fd4 235 TX_FIFO_ALMOST_FULL = 0x00000080, /*!< IRQ: TX FIFO almost full */
JMF 0:24d3eb812fd4 236 TX_FIFO_ALMOST_EMPTY = 0x00000100, /*!< IRQ: TX FIFO almost empty */
JMF 0:24d3eb812fd4 237 RX_FIFO_ALMOST_FULL = 0x00000200, /*!< IRQ: RX FIFO almost full */
JMF 0:24d3eb812fd4 238 RX_FIFO_ALMOST_EMPTY = 0x00000400, /*!< IRQ: RX FIFO almost empty */
JMF 0:24d3eb812fd4 239 MAX_BO_CCA_REACH = 0x00000800, /*!< IRQ: Max number of back-off during CCA */
JMF 0:24d3eb812fd4 240 VALID_PREAMBLE = 0x00001000, /*!< IRQ: Valid preamble detected */
JMF 0:24d3eb812fd4 241 VALID_SYNC = 0x00002000, /*!< IRQ: Sync word detected */
JMF 0:24d3eb812fd4 242 RSSI_ABOVE_TH = 0x00004000, /*!< IRQ: RSSI above threshold */
JMF 0:24d3eb812fd4 243 WKUP_TOUT_LDC = 0x00008000, /*!< IRQ: Wake-up timeout in LDC mode */
JMF 0:24d3eb812fd4 244 READY = 0x00010000, /*!< IRQ: READY state */
JMF 0:24d3eb812fd4 245 STANDBY_DELAYED = 0x00020000, /*!< IRQ: STANDBY state after MCU_CK_CONF_CLOCK_TAIL_X clock cycles */
JMF 0:24d3eb812fd4 246 LOW_BATT_LVL = 0x00040000, /*!< IRQ: Battery level below threshold*/
JMF 0:24d3eb812fd4 247 POR = 0x00080000, /*!< IRQ: Power On Reset */
JMF 0:24d3eb812fd4 248 BOR = 0x00100000, /*!< IRQ: Brown out event (both accurate and inaccurate)*/
JMF 0:24d3eb812fd4 249 LOCK = 0x00200000, /*!< IRQ: LOCK state */
JMF 0:24d3eb812fd4 250 PM_COUNT_EXPIRED = 0x00400000, /*!< IRQ: only for debug; Power Management startup timer expiration (see reg PM_START_COUNTER, 0xB5) */
JMF 0:24d3eb812fd4 251 XO_COUNT_EXPIRED = 0x00800000, /*!< IRQ: only for debug; Crystal oscillator settling time counter expired */
JMF 0:24d3eb812fd4 252 SYNTH_LOCK_TIMEOUT = 0x01000000, /*!< IRQ: only for debug; LOCK state timeout */
JMF 0:24d3eb812fd4 253 SYNTH_LOCK_STARTUP = 0x02000000, /*!< IRQ: only for debug; see CALIBR_START_COUNTER */
JMF 0:24d3eb812fd4 254 SYNTH_CAL_TIMEOUT = 0x04000000, /*!< IRQ: only for debug; SYNTH calibration timeout */
JMF 0:24d3eb812fd4 255 TX_START_TIME = 0x08000000, /*!< IRQ: only for debug; TX circuitry startup time; see TX_START_COUNTER */
JMF 0:24d3eb812fd4 256 RX_START_TIME = 0x10000000, /*!< IRQ: only for debug; RX circuitry startup time; see TX_START_COUNTER */
JMF 0:24d3eb812fd4 257 RX_TIMEOUT = 0x20000000, /*!< IRQ: RX operation timeout */
JMF 0:24d3eb812fd4 258 AES_END = 0x40000000, /*!< IRQ: AES End of operation */
JMF 0:24d3eb812fd4 259 ALL_IRQ = 0x7FFFFFFF /*!< All the above mentioned IRQs */
JMF 0:24d3eb812fd4 260
JMF 0:24d3eb812fd4 261 } IrqList;
JMF 0:24d3eb812fd4 262
JMF 0:24d3eb812fd4 263 #define IS_SPIRIT_IRQ_LIST(VALUE) ((VALUE == RX_DATA_READY) || \
JMF 0:24d3eb812fd4 264 (VALUE == RX_DATA_DISC) || \
JMF 0:24d3eb812fd4 265 (VALUE == TX_DATA_SENT) || \
JMF 0:24d3eb812fd4 266 (VALUE == MAX_RE_TX_REACH) || \
JMF 0:24d3eb812fd4 267 (VALUE == CRC_ERROR) || \
JMF 0:24d3eb812fd4 268 (VALUE == TX_FIFO_ERROR) || \
JMF 0:24d3eb812fd4 269 (VALUE == RX_FIFO_ERROR) || \
JMF 0:24d3eb812fd4 270 (VALUE == TX_FIFO_ALMOST_FULL) || \
JMF 0:24d3eb812fd4 271 (VALUE == TX_FIFO_ALMOST_EMPTY) || \
JMF 0:24d3eb812fd4 272 (VALUE == RX_FIFO_ALMOST_FULL) || \
JMF 0:24d3eb812fd4 273 (VALUE == RX_FIFO_ALMOST_EMPTY) || \
JMF 0:24d3eb812fd4 274 (VALUE == MAX_BO_CCA_REACH) || \
JMF 0:24d3eb812fd4 275 (VALUE == VALID_PREAMBLE) || \
JMF 0:24d3eb812fd4 276 (VALUE == VALID_SYNC) || \
JMF 0:24d3eb812fd4 277 (VALUE == RSSI_ABOVE_TH) || \
JMF 0:24d3eb812fd4 278 (VALUE == WKUP_TOUT_LDC) || \
JMF 0:24d3eb812fd4 279 (VALUE == READY) || \
JMF 0:24d3eb812fd4 280 (VALUE == STANDBY_DELAYED) || \
JMF 0:24d3eb812fd4 281 (VALUE == LOW_BATT_LVL) || \
JMF 0:24d3eb812fd4 282 (VALUE == POR) || \
JMF 0:24d3eb812fd4 283 (VALUE == BOR) || \
JMF 0:24d3eb812fd4 284 (VALUE == LOCK) || \
JMF 0:24d3eb812fd4 285 (VALUE == PM_COUNT_EXPIRED) || \
JMF 0:24d3eb812fd4 286 (VALUE == XO_COUNT_EXPIRED) || \
JMF 0:24d3eb812fd4 287 (VALUE == SYNTH_LOCK_TIMEOUT) || \
JMF 0:24d3eb812fd4 288 (VALUE == SYNTH_LOCK_STARTUP) || \
JMF 0:24d3eb812fd4 289 (VALUE == SYNTH_CAL_TIMEOUT) || \
JMF 0:24d3eb812fd4 290 (VALUE == TX_START_TIME) || \
JMF 0:24d3eb812fd4 291 (VALUE == RX_START_TIME) || \
JMF 0:24d3eb812fd4 292 (VALUE == RX_TIMEOUT) || \
JMF 0:24d3eb812fd4 293 (VALUE == AES_END) || \
JMF 0:24d3eb812fd4 294 (VALUE == ALL_IRQ ))
JMF 0:24d3eb812fd4 295
JMF 0:24d3eb812fd4 296
JMF 0:24d3eb812fd4 297 /**
JMF 0:24d3eb812fd4 298 * @}
JMF 0:24d3eb812fd4 299 */
JMF 0:24d3eb812fd4 300
JMF 0:24d3eb812fd4 301
JMF 0:24d3eb812fd4 302 /**
JMF 0:24d3eb812fd4 303 * @defgroup Irq_Exported_Constants IRQ Exported Constants
JMF 0:24d3eb812fd4 304 * @{
JMF 0:24d3eb812fd4 305 */
JMF 0:24d3eb812fd4 306
JMF 0:24d3eb812fd4 307
JMF 0:24d3eb812fd4 308 /**
JMF 0:24d3eb812fd4 309 * @}
JMF 0:24d3eb812fd4 310 */
JMF 0:24d3eb812fd4 311
JMF 0:24d3eb812fd4 312
JMF 0:24d3eb812fd4 313 /**
JMF 0:24d3eb812fd4 314 * @defgroup Irq_Exported_Macros IRQ Exported Macros
JMF 0:24d3eb812fd4 315 * @{
JMF 0:24d3eb812fd4 316 */
JMF 0:24d3eb812fd4 317
JMF 0:24d3eb812fd4 318
JMF 0:24d3eb812fd4 319 /**
JMF 0:24d3eb812fd4 320 * @}
JMF 0:24d3eb812fd4 321 */
JMF 0:24d3eb812fd4 322
JMF 0:24d3eb812fd4 323
JMF 0:24d3eb812fd4 324 /**
JMF 0:24d3eb812fd4 325 * @defgroup Irq_Exported_Functions IRQ Exported Functions
JMF 0:24d3eb812fd4 326 * @{
JMF 0:24d3eb812fd4 327 */
JMF 0:24d3eb812fd4 328
JMF 0:24d3eb812fd4 329 void SpiritIrqDeInit(SpiritIrqs* pxIrqInit);
JMF 0:24d3eb812fd4 330 void SpiritIrqInit(SpiritIrqs* pxIrqInit);
JMF 0:24d3eb812fd4 331 void SpiritIrq(IrqList xIrq, SpiritFunctionalState xNewState);
JMF 0:24d3eb812fd4 332 void SpiritIrqGetMask(SpiritIrqs* pxIrqMask);
JMF 0:24d3eb812fd4 333 void SpiritIrqGetStatus(SpiritIrqs* pxIrqStatus);
JMF 0:24d3eb812fd4 334 void SpiritIrqClearStatus(void);
JMF 0:24d3eb812fd4 335 SpiritBool SpiritIrqCheckFlag(IrqList xFlag);
JMF 0:24d3eb812fd4 336
JMF 0:24d3eb812fd4 337 /**
JMF 0:24d3eb812fd4 338 * @}
JMF 0:24d3eb812fd4 339 */
JMF 0:24d3eb812fd4 340
JMF 0:24d3eb812fd4 341 /**
JMF 0:24d3eb812fd4 342 * @}
JMF 0:24d3eb812fd4 343 */
JMF 0:24d3eb812fd4 344
JMF 0:24d3eb812fd4 345
JMF 0:24d3eb812fd4 346 /**
JMF 0:24d3eb812fd4 347 * @}
JMF 0:24d3eb812fd4 348 */
JMF 0:24d3eb812fd4 349
JMF 0:24d3eb812fd4 350
JMF 0:24d3eb812fd4 351 #ifdef __cplusplus
JMF 0:24d3eb812fd4 352 }
JMF 0:24d3eb812fd4 353 #endif
JMF 0:24d3eb812fd4 354
JMF 0:24d3eb812fd4 355 #endif
JMF 0:24d3eb812fd4 356
JMF 0:24d3eb812fd4 357 /******************* (C) COPYRIGHT 2015 STMicroelectronics *****END OF FILE****/