detail : http://www.mcugear.com/
You need lib of mbed and textLCD.
mbed と textLCDのライブラリが必要です。
MCUGearBase.cpp@1:bbcba1a79e7b, 2013-10-03 (annotated)
- Committer:
- Info
- Date:
- Thu Oct 03 09:21:14 2013 +0000
- Revision:
- 1:bbcba1a79e7b
- Parent:
- 0:d2cb480cd5e0
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Who changed what in which revision?
User | Revision | Line number | New contents of line |
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Info | 0:d2cb480cd5e0 | 1 | /* MCU Gear Library, only for testing MCUGear without any circuit you connected. |
Info | 0:d2cb480cd5e0 | 2 | * Copyright (c) 2013, NestEgg Inc., http://www.mcugear.com/ |
Info | 0:d2cb480cd5e0 | 3 | * |
Info | 0:d2cb480cd5e0 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
Info | 0:d2cb480cd5e0 | 5 | * of this software and associated documentation files (the "Software"), to deal |
Info | 0:d2cb480cd5e0 | 6 | * in the Software without restriction, including without limitation the rights |
Info | 0:d2cb480cd5e0 | 7 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
Info | 0:d2cb480cd5e0 | 8 | * copies of the Software, and to permit persons to whom the Software is |
Info | 0:d2cb480cd5e0 | 9 | * furnished to do so, subject to the following conditions: |
Info | 0:d2cb480cd5e0 | 10 | * |
Info | 0:d2cb480cd5e0 | 11 | * The above copyright notice and this permission notice shall be included in |
Info | 0:d2cb480cd5e0 | 12 | * all copies or substantial portions of the Software. |
Info | 0:d2cb480cd5e0 | 13 | * |
Info | 0:d2cb480cd5e0 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
Info | 0:d2cb480cd5e0 | 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
Info | 0:d2cb480cd5e0 | 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
Info | 0:d2cb480cd5e0 | 17 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
Info | 0:d2cb480cd5e0 | 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
Info | 0:d2cb480cd5e0 | 19 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
Info | 0:d2cb480cd5e0 | 20 | * THE SOFTWARE. |
Info | 0:d2cb480cd5e0 | 21 | */ |
Info | 0:d2cb480cd5e0 | 22 | |
Info | 0:d2cb480cd5e0 | 23 | #include "mbed.h" |
Info | 0:d2cb480cd5e0 | 24 | #include "MCUGearBase.h" |
Info | 0:d2cb480cd5e0 | 25 | |
Info | 0:d2cb480cd5e0 | 26 | #ifdef LPC1768_mbed |
Info | 0:d2cb480cd5e0 | 27 | I2C fpga_i2c(p28, p27); |
Info | 0:d2cb480cd5e0 | 28 | #endif |
Info | 0:d2cb480cd5e0 | 29 | |
Info | 0:d2cb480cd5e0 | 30 | #ifdef FS_KL25Z |
Info | 0:d2cb480cd5e0 | 31 | I2C fpga_i2c(PTE0, PTE1); |
Info | 0:d2cb480cd5e0 | 32 | #endif |
Info | 0:d2cb480cd5e0 | 33 | |
Info | 0:d2cb480cd5e0 | 34 | |
Info | 0:d2cb480cd5e0 | 35 | |
Info | 0:d2cb480cd5e0 | 36 | |
Info | 0:d2cb480cd5e0 | 37 | #ifdef DEBUG |
Info | 0:d2cb480cd5e0 | 38 | Serial fpga_pc(USBTX, USBRX); // tx, rx |
Info | 0:d2cb480cd5e0 | 39 | #endif |
Info | 0:d2cb480cd5e0 | 40 | |
Info | 0:d2cb480cd5e0 | 41 | void fpga_write(int dev_adr,unsigned char adr, unsigned char data) { |
Info | 0:d2cb480cd5e0 | 42 | char cmd[2]; |
Info | 0:d2cb480cd5e0 | 43 | cmd[0] = adr; |
Info | 0:d2cb480cd5e0 | 44 | cmd[1] = data; |
Info | 0:d2cb480cd5e0 | 45 | fpga_i2c.frequency (FPGA_I2C_CLOCK); |
Info | 0:d2cb480cd5e0 | 46 | fpga_i2c.write(dev_adr, cmd, 2); |
Info | 0:d2cb480cd5e0 | 47 | //wait(0.01); |
Info | 0:d2cb480cd5e0 | 48 | |
Info | 0:d2cb480cd5e0 | 49 | #ifdef DEBUG |
Info | 0:d2cb480cd5e0 | 50 | fpga_pc.printf("fpga write adr:%x data:%x\n", adr,data); |
Info | 0:d2cb480cd5e0 | 51 | #endif |
Info | 0:d2cb480cd5e0 | 52 | |
Info | 0:d2cb480cd5e0 | 53 | } |
Info | 0:d2cb480cd5e0 | 54 | |
Info | 0:d2cb480cd5e0 | 55 | unsigned char fpga_read(int dev_adr,unsigned char adr) { |
Info | 0:d2cb480cd5e0 | 56 | char cmd[2]; |
Info | 0:d2cb480cd5e0 | 57 | cmd[0] = adr; |
Info | 0:d2cb480cd5e0 | 58 | fpga_i2c.write(dev_adr, cmd, 1); |
Info | 0:d2cb480cd5e0 | 59 | //wait(0.01); |
Info | 0:d2cb480cd5e0 | 60 | fpga_i2c.read(dev_adr, cmd, 1); |
Info | 0:d2cb480cd5e0 | 61 | //wait(0.01); |
Info | 0:d2cb480cd5e0 | 62 | //pc.printf("fpga read adr:%x data:%x\n", adr,cmd[0]); |
Info | 0:d2cb480cd5e0 | 63 | return cmd[0]; |
Info | 0:d2cb480cd5e0 | 64 | } |
Info | 0:d2cb480cd5e0 | 65 | |
Info | 0:d2cb480cd5e0 | 66 | void initBase(void){ |
Info | 0:d2cb480cd5e0 | 67 | |
Info | 0:d2cb480cd5e0 | 68 | #ifdef DEBUG |
Info | 0:d2cb480cd5e0 | 69 | fpga_pc.baud(BaudRate); |
Info | 0:d2cb480cd5e0 | 70 | #endif |
Info | 0:d2cb480cd5e0 | 71 | |
Info | 0:d2cb480cd5e0 | 72 | // FPGA reg clear |
Info | 0:d2cb480cd5e0 | 73 | for (int i=0;i<20;i++) |
Info | 0:d2cb480cd5e0 | 74 | fpga_write(FPGA_I2C_ADR,0x80+i,0); |
Info | 0:d2cb480cd5e0 | 75 | |
Info | 0:d2cb480cd5e0 | 76 | // read FPGA registers |
Info | 0:d2cb480cd5e0 | 77 | |
Info | 0:d2cb480cd5e0 | 78 | #ifdef DEBUG |
Info | 0:d2cb480cd5e0 | 79 | fpga_pc.printf("I2C test\n"); |
Info | 0:d2cb480cd5e0 | 80 | #endif |
Info | 0:d2cb480cd5e0 | 81 | fpga_read(FPGA_I2C_ADR,FPGA_SYSINFO_0); |
Info | 0:d2cb480cd5e0 | 82 | fpga_read(FPGA_I2C_ADR,FPGA_SYSINFO_0+1); |
Info | 0:d2cb480cd5e0 | 83 | fpga_read(FPGA_I2C_ADR,FPGA_SYSINFO_0+2); |
Info | 0:d2cb480cd5e0 | 84 | fpga_read(FPGA_I2C_ADR,FPGA_SYSINFO_0+3); |
Info | 0:d2cb480cd5e0 | 85 | // FPGA enable |
Info | 0:d2cb480cd5e0 | 86 | fpga_write(FPGA_I2C_ADR,FPGA_ENABLE,1); |
Info | 0:d2cb480cd5e0 | 87 | |
Info | 0:d2cb480cd5e0 | 88 | } |
Info | 0:d2cb480cd5e0 | 89 | |
Info | 0:d2cb480cd5e0 | 90 | |
Info | 0:d2cb480cd5e0 | 91 | void I2Cwrite(char addr, char data){ |
Info | 0:d2cb480cd5e0 | 92 | |
Info | 0:d2cb480cd5e0 | 93 | char cmd[1]; |
Info | 0:d2cb480cd5e0 | 94 | cmd[0] = data; |
Info | 0:d2cb480cd5e0 | 95 | fpga_i2c.write(addr, cmd, 1); |
Info | 0:d2cb480cd5e0 | 96 | //wait(0.01); |
Info | 0:d2cb480cd5e0 | 97 | |
Info | 0:d2cb480cd5e0 | 98 | } |
Info | 0:d2cb480cd5e0 | 99 | |
Info | 0:d2cb480cd5e0 | 100 | int detect_module(char addr) { |
Info | 0:d2cb480cd5e0 | 101 | int pnum=0xff; |
Info | 0:d2cb480cd5e0 | 102 | //1pin GND |
Info | 0:d2cb480cd5e0 | 103 | I2Cwrite(addr,0x7f); //0111 1111 |
Info | 0:d2cb480cd5e0 | 104 | //wait(0.1); |
Info | 0:d2cb480cd5e0 | 105 | pnum =fpga_read(FPGA_I2C_ADR,FPGA_DETECT); |
Info | 0:d2cb480cd5e0 | 106 | wait(1); |
Info | 0:d2cb480cd5e0 | 107 | #ifdef DEBUG |
Info | 0:d2cb480cd5e0 | 108 | fpga_pc.printf("detected. port %d \n",pnum); |
Info | 0:d2cb480cd5e0 | 109 | #endif |
Info | 0:d2cb480cd5e0 | 110 | I2Cwrite(addr,0xff); //1111 1111 |
Info | 0:d2cb480cd5e0 | 111 | //wait(0.1); |
Info | 0:d2cb480cd5e0 | 112 | return pnum; |
Info | 0:d2cb480cd5e0 | 113 | } |
Info | 0:d2cb480cd5e0 | 114 | |
Info | 0:d2cb480cd5e0 | 115 | |
Info | 0:d2cb480cd5e0 | 116 | |
Info | 0:d2cb480cd5e0 | 117 |