Diff: arch/ext/W5500.h

Revision:

14:2101ab5ee40f

Parent:

12:99e8386ba225

Child:

32:f6d76a55a50b

diff -r ec1c34e9ec45 -r 2101ab5ee40f arch/ext/W5500.h
--- a/arch/ext/W5500.h	Tue Jun 16 13:03:28 2015 +0900
+++ b/arch/ext/W5500.h	Wed Jun 17 00:24:45 2015 +0000
@@ -151,7 +151,6 @@
 	HalfDuplex100 = 3,
 	FullDuplex100 = 4,
 };
-
 class WIZnet_Chip {
 public:
 enum Protocol {
@@ -350,11 +349,13 @@
         return *reinterpret_cast<T*>(buf);
     }
 
-    void reg_rd_mac(uint16_t addr, uint8_t* data) {
+    void reg_rd_mac(uint16_t addr, uint8_t* data);
+/*     {
         spi_read(addr, 0x00, data, 6);
-    }
+    }*/
 
-    void reg_wr_ip(uint16_t addr, uint8_t cb, const char* ip) {
+    void reg_wr_ip(uint16_t addr, uint8_t cb, const char* ip);
+    /* {
         uint8_t buf[4];
         char* p = (char*)ip;
         for(int i = 0; i < 4; i++) {
@@ -367,18 +368,21 @@
         }
         spi_write(addr, cb, buf, sizeof(buf));
     }
-    
-    void sreg_ip(int socket, uint16_t addr, const char* ip) {
+    */
+    void sreg_ip(int socket, uint16_t addr, const char* ip);
+/*     {
         reg_wr_ip(addr, (0x0C + (socket << 5)), ip);
-    }
+    }*/
     
-    void reg_rd_ip_byte(uint16_t addr, uint8_t* data) {
+    void reg_rd_ip_byte(uint16_t addr, uint8_t* data);
+/*     {
         spi_read(addr, 0x00, data, 4);
-    }
+    }*/
     
-    void reg_wr_ip_byte(uint16_t addr, uint8_t* data) {
+    void reg_wr_ip_byte(uint16_t addr, uint8_t* data);
+/*     {
         spi_write(addr, 0x04, data, 4);
-    }
+    }*/
        
 /////////////////////////////////
 // Common Register I/O function //
@@ -623,7 +627,7 @@
  * @return uint8_t. Value of @ref PHYCFGR register.
  * @sa getPHYCFGR()
  */
-    uint8_t getPHYCFGR() {
+     uint8_t getPHYCFGR() {
         return reg_rd<uint8_t>(PHYCFGR);
     }
 
@@ -978,6 +982,8 @@
     }
 
 
+	int ethernet_link(void);
+	void ethernet_set_link(int speed, int duplex);
 protected:
     uint8_t mac[6];
     uint32_t ip;
@@ -986,22 +992,19 @@
     uint32_t dnsaddr;
     bool dhcp;
     
-    
-
+    void spi_write(uint16_t addr, uint8_t cb, const uint8_t *buf, uint16_t len);
+    void spi_read(uint16_t addr, uint8_t cb, uint8_t *buf, uint16_t len);
+    SPI* spi;
+    DigitalOut cs;
+    DigitalOut reset_pin;
     static WIZnet_Chip* inst;
 
     void reg_wr_mac(uint16_t addr, uint8_t* data) {
         spi_write(addr, 0x04, data, 6);
     }
 
-    void spi_write(uint16_t addr, uint8_t cb, const uint8_t *buf, uint16_t len);
-    void spi_read(uint16_t addr, uint8_t cb, uint8_t *buf, uint16_t len);
-    SPI* spi;
-    DigitalOut cs;
-    DigitalOut reset_pin;
 };
-extern int ethernet_link(void);
-extern void ethernet_set_link(int speed, int duplex);
+
 
 extern uint32_t str_to_ip(const char* str);
 extern void printfBytes(char* str, uint8_t* buf, int len);