An example project for the Heltec Turtle LoRa board (STM32L4 and SX1276 chips). The projects is only supported for the Nucleo-L432KC board platform in the mbed online and offline compiler environment. Visit www.radioshuttle.de (choose Turtle board) for instructions. Note that most source files and libraries are open source, however some files especially the RadioShuttle core protocol is copyrighted work. Check header for details.

Dependencies:   mbed BufferedSerial SX1276GenericLib OLED_SSD1306 HELIOS_Si7021 NVProperty RadioShuttle-STM32L4 USBDeviceHT

mbed-util.s

Committer:
Helmut Tschemernjak
Date:
5 months ago
Revision:
12:4147e13e23f9
Child:
42:6f83ba18bcea

File content as of revision 12:4147e13e23f9:

; generated by Component: ARM Compiler 5.06 update 4 (build 422) Tool: armcc [4d3604]
; commandline armcc [--cpp --split_sections -c -S --gnu -oBUILD\NUCLEO_L432KC\ARM\mbed-util.o --depend=BUILD\NUCLEO_L432KC\ARM\mbed-util.d --cpu=Cortex-M4.fp --apcs=interwork -O3 -Otime --preinclude=.\BUILD\NUCLEO_L432KC\ARM\mbed_config.h -I. -I./BulkSerial -I./ESP -I./FATFileSystem -I./FATFileSystem/ChaN -I./Flash -I./Flash/MD5 -I./Hardware-STM -I./NVProperty -I./Power -I./RadioShuttleLib -I./RadioShuttleLib/examples -I./RadioShuttleLib/examples/PMSensorRadio -I./RadioShuttleLib/examples/RadioTest -I./RadioShuttleLib/util -I./STM_MEMS -I./SX1276GenericLib -I./SX1276GenericLib/radio -I./SX1276GenericLib/registers -I./SX1276GenericLib/sx1276 -I./USBDeviceHT -I./USBDeviceHT/USBDevice -I./USBDeviceHT/USBSerial -I./USBDeviceHT/USBSerialBuffered -I./USBDeviceHT/targets/TARGET_STM -I./WIZnetInterface -I./WIZnetInterface/Socket -I./WIZnetInterface/arch -I./WIZnetInterface/arch/ext -I./WIZnetInterface/arch/int -I./WakeUpRTC -I./WakeUpRTC/Device -I./WakeUpRTC/Device/LPC1114_WakeInterruptIn -I./ZModem -I./mbed -I./mbed/e95d10626187 -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC/TARGET_STM -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4 -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/device -I./mbed/e95d10626187/drivers -I./mbed/e95d10626187/hal -I./mbed/e95d10626187/platform -D__ASSERT_MSG -DMBED_ROM_START=0x8000000 -DMBED_ROM_SIZE=0x40000 -DDEVICE_CRC=1 -D__MBED__=1 -DDEVICE_I2CSLAVE=1 -D__FPU_PRESENT=1 -DDEVICE_PORTOUT=1 -DDEVICE_PORTINOUT=1 -DTARGET_RTOS_M4_M7 -DDEVICE_RTC=1 -DDEVICE_SERIAL_ASYNCH=1 -D__CMSIS_RTOS -DDEVICE_USTICKER=1 -DDEVICE_CAN=1 -DTARGET_CORTEX_M -DDEVICE_I2C_ASYNCH=1 -DTARGET_LIKE_CORTEX_M4 -DDEVICE_ANALOGOUT=1 -DTARGET_M4 -DARM_MATH_CM4 -DTARGET_STM32L4 -DDEVICE_SPI_ASYNCH=1 -DDEVICE_LPTICKER=1 -DDEVICE_PWMOUT=1 -DTARGET_STM32L432xC -DMBED_BUILD_TIMESTAMP=1548340964.1 -DTARGET_CORTEX -DDEVICE_I2C=1 -DTRANSACTION_QUEUE_SIZE_SPI=2 -D__CORTEX_M4 -DDEVICE_STDIO_MESSAGES=1 -DTARGET_FAMILY_STM32 -DTARGET_FF_ARDUINO -DDEVICE_PORTIN=1 -DTARGET_RELEASE -DTARGET_STM -DTARGET_STM32L432KC -DDEVICE_SERIAL_FC=1 -DDEVICE_TRNG=1 -DTARGET_LIKE_MBED -D__MBED_CMSIS_RTOS_CM -DDEVICE_SLEEP=1 -DDEVICE_SPI=1 -DDEVICE_INTERRUPTIN=1 -DDEVICE_SPISLAVE=1 -DDEVICE_ANALOGIN=1 -DDEVICE_SERIAL=1 -DDEVICE_FLASH=1 -DTARGET_NUCLEO_L432KC -DTOOLCHAIN_ARM -DTOOLCHAIN_ARM_STD --no_vla --multibyte_chars --brief_diagnostics --no_depend_system_headers --restrict --no_rtti .\mbed-util.cpp]
        THUMB
        REQUIRE8
        PRESERVE8

        AREA ||i._Z14BatteryVoltagev||, CODE, READONLY, ALIGN=3

_Z14BatteryVoltagev PROC
        PUSH     {r4-r7,lr}
        LDR      r5,|L0.328|
        VPUSH    {d8}
        SUB      sp,sp,#0x84
        LDR      r0,[r5,#0x4c]
        ORR      r0,r0,#0x2000
        STR      r0,[r5,#0x4c]
        LDR      r0,[r5,#0x4c]
        AND      r0,r0,#0x2000
        STR      r0,[sp,#0x80]
        LDR      r0,[r5,#0x88]
        ORR      r0,r0,#0x30000000
        STR      r0,[r5,#0x88]
        LDR      r6,|L0.332|
        MOV      r0,sp
        STR      r6,[sp,#0]
        BL       HAL_ADC_DeInit
        CMP      r0,#0
        ITTTT    NE
        VMOVNE.F32 s0,#1.00000000
        ADDNE    sp,sp,#0x84
        VPOPNE   {d8}
        POPNE    {r4-r7,pc}
        MOVS     r4,#0
        MOVS     r7,#4
        STRD     r4,r7,[sp,#0x10]
        STR      r4,[sp,#4]
        STR      r4,[sp,#8]
        STR      r4,[sp,#0xc]
        MOVS     r0,#1
        STR      r4,[sp,#0x18]
        STRD     r4,r0,[sp,#0x1c]
        STRD     r4,r0,[sp,#0x24]
        STR      r4,[sp,#0x2c]
        LSLS     r0,r0,#12
        STR      r4,[sp,#0x30]
        STRD     r4,r0,[sp,#0x34]
        MOV      r0,sp
        STR      r4,[sp,#0x3c]
        BL       HAL_ADC_Init
        CMP      r0,#0
        ITTTT    NE
        VMOVNE.F32 s0,#2.00000000
        ADDNE    sp,sp,#0x84
        VPOPNE   {d8}
        POPNE    {r4-r7,pc}
        LDR      r0,|L0.336|
        STR      r0,[sp,#0x68]
        MOVS     r0,#6
        STR      r0,[sp,#0x6c]
        MOVS     r0,#7
        STR      r0,[sp,#0x70]
        MOVS     r0,#0x7f
        STR      r4,[sp,#0x7c]
        STRD     r0,r7,[sp,#0x74]
        ADD      r1,sp,#0x68
        MOV      r0,sp
        BL       HAL_ADC_ConfigChannel
        CMP      r0,#0
        ITTTT    NE
        VMOVNE.F32 s0,#3.00000000
        ADDNE    sp,sp,#0x84
        VPOPNE   {d8}
        POPNE    {r4-r7,pc}
        MOVS     r1,#0x7f
        MOV      r0,sp
        BL       HAL_ADCEx_Calibration_Start
        CMP      r0,#0
        ITTTT    NE
        VMOVNE.F32 s0,#4.00000000
        ADDNE    sp,sp,#0x84
        VPOPNE   {d8}
        POPNE    {r4-r7,pc}
        MOV      r0,sp
        BL       HAL_ADC_Start
        CMP      r0,#0
        ITTTT    NE
        VMOVNE.F32 s0,#5.00000000
        ADDNE    sp,sp,#0x84
        VPOPNE   {d8}
        POPNE    {r4-r7,pc}
        MOVS     r1,#0xa
        MOV      r0,sp
        BL       HAL_ADC_PollForConversion
        CMP      r0,#0
        ITTTT    NE
        VMOVNE.F32 s0,#6.00000000
        ADDNE    sp,sp,#0x84
        VPOPNE   {d8}
        POPNE    {r4-r7,pc}
        MOV      r0,sp
        BL       HAL_ADC_GetValue
        LDR      r1,|L0.340|
        UDIV     r0,r1,r0
        BL       __aeabi_ui2d
        VLDR     d1,|L0.344|
        VMOV     r2,r3,d1
        BL       __aeabi_ddiv
        BL       __aeabi_d2f
        VMOV     s16,r0
        MOV      r0,sp
        BL       ADC_Disable
        MOV      r0,sp
        BL       HAL_ADC_DeInit
        LDR      r0,[r5,#0x88]
        BIC      r0,r0,#0x30000000
        STR      r0,[r5,#0x88]
        LDR      r0,[r5,#0x4c]
        BIC      r0,r0,#0x2000
        STR      r0,[r5,#0x4c]
        LDR      r0,[r6,#8]
        BIC      r0,r0,#0x1800000
        STR      r0,[r6,#8]
        ADD      sp,sp,#0x84
        VMOV.F32 s0,s16
        VPOP     {d8}
        POP      {r4-r7,pc}
        ENDP

        DCW      0x0000
|L0.328|
        DCD      0x40021000
|L0.332|
        DCD      0x50040000
|L0.336|
        DCD      0x80000001
|L0.340|
        DCD      0x004afb50
|L0.344|
        DCFD     0x408f400000000000 ; 1000

        AREA ||i._Z5CPUIDPhij||, CODE, READONLY, ALIGN=2

_Z5CPUIDPhij PROC
        LDR      r3,|L1.48|
        CMP      r1,#0x10
        ITT      LT
        MOVLT    r0,#0
        BXLT     lr
        EOR      r1,r3,r2
        LDR      r2,[r1,#0]
        STR      r2,[r0,#0]
        LDR      r2,[r1,#4]
        STR      r2,[r0,#4]
        LDR      r1,[r1,#8]
        STR      r1,[r0,#8]
        LDR      r1,|L1.52|
        LDR      r2,|L1.56|
        LDRB     r1,[r1,#0]
        LDRH     r2,[r2,#0]
        AND      r1,r1,#0x1f
        ORR      r1,r1,r2,LSL #16
        STR      r1,[r0,#0xc]
        MOVS     r0,#0x10
        BX       lr
        ENDP

|L1.48|
        DCD      0x4aaa20c5
|L1.52|
        DCD      0x1fff7500
|L1.56|
        DCD      0x1fff75e0

        AREA ||i._Z8OTPWritePhPKvj||, CODE, READONLY, ALIGN=1

_Z8OTPWritePhPKvj PROC
        PUSH     {r4-r6,lr}
        SUB      sp,sp,#8
        MOV      r6,r2
        MOV      r4,r1
        MOV      r5,r0
        BL       HAL_FLASH_Unlock
        CBZ      r6,|L2.84|
|L2.16|
        LDRB     r0,[r4,#0]
        STRB     r0,[sp,#0]
        LDRB     r0,[r4,#1]
        STRB     r0,[sp,#1]
        LDRB     r0,[r4,#2]
        STRB     r0,[sp,#2]
        LDRB     r0,[r4,#3]
        STRB     r0,[sp,#3]
        LDRB     r0,[r4,#4]
        STRB     r0,[sp,#4]
        LDRB     r0,[r4,#5]
        STRB     r0,[sp,#5]
        LDRB     r0,[r4,#6]
        STRB     r0,[sp,#6]
        LDRB     r0,[r4,#7]
        STRB     r0,[sp,#7]
        LDRD     r2,r3,[sp,#0]
        MOV      r1,r5
        MOVS     r0,#0
        BL       HAL_FLASH_Program
        ADDS     r4,r4,#8
        ADDS     r5,r5,#8
        SUBS     r6,r6,#8
        BNE      |L2.16|
|L2.84|
        ADD      sp,sp,#8
        POP      {r4-r6,lr}
        B.W      HAL_FLASH_Lock
        ENDP


        AREA ||.ARM.exidx||, LINKORDER=||i._Z5CPUIDPhij||, DATA, READONLY, SECTYPE={SHT_ARM_EXIDX}, ALIGN=2

        DCD      0x00000000
        RELOC 42, ||i._Z5CPUIDPhij||
        DCD      0x00000001

        AREA ||area_number.4||, LINKORDER=||i._Z14BatteryVoltagev||, DATA, READONLY, SECTYPE={SHT_ARM_EXIDX}, ALIGN=2

        EXPORTAS ||area_number.4||, ||.ARM.exidx||
        DCD      0x00000000
        RELOC 42, ||i._Z14BatteryVoltagev||
        DCD      0x00000001

        AREA ||area_number.5||, LINKORDER=||i._Z8OTPWritePhPKvj||, DATA, READONLY, SECTYPE={SHT_ARM_EXIDX}, ALIGN=2

        EXPORTAS ||area_number.5||, ||.ARM.exidx||
        DCD      0x00000000
        RELOC 42, ||i._Z8OTPWritePhPKvj||
        DCD      0x00000001

        AREA ||.arm_vfe_header||, DATA, READONLY, NOALLOC, ALIGN=2

        DCD      0x00000000

;*** Start embedded assembler ***

#line 1 ".\\mbed-util.cpp"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___13_mbed_util_cpp_f390ad65___Z7__REV16j|
#line 468 "./mbed/e95d10626187/TARGET_NUCLEO_L432KC/cmsis_armcc.h"
|__asm___13_mbed_util_cpp_f390ad65___Z7__REV16j| PROC
#line 469

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___13_mbed_util_cpp_f390ad65___Z7__REVSHs|
#line 483
|__asm___13_mbed_util_cpp_f390ad65___Z7__REVSHs| PROC
#line 484

 revsh r0, r0
 bx lr
	ENDP
	AREA ||.rrx_text||, CODE
	THUMB
	EXPORT |__asm___13_mbed_util_cpp_f390ad65___Z5__RRXj|
#line 670
|__asm___13_mbed_util_cpp_f390ad65___Z5__RRXj| PROC
#line 671

 rrx r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***

        EXPORT _Z14BatteryVoltagev [CODE]
        EXPORT _Z5CPUIDPhij [CODE]
        EXPORT _Z8OTPWritePhPKvj [CODE]

        IMPORT ||Lib$$Request$$armlib|| [CODE,WEAK]
        IMPORT ||Lib$$Request$$cpplib|| [CODE,WEAK]
        IMPORT HAL_ADC_DeInit [CODE]
        IMPORT HAL_ADC_Init [CODE]
        IMPORT HAL_ADC_ConfigChannel [CODE]
        IMPORT HAL_ADCEx_Calibration_Start [CODE]
        IMPORT HAL_ADC_Start [CODE]
        IMPORT HAL_ADC_PollForConversion [CODE]
        IMPORT HAL_ADC_GetValue [CODE]
        IMPORT __aeabi_ui2d [CODE]
        IMPORT __aeabi_ddiv [CODE]
        IMPORT __aeabi_d2f [CODE]
        IMPORT ADC_Disable [CODE]
        IMPORT HAL_FLASH_Unlock [CODE]
        IMPORT HAL_FLASH_Program [CODE]
        IMPORT HAL_FLASH_Lock [CODE]

        ATTR FILESCOPE
        ATTR SETVALUE Tag_ABI_PCS_wchar_t,2
        ATTR SETVALUE Tag_ABI_enum_size,1
        ATTR SETVALUE Tag_ABI_optimization_goals,2
        ATTR SETSTRING Tag_conformance,"2.09"
        ATTR SETVALUE AV,6,0
        ATTR SETVALUE AV,18,1

        ASSERT {ENDIAN} = "little"
        ASSERT {INTER} = {TRUE}
        ASSERT {ROPI} = {FALSE}
        ASSERT {RWPI} = {FALSE}
        ASSERT {IEEE_FULL} = {FALSE}
        ASSERT {IEEE_PART} = {FALSE}
        ASSERT {IEEE_JAVA} = {FALSE}
        END