LPC11U35 ADC Tick & USBSerial

Dependencies:   mbed

Dependents:   SmallDoseMeter_SingleCH_AE_lpc11u35_V1_00

Committer:
H_Tsunemoto
Date:
Mon Feb 19 09:09:52 2018 +0000
Revision:
1:b1a3be5f48ab
Parent:
0:871ab6846b18
test

Who changed what in which revision?

UserRevisionLine numberNew contents of line
H_Tsunemoto 0:871ab6846b18 1 /* mbed Microcontroller Library
H_Tsunemoto 0:871ab6846b18 2 * Copyright (c) 2006-2013 ARM Limited
H_Tsunemoto 0:871ab6846b18 3 *
H_Tsunemoto 0:871ab6846b18 4 * Licensed under the Apache License, Version 2.0 (the "License");
H_Tsunemoto 0:871ab6846b18 5 * you may not use this file except in compliance with the License.
H_Tsunemoto 0:871ab6846b18 6 * You may obtain a copy of the License at
H_Tsunemoto 0:871ab6846b18 7 *
H_Tsunemoto 0:871ab6846b18 8 * http://www.apache.org/licenses/LICENSE-2.0
H_Tsunemoto 0:871ab6846b18 9 *
H_Tsunemoto 0:871ab6846b18 10 * Unless required by applicable law or agreed to in writing, software
H_Tsunemoto 0:871ab6846b18 11 * distributed under the License is distributed on an "AS IS" BASIS,
H_Tsunemoto 0:871ab6846b18 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
H_Tsunemoto 0:871ab6846b18 13 * See the License for the specific language governing permissions and
H_Tsunemoto 0:871ab6846b18 14 * limitations under the License.
H_Tsunemoto 0:871ab6846b18 15 */
H_Tsunemoto 0:871ab6846b18 16 #ifndef MBED_SPISLAVE_H
H_Tsunemoto 0:871ab6846b18 17 #define MBED_SPISLAVE_H
H_Tsunemoto 0:871ab6846b18 18
H_Tsunemoto 0:871ab6846b18 19 #include "platform.h"
H_Tsunemoto 0:871ab6846b18 20
H_Tsunemoto 0:871ab6846b18 21 #if DEVICE_SPISLAVE
H_Tsunemoto 0:871ab6846b18 22
H_Tsunemoto 0:871ab6846b18 23 #include "spi_api.h"
H_Tsunemoto 0:871ab6846b18 24
H_Tsunemoto 0:871ab6846b18 25 namespace mbed {
H_Tsunemoto 0:871ab6846b18 26
H_Tsunemoto 0:871ab6846b18 27 /** A SPI slave, used for communicating with a SPI Master device
H_Tsunemoto 0:871ab6846b18 28 *
H_Tsunemoto 0:871ab6846b18 29 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
H_Tsunemoto 0:871ab6846b18 30 *
H_Tsunemoto 0:871ab6846b18 31 * Example:
H_Tsunemoto 0:871ab6846b18 32 * @code
H_Tsunemoto 0:871ab6846b18 33 * // Reply to a SPI master as slave
H_Tsunemoto 0:871ab6846b18 34 *
H_Tsunemoto 0:871ab6846b18 35 * #include "mbed.h"
H_Tsunemoto 0:871ab6846b18 36 *
H_Tsunemoto 0:871ab6846b18 37 * SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
H_Tsunemoto 0:871ab6846b18 38 *
H_Tsunemoto 0:871ab6846b18 39 * int main() {
H_Tsunemoto 0:871ab6846b18 40 * device.reply(0x00); // Prime SPI with first reply
H_Tsunemoto 0:871ab6846b18 41 * while(1) {
H_Tsunemoto 0:871ab6846b18 42 * if(device.receive()) {
H_Tsunemoto 0:871ab6846b18 43 * int v = device.read(); // Read byte from master
H_Tsunemoto 0:871ab6846b18 44 * v = (v + 1) % 0x100; // Add one to it, modulo 256
H_Tsunemoto 0:871ab6846b18 45 * device.reply(v); // Make this the next reply
H_Tsunemoto 0:871ab6846b18 46 * }
H_Tsunemoto 0:871ab6846b18 47 * }
H_Tsunemoto 0:871ab6846b18 48 * }
H_Tsunemoto 0:871ab6846b18 49 * @endcode
H_Tsunemoto 0:871ab6846b18 50 */
H_Tsunemoto 0:871ab6846b18 51 class SPISlave {
H_Tsunemoto 0:871ab6846b18 52
H_Tsunemoto 0:871ab6846b18 53 public:
H_Tsunemoto 0:871ab6846b18 54
H_Tsunemoto 0:871ab6846b18 55 /** Create a SPI slave connected to the specified pins
H_Tsunemoto 0:871ab6846b18 56 *
H_Tsunemoto 0:871ab6846b18 57 * Pin Options:
H_Tsunemoto 0:871ab6846b18 58 * (5, 6, 7i, 8) or (11, 12, 13, 14)
H_Tsunemoto 0:871ab6846b18 59 *
H_Tsunemoto 0:871ab6846b18 60 * mosi or miso can be specfied as NC if not used
H_Tsunemoto 0:871ab6846b18 61 *
H_Tsunemoto 0:871ab6846b18 62 * @param mosi SPI Master Out, Slave In pin
H_Tsunemoto 0:871ab6846b18 63 * @param miso SPI Master In, Slave Out pin
H_Tsunemoto 0:871ab6846b18 64 * @param sclk SPI Clock pin
H_Tsunemoto 0:871ab6846b18 65 * @param ssel SPI chip select pin
H_Tsunemoto 0:871ab6846b18 66 * @param name (optional) A string to identify the object
H_Tsunemoto 0:871ab6846b18 67 */
H_Tsunemoto 0:871ab6846b18 68 SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel);
H_Tsunemoto 0:871ab6846b18 69
H_Tsunemoto 0:871ab6846b18 70 /** Configure the data transmission format
H_Tsunemoto 0:871ab6846b18 71 *
H_Tsunemoto 0:871ab6846b18 72 * @param bits Number of bits per SPI frame (4 - 16)
H_Tsunemoto 0:871ab6846b18 73 * @param mode Clock polarity and phase mode (0 - 3)
H_Tsunemoto 0:871ab6846b18 74 *
H_Tsunemoto 0:871ab6846b18 75 * @code
H_Tsunemoto 0:871ab6846b18 76 * mode | POL PHA
H_Tsunemoto 0:871ab6846b18 77 * -----+--------
H_Tsunemoto 0:871ab6846b18 78 * 0 | 0 0
H_Tsunemoto 0:871ab6846b18 79 * 1 | 0 1
H_Tsunemoto 0:871ab6846b18 80 * 2 | 1 0
H_Tsunemoto 0:871ab6846b18 81 * 3 | 1 1
H_Tsunemoto 0:871ab6846b18 82 * @endcode
H_Tsunemoto 0:871ab6846b18 83 */
H_Tsunemoto 0:871ab6846b18 84 void format(int bits, int mode = 0);
H_Tsunemoto 0:871ab6846b18 85
H_Tsunemoto 0:871ab6846b18 86 /** Set the spi bus clock frequency
H_Tsunemoto 0:871ab6846b18 87 *
H_Tsunemoto 0:871ab6846b18 88 * @param hz SCLK frequency in hz (default = 1MHz)
H_Tsunemoto 0:871ab6846b18 89 */
H_Tsunemoto 0:871ab6846b18 90 void frequency(int hz = 1000000);
H_Tsunemoto 0:871ab6846b18 91
H_Tsunemoto 0:871ab6846b18 92 /** Polls the SPI to see if data has been received
H_Tsunemoto 0:871ab6846b18 93 *
H_Tsunemoto 0:871ab6846b18 94 * @returns
H_Tsunemoto 0:871ab6846b18 95 * 0 if no data,
H_Tsunemoto 0:871ab6846b18 96 * 1 otherwise
H_Tsunemoto 0:871ab6846b18 97 */
H_Tsunemoto 0:871ab6846b18 98 int receive(void);
H_Tsunemoto 0:871ab6846b18 99
H_Tsunemoto 0:871ab6846b18 100 /** Retrieve data from receive buffer as slave
H_Tsunemoto 0:871ab6846b18 101 *
H_Tsunemoto 0:871ab6846b18 102 * @returns
H_Tsunemoto 0:871ab6846b18 103 * the data in the receive buffer
H_Tsunemoto 0:871ab6846b18 104 */
H_Tsunemoto 0:871ab6846b18 105 int read(void);
H_Tsunemoto 0:871ab6846b18 106
H_Tsunemoto 0:871ab6846b18 107 /** Fill the transmission buffer with the value to be written out
H_Tsunemoto 0:871ab6846b18 108 * as slave on the next received message from the master.
H_Tsunemoto 0:871ab6846b18 109 *
H_Tsunemoto 0:871ab6846b18 110 * @param value the data to be transmitted next
H_Tsunemoto 0:871ab6846b18 111 */
H_Tsunemoto 0:871ab6846b18 112 void reply(int value);
H_Tsunemoto 0:871ab6846b18 113
H_Tsunemoto 0:871ab6846b18 114 protected:
H_Tsunemoto 0:871ab6846b18 115 spi_t _spi;
H_Tsunemoto 0:871ab6846b18 116
H_Tsunemoto 0:871ab6846b18 117 int _bits;
H_Tsunemoto 0:871ab6846b18 118 int _mode;
H_Tsunemoto 0:871ab6846b18 119 int _hz;
H_Tsunemoto 0:871ab6846b18 120 };
H_Tsunemoto 0:871ab6846b18 121
H_Tsunemoto 0:871ab6846b18 122 } // namespace mbed
H_Tsunemoto 0:871ab6846b18 123
H_Tsunemoto 0:871ab6846b18 124 #endif
H_Tsunemoto 0:871ab6846b18 125
H_Tsunemoto 0:871ab6846b18 126 #endif