Thi s library works either for lpc1768 or lpc4088 QSB

Fork of I2SSlave by Suga koubou

Committer:
Grag38
Date:
Sat Jul 23 21:07:00 2016 +0000
Revision:
6:ed59a9124517
Parent:
5:9dfdde33be7e
I2SSlave Library for LPC4088 and LPC1768 Mbed

Who changed what in which revision?

UserRevisionLine numberNew contents of line
d_worrall 0:e62e06e11575 1 /**
d_worrall 0:e62e06e11575 2 * @author Daniel Worrall
d_worrall 0:e62e06e11575 3 *
d_worrall 0:e62e06e11575 4 * @section LICENSE
d_worrall 0:e62e06e11575 5 *
d_worrall 0:e62e06e11575 6 * Copyright (c) 2011 mbed
d_worrall 0:e62e06e11575 7 *
d_worrall 0:e62e06e11575 8 * Permission is hereby granted, free of charge, to any person obtaining a copy
d_worrall 0:e62e06e11575 9 * of this software and associated documentation files (the "Software"), to deal
d_worrall 0:e62e06e11575 10 * in the Software without restriction, including without limitation the rights
d_worrall 0:e62e06e11575 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
d_worrall 0:e62e06e11575 12 * copies of the Software, and to permit persons to whom the Software is
d_worrall 0:e62e06e11575 13 * furnished to do so, subject to the following conditions:
d_worrall 0:e62e06e11575 14 *
d_worrall 0:e62e06e11575 15 * The above copyright notice and this permission notice shall be included in
d_worrall 0:e62e06e11575 16 * all copies or substantial portions of the Software.
d_worrall 0:e62e06e11575 17 *
d_worrall 0:e62e06e11575 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
d_worrall 0:e62e06e11575 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
d_worrall 0:e62e06e11575 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
d_worrall 0:e62e06e11575 21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
d_worrall 0:e62e06e11575 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
d_worrall 0:e62e06e11575 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
d_worrall 0:e62e06e11575 24 * THE SOFTWARE.
d_worrall 0:e62e06e11575 25 *
d_worrall 0:e62e06e11575 26 * @section DESCRIPTION
d_worrall 0:e62e06e11575 27 * I2S port abstraction library cpp file for NXP LPC1768
d_worrall 0:e62e06e11575 28 *
d_worrall 0:e62e06e11575 29 */
d_worrall 0:e62e06e11575 30 #include "I2SSlave.h"
d_worrall 0:e62e06e11575 31 /*Global Functions*/
d_worrall 0:e62e06e11575 32 FunctionPointer akjnh3489v8ncv;
d_worrall 0:e62e06e11575 33
d_worrall 0:e62e06e11575 34 extern "C" void I2S_IRQHandler(void){ //this is a very special function so can remain outside
d_worrall 0:e62e06e11575 35 akjnh3489v8ncv.call();
d_worrall 0:e62e06e11575 36 }
d_worrall 0:e62e06e11575 37 /******************************************************
d_worrall 0:e62e06e11575 38 * Function name: I2SSlave
d_worrall 0:e62e06e11575 39 *
d_worrall 0:e62e06e11575 40 * Description: class constructor
d_worrall 0:e62e06e11575 41 *
d_worrall 0:e62e06e11575 42 * Parameters: PinName tx_sda, PinName tx_ws, PinName clk, PinName rx_sda, PinName rx_ws
d_worrall 0:e62e06e11575 43 * Returns: none
d_worrall 0:e62e06e11575 44 ******************************************************/
d_worrall 0:e62e06e11575 45 //Constructor
d_worrall 0:e62e06e11575 46 I2SSlave::I2SSlave(PinName tx_sda, PinName tx_ws, PinName clk, PinName rx_sda, PinName rx_ws){
d_worrall 0:e62e06e11575 47 storePins_(tx_sda, tx_ws, clk, rx_sda, rx_ws);
d_worrall 0:e62e06e11575 48 format(16, STEREO); //this also invokes initialize so no need to call it twice
d_worrall 0:e62e06e11575 49 }
d_worrall 0:e62e06e11575 50 //Public functions
d_worrall 0:e62e06e11575 51 /******************************************************
d_worrall 0:e62e06e11575 52 * Function name: format()
d_worrall 0:e62e06e11575 53 *
d_worrall 0:e62e06e11575 54 * Description: sets the bit length for writing and stereo or mono mode
d_worrall 0:e62e06e11575 55 *
d_worrall 0:e62e06e11575 56 * Parameters: int bit, bool mode
d_worrall 0:e62e06e11575 57 * Returns: none
d_worrall 0:e62e06e11575 58 ******************************************************/
d_worrall 0:e62e06e11575 59 void I2SSlave::format(int bit, bool mode){
d_worrall 0:e62e06e11575 60 bit_ = bit;
d_worrall 0:e62e06e11575 61 mode_ = mode;
d_worrall 0:e62e06e11575 62 initialize_(tx_sda_, tx_ws_, clk_, rx_sda_, rx_ws_);
d_worrall 0:e62e06e11575 63 }
d_worrall 0:e62e06e11575 64 /******************************************************
d_worrall 0:e62e06e11575 65 * Function name: write()
d_worrall 0:e62e06e11575 66 *
d_worrall 0:e62e06e11575 67 * Description: load buffer to write to I2S port
d_worrall 0:e62e06e11575 68 *
d_worrall 0:e62e06e11575 69 * Parameters: long *buffer
d_worrall 0:e62e06e11575 70 * Returns: none
d_worrall 0:e62e06e11575 71 ******************************************************/
d_worrall 0:e62e06e11575 72 void I2SSlave::write(int* buffer, int from, int length){
d_worrall 0:e62e06e11575 73 int to = from + length;
d_worrall 0:e62e06e11575 74 for(int i = from; i < to; ++i){
okini3939 5:9dfdde33be7e 75 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
d_worrall 0:e62e06e11575 76 LPC_I2S->I2STXFIFO = buffer[i];
okini3939 5:9dfdde33be7e 77 #elif defined(TARGET_LPC4088)
okini3939 5:9dfdde33be7e 78 LPC_I2S->TXFIFO = buffer[i];
okini3939 5:9dfdde33be7e 79 #endif
d_worrall 0:e62e06e11575 80 }
d_worrall 0:e62e06e11575 81 }
d_worrall 0:e62e06e11575 82 /******************************************************
d_worrall 0:e62e06e11575 83 * Function name: start()
d_worrall 0:e62e06e11575 84 *
d_worrall 0:e62e06e11575 85 * Description: attach streamOut_ function to ticker interrupt
d_worrall 0:e62e06e11575 86 *
d_worrall 0:e62e06e11575 87 * Parameters: none
d_worrall 0:e62e06e11575 88 * Returns: none
d_worrall 0:e62e06e11575 89 ******************************************************/
d_worrall 0:e62e06e11575 90 void I2SSlave::start(int mode){
okini3939 5:9dfdde33be7e 91 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
d_worrall 0:e62e06e11575 92 switch(mode){
d_worrall 0:e62e06e11575 93 case(0):
d_worrall 0:e62e06e11575 94 LPC_I2S->I2SIRQ |= (0 << 0); //disable receive interrupt
d_worrall 0:e62e06e11575 95 LPC_I2S->I2SIRQ |= (0 << 1); //disable transmit interrupt
d_worrall 0:e62e06e11575 96 break;
d_worrall 0:e62e06e11575 97 case(1):
d_worrall 0:e62e06e11575 98 LPC_I2S->I2SIRQ |= (0 << 0); //disable receive interrupt
d_worrall 0:e62e06e11575 99 LPC_I2S->I2SIRQ |= (1 << 1); //enable transmit interrupt
d_worrall 0:e62e06e11575 100 LPC_I2S->I2SIRQ |= (0 << 16); //set I2STXFIFO depth to 0 words
d_worrall 0:e62e06e11575 101 break;
d_worrall 0:e62e06e11575 102 case(2):
d_worrall 0:e62e06e11575 103 LPC_I2S->I2SIRQ |= (1 << 0); //enable receive interrupt
d_worrall 0:e62e06e11575 104 LPC_I2S->I2SIRQ |= (0 << 1); //disable transmit interrupt
d_worrall 0:e62e06e11575 105 LPC_I2S->I2SIRQ |= (4 << 8); //set I2SRXFIFO depth to 4 words
d_worrall 0:e62e06e11575 106 break;
d_worrall 0:e62e06e11575 107 case(3):
d_worrall 0:e62e06e11575 108 LPC_I2S->I2SIRQ |= (1 << 0); //enable receive interrupt
d_worrall 0:e62e06e11575 109 LPC_I2S->I2SIRQ |= (4 << 8); //set I2SRXFIFO depth to 4 words
d_worrall 0:e62e06e11575 110 LPC_I2S->I2SIRQ |= (1 << 1); //enable transmit interrupt
d_worrall 0:e62e06e11575 111 LPC_I2S->I2SIRQ |= (0 << 16); //set I2STXFIFO depth to 0 words
d_worrall 0:e62e06e11575 112 break;
d_worrall 0:e62e06e11575 113 default:
d_worrall 0:e62e06e11575 114 break;
okini3939 5:9dfdde33be7e 115 #elif defined(TARGET_LPC4088)
okini3939 5:9dfdde33be7e 116 switch(mode){
okini3939 5:9dfdde33be7e 117 case(0):
okini3939 5:9dfdde33be7e 118 LPC_I2S->IRQ |= (0 << 0); //disable receive interrupt
okini3939 5:9dfdde33be7e 119 LPC_I2S->IRQ |= (0 << 1); //disable transmit interrupt
okini3939 5:9dfdde33be7e 120 break;
okini3939 5:9dfdde33be7e 121 case(1):
okini3939 5:9dfdde33be7e 122 LPC_I2S->IRQ |= (0 << 0); //disable receive interrupt
okini3939 5:9dfdde33be7e 123 LPC_I2S->IRQ |= (1 << 1); //enable transmit interrupt
okini3939 5:9dfdde33be7e 124 LPC_I2S->IRQ |= (0 << 16); //set I2STXFIFO depth to 0 words
okini3939 5:9dfdde33be7e 125 break;
okini3939 5:9dfdde33be7e 126 case(2):
okini3939 5:9dfdde33be7e 127 LPC_I2S->IRQ |= (1 << 0); //enable receive interrupt
okini3939 5:9dfdde33be7e 128 LPC_I2S->IRQ |= (0 << 1); //disable transmit interrupt
okini3939 5:9dfdde33be7e 129 LPC_I2S->IRQ |= (4 << 8); //set I2SRXFIFO depth to 4 words
okini3939 5:9dfdde33be7e 130 break;
okini3939 5:9dfdde33be7e 131 case(3):
okini3939 5:9dfdde33be7e 132 LPC_I2S->IRQ |= (1 << 0); //enable receive interrupt
okini3939 5:9dfdde33be7e 133 LPC_I2S->IRQ |= (4 << 8); //set I2SRXFIFO depth to 4 words
okini3939 5:9dfdde33be7e 134 LPC_I2S->IRQ |= (1 << 1); //enable transmit interrupt
okini3939 5:9dfdde33be7e 135 LPC_I2S->IRQ |= (0 << 16); //set I2STXFIFO depth to 0 words
okini3939 5:9dfdde33be7e 136 break;
okini3939 5:9dfdde33be7e 137 default:
okini3939 5:9dfdde33be7e 138 break;
d_worrall 0:e62e06e11575 139 }
okini3939 5:9dfdde33be7e 140 #endif
d_worrall 0:e62e06e11575 141 NVIC_SetPriority(I2S_IRQn, 0);
d_worrall 0:e62e06e11575 142 NVIC_EnableIRQ(I2S_IRQn); //enable I2S interrupt in the NVIC
d_worrall 0:e62e06e11575 143 }
d_worrall 0:e62e06e11575 144 /******************************************************
d_worrall 0:e62e06e11575 145 * Function name: stop()
d_worrall 0:e62e06e11575 146 *
d_worrall 0:e62e06e11575 147 * Description: detach streamOut_ from ticker
d_worrall 0:e62e06e11575 148 *
d_worrall 0:e62e06e11575 149 * Parameters: none
d_worrall 0:e62e06e11575 150 * Returns: none
d_worrall 0:e62e06e11575 151 ******************************************************/
d_worrall 0:e62e06e11575 152 void I2SSlave::stop(void){
d_worrall 0:e62e06e11575 153 NVIC_DisableIRQ(I2S_IRQn);
d_worrall 0:e62e06e11575 154 }
d_worrall 0:e62e06e11575 155 /******************************************************
d_worrall 0:e62e06e11575 156 * Function name: read()
d_worrall 0:e62e06e11575 157 *
d_worrall 0:e62e06e11575 158 * Description: reads FIFORX buffer into [int32_t rxBuffer[8]]
d_worrall 0:e62e06e11575 159 *
d_worrall 0:e62e06e11575 160 * Parameters: none
d_worrall 0:e62e06e11575 161 * Returns: none
d_worrall 0:e62e06e11575 162 ******************************************************/
d_worrall 0:e62e06e11575 163 void I2SSlave::read(void){
okini3939 5:9dfdde33be7e 164 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
d_worrall 0:e62e06e11575 165 rxBuffer[0] = LPC_I2S->I2SRXFIFO;
d_worrall 0:e62e06e11575 166 rxBuffer[1] = LPC_I2S->I2SRXFIFO;
d_worrall 0:e62e06e11575 167 rxBuffer[2] = LPC_I2S->I2SRXFIFO;
d_worrall 0:e62e06e11575 168 rxBuffer[3] = LPC_I2S->I2SRXFIFO;
okini3939 5:9dfdde33be7e 169 #elif defined(TARGET_LPC4088)
okini3939 5:9dfdde33be7e 170 rxBuffer[0] = LPC_I2S->RXFIFO;
okini3939 5:9dfdde33be7e 171 rxBuffer[1] = LPC_I2S->RXFIFO;
okini3939 5:9dfdde33be7e 172 rxBuffer[2] = LPC_I2S->RXFIFO;
okini3939 5:9dfdde33be7e 173 rxBuffer[3] = LPC_I2S->RXFIFO;
okini3939 5:9dfdde33be7e 174 #endif
d_worrall 0:e62e06e11575 175 }
d_worrall 0:e62e06e11575 176 /******************************************************
d_worrall 0:e62e06e11575 177 * Function name: status_()
d_worrall 0:e62e06e11575 178 *
d_worrall 0:e62e06e11575 179 * Description: Read I2SSTATE register
d_worrall 0:e62e06e11575 180 *
d_worrall 0:e62e06e11575 181 * Parameters: none
d_worrall 0:e62e06e11575 182 * Returns: int
d_worrall 0:e62e06e11575 183 ******************************************************/
d_worrall 0:e62e06e11575 184 int I2SSlave::status(void){
okini3939 5:9dfdde33be7e 185 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
d_worrall 0:e62e06e11575 186 return LPC_I2S->I2SSTATE;
okini3939 5:9dfdde33be7e 187 #elif defined(TARGET_LPC4088)
okini3939 5:9dfdde33be7e 188 return LPC_I2S->STATE;
okini3939 5:9dfdde33be7e 189 #endif
d_worrall 0:e62e06e11575 190 }
d_worrall 0:e62e06e11575 191 //Private functions
d_worrall 0:e62e06e11575 192 /******************************************************
d_worrall 0:e62e06e11575 193 * Function name: initialize()
d_worrall 0:e62e06e11575 194 *
d_worrall 0:e62e06e11575 195 * Description: initialises I2S port
d_worrall 0:e62e06e11575 196 *
d_worrall 0:e62e06e11575 197 * Parameters: PinName tx_sda, PinName tx_ws, PinName clk, PinName rx_sda, PinName rx_ws
d_worrall 0:e62e06e11575 198 * Returns: 0 = successful initialisation
d_worrall 0:e62e06e11575 199 -1 = initialisation failure
d_worrall 0:e62e06e11575 200 ******************************************************/
d_worrall 0:e62e06e11575 201 int I2SSlave::initialize_(PinName tx_sda, PinName tx_ws, PinName clk, PinName rx_sda, PinName rx_ws){
d_worrall 0:e62e06e11575 202 setPins_(tx_sda, tx_ws, clk, rx_sda, rx_ws); //designate pins
d_worrall 0:e62e06e11575 203 LPC_SC->PCONP |= (1 << 27);
d_worrall 0:e62e06e11575 204 //configure input/output register
d_worrall 0:e62e06e11575 205 format_(bit_, mode_);
okini3939 5:9dfdde33be7e 206 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
d_worrall 0:e62e06e11575 207 //set mbed as SLAVE
d_worrall 0:e62e06e11575 208 LPC_I2S->I2SDAO |= (1 << 5);
d_worrall 0:e62e06e11575 209 LPC_I2S->I2SDAI |= (1 << 5);
d_worrall 0:e62e06e11575 210 //clock mode
d_worrall 0:e62e06e11575 211 setClocks_(4);
d_worrall 0:e62e06e11575 212 //set slave mode
d_worrall 0:e62e06e11575 213 modeConfig_();
d_worrall 0:e62e06e11575 214 //set receiver mode
d_worrall 0:e62e06e11575 215 LPC_I2S->I2SRXMODE |= (1 << 1);
d_worrall 0:e62e06e11575 216 //slave mode
d_worrall 0:e62e06e11575 217 LPC_I2S->I2STXRATE = 0;
d_worrall 0:e62e06e11575 218 LPC_I2S->I2SRXRATE = 0;
d_worrall 0:e62e06e11575 219 //Start
d_worrall 0:e62e06e11575 220 LPC_I2S->I2SDAO |= (0 << 3);
d_worrall 0:e62e06e11575 221 LPC_I2S->I2SDAI |= (0 << 3);
d_worrall 0:e62e06e11575 222 LPC_I2S->I2SDAO |= (0 << 4);
d_worrall 0:e62e06e11575 223 LPC_I2S->I2SDAI |= (0 << 4);
d_worrall 0:e62e06e11575 224 LPC_I2S->I2SDAO |= (0 << 15);
okini3939 5:9dfdde33be7e 225 #elif defined(TARGET_LPC4088)
okini3939 5:9dfdde33be7e 226 //set mbed as SLAVE
okini3939 5:9dfdde33be7e 227 LPC_I2S->DAO |= (1 << 5);
okini3939 5:9dfdde33be7e 228 LPC_I2S->DAI |= (1 << 5);
okini3939 5:9dfdde33be7e 229 //clock mode
okini3939 5:9dfdde33be7e 230 setClocks_(4);
okini3939 5:9dfdde33be7e 231 //set slave mode
okini3939 5:9dfdde33be7e 232 modeConfig_();
okini3939 5:9dfdde33be7e 233 //set receiver mode
okini3939 5:9dfdde33be7e 234 LPC_I2S->RXMODE |= (1 << 1);
okini3939 5:9dfdde33be7e 235 //slave mode
okini3939 5:9dfdde33be7e 236 LPC_I2S->TXRATE = 0;
okini3939 5:9dfdde33be7e 237 LPC_I2S->RXRATE = 0;
okini3939 5:9dfdde33be7e 238 //Start
okini3939 5:9dfdde33be7e 239 LPC_I2S->DAO |= (0 << 3);
okini3939 5:9dfdde33be7e 240 LPC_I2S->DAI |= (0 << 3);
okini3939 5:9dfdde33be7e 241 LPC_I2S->DAO |= (0 << 4);
okini3939 5:9dfdde33be7e 242 LPC_I2S->DAI |= (0 << 4);
okini3939 5:9dfdde33be7e 243 LPC_I2S->DAO |= (0 << 15);
okini3939 5:9dfdde33be7e 244 #endif
d_worrall 0:e62e06e11575 245 return 0;
d_worrall 0:e62e06e11575 246 }
d_worrall 0:e62e06e11575 247 /******************************************************
d_worrall 0:e62e06e11575 248 * Function name: setClocks_()
d_worrall 0:e62e06e11575 249 *
d_worrall 0:e62e06e11575 250 * Description: Set the division setting on the internal clocks
d_worrall 0:e62e06e11575 251 *
d_worrall 0:e62e06e11575 252 * Parameters: int divideBy
d_worrall 0:e62e06e11575 253 * Returns: nothing
d_worrall 0:e62e06e11575 254 ******************************************************/
d_worrall 0:e62e06e11575 255 void I2SSlave::setClocks_(int divideBy){
okini3939 5:9dfdde33be7e 256 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
d_worrall 0:e62e06e11575 257 switch(divideBy){
d_worrall 0:e62e06e11575 258 case 1:
d_worrall 0:e62e06e11575 259 LPC_SC->PCLKSEL1 |= (1 << 22);
d_worrall 0:e62e06e11575 260 LPC_SC->PCLKSEL1 |= (0 << 23);
d_worrall 0:e62e06e11575 261 break;
d_worrall 0:e62e06e11575 262 case 2:
d_worrall 0:e62e06e11575 263 LPC_SC->PCLKSEL1 |= (0 << 22);
d_worrall 0:e62e06e11575 264 LPC_SC->PCLKSEL1 |= (1 << 23);
d_worrall 0:e62e06e11575 265 break;
d_worrall 0:e62e06e11575 266 case 4:
d_worrall 0:e62e06e11575 267 LPC_SC->PCLKSEL1 |= (0 << 22);
d_worrall 0:e62e06e11575 268 LPC_SC->PCLKSEL1 |= (0 << 23);
d_worrall 0:e62e06e11575 269 break;
d_worrall 0:e62e06e11575 270 case 8:
d_worrall 0:e62e06e11575 271 LPC_SC->PCLKSEL1 |= (1 << 22);
d_worrall 0:e62e06e11575 272 LPC_SC->PCLKSEL1 |= (1 << 23);
d_worrall 0:e62e06e11575 273 break;
d_worrall 0:e62e06e11575 274 default:
d_worrall 0:e62e06e11575 275 break;
d_worrall 0:e62e06e11575 276 }
okini3939 5:9dfdde33be7e 277 #elif defined(TARGET_LPC4088)
okini3939 5:9dfdde33be7e 278 switch(divideBy){
okini3939 5:9dfdde33be7e 279 case 1:
okini3939 5:9dfdde33be7e 280 LPC_SC->PCLKSEL |= (1 << 22);
okini3939 5:9dfdde33be7e 281 LPC_SC->PCLKSEL |= (0 << 23);
okini3939 5:9dfdde33be7e 282 break;
okini3939 5:9dfdde33be7e 283 case 2:
okini3939 5:9dfdde33be7e 284 LPC_SC->PCLKSEL |= (0 << 22);
okini3939 5:9dfdde33be7e 285 LPC_SC->PCLKSEL |= (1 << 23);
okini3939 5:9dfdde33be7e 286 break;
okini3939 5:9dfdde33be7e 287 case 4:
okini3939 5:9dfdde33be7e 288 LPC_SC->PCLKSEL |= (0 << 22);
okini3939 5:9dfdde33be7e 289 LPC_SC->PCLKSEL |= (0 << 23);
okini3939 5:9dfdde33be7e 290 break;
okini3939 5:9dfdde33be7e 291 case 8:
okini3939 5:9dfdde33be7e 292 LPC_SC->PCLKSEL |= (1 << 22);
okini3939 5:9dfdde33be7e 293 LPC_SC->PCLKSEL |= (1 << 23);
okini3939 5:9dfdde33be7e 294 break;
okini3939 5:9dfdde33be7e 295 default:
okini3939 5:9dfdde33be7e 296 break;
okini3939 5:9dfdde33be7e 297 }
okini3939 5:9dfdde33be7e 298 #endif
d_worrall 0:e62e06e11575 299 }
d_worrall 0:e62e06e11575 300 /******************************************************
d_worrall 0:e62e06e11575 301 * Function name: setPins_()
d_worrall 0:e62e06e11575 302 *
d_worrall 0:e62e06e11575 303 * Description: set external pin configuration
d_worrall 0:e62e06e11575 304 *
d_worrall 0:e62e06e11575 305 * Parameters: PinName tx_sda, PinName tx_ws, PinName clk, PinName rx_sda, PinName rx_ws
d_worrall 0:e62e06e11575 306 * Returns: none
d_worrall 0:e62e06e11575 307 ******************************************************/
d_worrall 0:e62e06e11575 308 void I2SSlave::setPins_(PinName tx_sda, PinName tx_ws, PinName clk, PinName rx_sda, PinName rx_ws){
okini3939 5:9dfdde33be7e 309 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
Grag38 6:ed59a9124517 310
Grag38 6:ed59a9124517 311
Grag38 6:ed59a9124517 312 printf(" *** TAGET LPC1768 || LPC2368 ***");
Grag38 6:ed59a9124517 313
Grag38 6:ed59a9124517 314
d_worrall 0:e62e06e11575 315 if(rx_ws == p29){
d_worrall 0:e62e06e11575 316 LPC_PINCON->PINSEL0 |= (1 << 10); //set p29 as receive word select line
d_worrall 0:e62e06e11575 317 } else {
d_worrall 0:e62e06e11575 318 LPC_PINCON->PINSEL1 |= (2 << 16); //set p16 as receive word select line
d_worrall 0:e62e06e11575 319 }
d_worrall 0:e62e06e11575 320 if(rx_sda == p8){
d_worrall 0:e62e06e11575 321 LPC_PINCON->PINSEL0 |= (1 << 12); //set p8 as receive serial data line
d_worrall 0:e62e06e11575 322 } else {
d_worrall 0:e62e06e11575 323 LPC_PINCON->PINSEL1 |= (2 << 18); //set p17 as receive serial data line
d_worrall 0:e62e06e11575 324 }
d_worrall 0:e62e06e11575 325 LPC_PINCON->PINSEL0 |= (1 << 14); //set p7 as transmit clock line (only one of these)
d_worrall 0:e62e06e11575 326 LPC_PINCON->PINSEL0 |= (1 << 16); //set p6 as word select line (only one of these)
d_worrall 0:e62e06e11575 327 LPC_PINCON->PINSEL0 |= (1 << 18); //set p5 as transmit serial data line (only one of these)
d_worrall 0:e62e06e11575 328 LPC_PINCON->PINSEL0 |= (0 << 8); //clear rx_clk
okini3939 5:9dfdde33be7e 329 #elif defined(TARGET_LPC4088)
Grag38 6:ed59a9124517 330
Grag38 6:ed59a9124517 331 printf(" *** TAGET LPC4088 ***");
Grag38 6:ed59a9124517 332
okini3939 5:9dfdde33be7e 333 if(rx_ws == p33){
Grag38 6:ed59a9124517 334 LPC_IOCON->P0_5 = (LPC_IOCON->P0_5 & ~7) | 1; //set p33 as receive word select line
okini3939 5:9dfdde33be7e 335 } else {
okini3939 5:9dfdde33be7e 336 LPC_IOCON->P0_24 = (LPC_IOCON->P0_24 & ~7) | 2; //set p16 as receive word select line
okini3939 5:9dfdde33be7e 337 }
okini3939 5:9dfdde33be7e 338 if(rx_sda == p14){
okini3939 5:9dfdde33be7e 339 LPC_IOCON->P0_6 = (LPC_IOCON->P0_6 & ~7) | 1; //set p14 as receive serial data line
okini3939 5:9dfdde33be7e 340 } else {
okini3939 5:9dfdde33be7e 341 LPC_IOCON->P0_25 = (LPC_IOCON->P0_25 & ~7) | 2; //set p17 as receive serial data line
okini3939 5:9dfdde33be7e 342 }
okini3939 5:9dfdde33be7e 343 LPC_IOCON->P0_7 = (LPC_IOCON->P0_7 & ~7) | 1; //set p13 as transmit clock line (only one of these)
Grag38 6:ed59a9124517 344 LPC_IOCON->P0_8 = (LPC_IOCON->P0_8 & ~7) | 1; //set p12 as word select line (only one of these)
Grag38 6:ed59a9124517 345 LPC_IOCON->P0_9 = (LPC_IOCON->P0_9 & ~7) | 1; //set p11 as transmit serial data line (only one of these)
Grag38 6:ed59a9124517 346 LPC_IOCON->P0_23 = (LPC_IOCON->P0_4 & ~7); // p15 clear rx_clk
Grag38 6:ed59a9124517 347 LPC_IOCON->P0_23 = (LPC_IOCON->P0_23 & ~7); // p15clear rx_clk
okini3939 5:9dfdde33be7e 348 #endif
d_worrall 0:e62e06e11575 349 }
d_worrall 0:e62e06e11575 350 /******************************************************
d_worrall 0:e62e06e11575 351 * Function name: format_()
d_worrall 0:e62e06e11575 352 *
d_worrall 0:e62e06e11575 353 * Description: sets the bit length for writing and stereo or mono mode
d_worrall 0:e62e06e11575 354 *
d_worrall 0:e62e06e11575 355 * Parameters: int bit, bool mode
d_worrall 0:e62e06e11575 356 * Returns: none
d_worrall 0:e62e06e11575 357 ******************************************************/
d_worrall 0:e62e06e11575 358 void I2SSlave::format_(int bit, bool mode){
d_worrall 0:e62e06e11575 359 uint32_t bps= ((bit+1)*8)-1;
okini3939 5:9dfdde33be7e 360 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
d_worrall 0:e62e06e11575 361 LPC_I2S->I2SDAO &= (0x00 << 6);
d_worrall 0:e62e06e11575 362 LPC_I2S->I2SDAO |= (bps << 6);
d_worrall 0:e62e06e11575 363 //set bit length
d_worrall 0:e62e06e11575 364 switch(bit){
d_worrall 0:e62e06e11575 365 case 8:
d_worrall 0:e62e06e11575 366 LPC_I2S->I2SDAO &= 0xfffffffc;
d_worrall 0:e62e06e11575 367 break;
d_worrall 0:e62e06e11575 368 case 16:
d_worrall 0:e62e06e11575 369 LPC_I2S->I2SDAO &= (0 << 1);
d_worrall 0:e62e06e11575 370 LPC_I2S->I2SDAO |= (1 << 0);
d_worrall 0:e62e06e11575 371 break;
d_worrall 0:e62e06e11575 372 case 32:
d_worrall 0:e62e06e11575 373 LPC_I2S->I2SDAO &= (0 << 1);
d_worrall 0:e62e06e11575 374 LPC_I2S->I2SDAO |= (3 << 0);
d_worrall 0:e62e06e11575 375 break;
d_worrall 0:e62e06e11575 376 default:
d_worrall 0:e62e06e11575 377 break;
d_worrall 0:e62e06e11575 378 }
d_worrall 0:e62e06e11575 379 //set audio mode
d_worrall 0:e62e06e11575 380 if(mode == STEREO){
d_worrall 0:e62e06e11575 381 LPC_I2S->I2SDAO |= (0 << 2);
d_worrall 0:e62e06e11575 382 } else {
d_worrall 0:e62e06e11575 383 LPC_I2S->I2SDAO |= (1 << 2);
d_worrall 0:e62e06e11575 384 }
d_worrall 0:e62e06e11575 385 //set transmitter and receiver setting to be the same
d_worrall 0:e62e06e11575 386 LPC_I2S->I2SDAI &= (0x00 << 6);
d_worrall 0:e62e06e11575 387 LPC_I2S->I2SDAI |= (bps << 6);
d_worrall 0:e62e06e11575 388 //set bit length
d_worrall 0:e62e06e11575 389 switch(bit){
d_worrall 0:e62e06e11575 390 case 8:
d_worrall 0:e62e06e11575 391 LPC_I2S->I2SDAI &= 0xfffffffc;
d_worrall 0:e62e06e11575 392 break;
d_worrall 0:e62e06e11575 393 case 16:
d_worrall 0:e62e06e11575 394 LPC_I2S->I2SDAI &= (0 << 1);
d_worrall 0:e62e06e11575 395 LPC_I2S->I2SDAI |= (1 << 0);
d_worrall 0:e62e06e11575 396 break;
d_worrall 0:e62e06e11575 397 case 32:
d_worrall 0:e62e06e11575 398 LPC_I2S->I2SDAI &= (0 << 1);
d_worrall 0:e62e06e11575 399 LPC_I2S->I2SDAI |= (3 << 0);
d_worrall 0:e62e06e11575 400 break;
d_worrall 0:e62e06e11575 401 default:
d_worrall 0:e62e06e11575 402 break;
d_worrall 0:e62e06e11575 403 }
d_worrall 0:e62e06e11575 404 //set audio mode
d_worrall 0:e62e06e11575 405 if(mode == STEREO){
d_worrall 0:e62e06e11575 406 LPC_I2S->I2SDAI |= (0 << 2);
d_worrall 0:e62e06e11575 407 } else {
d_worrall 0:e62e06e11575 408 LPC_I2S->I2SDAI |= (1 << 2);
d_worrall 0:e62e06e11575 409 }
okini3939 5:9dfdde33be7e 410 #elif defined(TARGET_LPC4088)
okini3939 5:9dfdde33be7e 411 LPC_I2S->DAO &= (0x00 << 6);
okini3939 5:9dfdde33be7e 412 LPC_I2S->DAO |= (bps << 6);
okini3939 5:9dfdde33be7e 413 //set bit length
okini3939 5:9dfdde33be7e 414 switch(bit){
okini3939 5:9dfdde33be7e 415 case 8:
okini3939 5:9dfdde33be7e 416 LPC_I2S->DAO &= 0xfffffffc;
okini3939 5:9dfdde33be7e 417 break;
okini3939 5:9dfdde33be7e 418 case 16:
okini3939 5:9dfdde33be7e 419 LPC_I2S->DAO &= (0 << 1);
okini3939 5:9dfdde33be7e 420 LPC_I2S->DAO |= (1 << 0);
okini3939 5:9dfdde33be7e 421 break;
okini3939 5:9dfdde33be7e 422 case 32:
okini3939 5:9dfdde33be7e 423 LPC_I2S->DAO &= (0 << 1);
okini3939 5:9dfdde33be7e 424 LPC_I2S->DAO |= (3 << 0);
okini3939 5:9dfdde33be7e 425 break;
okini3939 5:9dfdde33be7e 426 default:
okini3939 5:9dfdde33be7e 427 break;
okini3939 5:9dfdde33be7e 428 }
okini3939 5:9dfdde33be7e 429 //set audio mode
okini3939 5:9dfdde33be7e 430 if(mode == STEREO){
okini3939 5:9dfdde33be7e 431 LPC_I2S->DAO |= (0 << 2);
okini3939 5:9dfdde33be7e 432 } else {
okini3939 5:9dfdde33be7e 433 LPC_I2S->DAO |= (1 << 2);
okini3939 5:9dfdde33be7e 434 }
okini3939 5:9dfdde33be7e 435 //set transmitter and receiver setting to be the same
okini3939 5:9dfdde33be7e 436 LPC_I2S->DAI &= (0x00 << 6);
okini3939 5:9dfdde33be7e 437 LPC_I2S->DAI |= (bps << 6);
okini3939 5:9dfdde33be7e 438 //set bit length
okini3939 5:9dfdde33be7e 439 switch(bit){
okini3939 5:9dfdde33be7e 440 case 8:
okini3939 5:9dfdde33be7e 441 LPC_I2S->DAI &= 0xfffffffc;
okini3939 5:9dfdde33be7e 442 break;
okini3939 5:9dfdde33be7e 443 case 16:
okini3939 5:9dfdde33be7e 444 LPC_I2S->DAI &= (0 << 1);
okini3939 5:9dfdde33be7e 445 LPC_I2S->DAI |= (1 << 0);
okini3939 5:9dfdde33be7e 446 break;
okini3939 5:9dfdde33be7e 447 case 32:
okini3939 5:9dfdde33be7e 448 LPC_I2S->DAI &= (0 << 1);
okini3939 5:9dfdde33be7e 449 LPC_I2S->DAI |= (3 << 0);
okini3939 5:9dfdde33be7e 450 break;
okini3939 5:9dfdde33be7e 451 default:
okini3939 5:9dfdde33be7e 452 break;
okini3939 5:9dfdde33be7e 453 }
okini3939 5:9dfdde33be7e 454 //set audio mode
okini3939 5:9dfdde33be7e 455 if(mode == STEREO){
okini3939 5:9dfdde33be7e 456 LPC_I2S->DAI |= (0 << 2);
okini3939 5:9dfdde33be7e 457 } else {
okini3939 5:9dfdde33be7e 458 LPC_I2S->DAI |= (1 << 2);
okini3939 5:9dfdde33be7e 459 }
okini3939 5:9dfdde33be7e 460 #endif
d_worrall 0:e62e06e11575 461 }
d_worrall 0:e62e06e11575 462 /******************************************************
d_worrall 0:e62e06e11575 463 * Function name: modeConfig_()
d_worrall 0:e62e06e11575 464 *
d_worrall 0:e62e06e11575 465 * Description: Set slave mode
d_worrall 0:e62e06e11575 466 *
d_worrall 0:e62e06e11575 467 * Parameters: none
d_worrall 0:e62e06e11575 468 * Returns: none
d_worrall 0:e62e06e11575 469 ******************************************************/
d_worrall 0:e62e06e11575 470 void I2SSlave::modeConfig_(void){
okini3939 5:9dfdde33be7e 471 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
d_worrall 0:e62e06e11575 472 LPC_I2S->I2STXMODE |= (0x0 << 0);
d_worrall 0:e62e06e11575 473 LPC_I2S->I2SRXMODE |= (0x0 << 0);
okini3939 5:9dfdde33be7e 474 #elif defined(TARGET_LPC4088)
okini3939 5:9dfdde33be7e 475 LPC_I2S->TXMODE |= (0x0 << 0);
okini3939 5:9dfdde33be7e 476 LPC_I2S->RXMODE |= (0x0 << 0);
okini3939 5:9dfdde33be7e 477 #endif
d_worrall 0:e62e06e11575 478 }
d_worrall 0:e62e06e11575 479 /******************************************************
d_worrall 0:e62e06e11575 480 * Function name: storePins_()
d_worrall 0:e62e06e11575 481 *
d_worrall 0:e62e06e11575 482 * Description: set external pin configuration
d_worrall 0:e62e06e11575 483 *
d_worrall 0:e62e06e11575 484 * Parameters: PinName tx_sda, PinName tx_ws, PinName clk, PinName rx_sda, PinName rx_ws
d_worrall 0:e62e06e11575 485 * Returns: none
d_worrall 0:e62e06e11575 486 ******************************************************/
d_worrall 0:e62e06e11575 487 void I2SSlave::storePins_(PinName tx_sda, PinName tx_ws, PinName clk, PinName rx_sda, PinName rx_ws){
d_worrall 0:e62e06e11575 488 tx_sda_ = tx_sda;
d_worrall 0:e62e06e11575 489 tx_ws_ = tx_ws;
d_worrall 0:e62e06e11575 490 clk_ = clk;
d_worrall 0:e62e06e11575 491 rx_sda_ = rx_sda;
d_worrall 0:e62e06e11575 492 rx_ws_ = rx_ws;
d_worrall 0:e62e06e11575 493 }