STM32L4xx_HAL_Driver - Hal Drivers for L4

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Hal Drivers for L4

Dependents: BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Inc/stm32l4xx_hal_adc.h@0:80ee8f3b695e, 2015-11-02 (annotated)

Committer:: EricLew
Date:: Mon Nov 02 19:37:23 2015 +0000
Revision:: 0:80ee8f3b695e

Errors are with definitions of LCD and QSPI functions. I believe all .h and .c files are  uploaded, but there may need to be certain functions called.

Who changed what in which revision?

User	Revision	Line number	New contents of line
EricLew	0:80ee8f3b695e	1	/**
EricLew	0:80ee8f3b695e	2	******************************************************************************
EricLew	0:80ee8f3b695e	3	* @file stm32l4xx_hal_adc.h
EricLew	0:80ee8f3b695e	4	* @author MCD Application Team
EricLew	0:80ee8f3b695e	5	* @version V1.1.0
EricLew	0:80ee8f3b695e	6	* @date 16-September-2015
EricLew	0:80ee8f3b695e	7	* @brief Header file of ADC HAL module.
EricLew	0:80ee8f3b695e	8	******************************************************************************
EricLew	0:80ee8f3b695e	9	* @attention
EricLew	0:80ee8f3b695e	10	*
EricLew	0:80ee8f3b695e	11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew	0:80ee8f3b695e	12	*
EricLew	0:80ee8f3b695e	13	* Redistribution and use in source and binary forms, with or without modification,
EricLew	0:80ee8f3b695e	14	* are permitted provided that the following conditions are met:
EricLew	0:80ee8f3b695e	15	* 1. Redistributions of source code must retain the above copyright notice,
EricLew	0:80ee8f3b695e	16	* this list of conditions and the following disclaimer.
EricLew	0:80ee8f3b695e	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew	0:80ee8f3b695e	18	* this list of conditions and the following disclaimer in the documentation
EricLew	0:80ee8f3b695e	19	* and/or other materials provided with the distribution.
EricLew	0:80ee8f3b695e	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew	0:80ee8f3b695e	21	* may be used to endorse or promote products derived from this software
EricLew	0:80ee8f3b695e	22	* without specific prior written permission.
EricLew	0:80ee8f3b695e	23	*
EricLew	0:80ee8f3b695e	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew	0:80ee8f3b695e	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew	0:80ee8f3b695e	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew	0:80ee8f3b695e	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew	0:80ee8f3b695e	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew	0:80ee8f3b695e	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew	0:80ee8f3b695e	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew	0:80ee8f3b695e	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew	0:80ee8f3b695e	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew	0:80ee8f3b695e	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew	0:80ee8f3b695e	34	*
EricLew	0:80ee8f3b695e	35	******************************************************************************
EricLew	0:80ee8f3b695e	36	*/
EricLew	0:80ee8f3b695e	37
EricLew	0:80ee8f3b695e	38	/* Define to prevent recursive inclusion -------------------------------------*/
EricLew	0:80ee8f3b695e	39	#ifndef __STM32L4xx_ADC_H
EricLew	0:80ee8f3b695e	40	#define __STM32L4xx_ADC_H
EricLew	0:80ee8f3b695e	41
EricLew	0:80ee8f3b695e	42	#ifdef __cplusplus
EricLew	0:80ee8f3b695e	43	extern "C" {
EricLew	0:80ee8f3b695e	44	#endif
EricLew	0:80ee8f3b695e	45
EricLew	0:80ee8f3b695e	46	/* Includes ------------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	47	#include "stm32l4xx_hal_def.h"
EricLew	0:80ee8f3b695e	48
EricLew	0:80ee8f3b695e	49	/** @addtogroup STM32L4xx_HAL_Driver
EricLew	0:80ee8f3b695e	50	* @{
EricLew	0:80ee8f3b695e	51	*/
EricLew	0:80ee8f3b695e	52
EricLew	0:80ee8f3b695e	53	/** @addtogroup ADC
EricLew	0:80ee8f3b695e	54	* @{
EricLew	0:80ee8f3b695e	55	*/
EricLew	0:80ee8f3b695e	56
EricLew	0:80ee8f3b695e	57	/* Exported types ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	58	/** @defgroup ADC_Exported_Types ADC Exported Types
EricLew	0:80ee8f3b695e	59	* @{
EricLew	0:80ee8f3b695e	60	*/
EricLew	0:80ee8f3b695e	61
EricLew	0:80ee8f3b695e	62
EricLew	0:80ee8f3b695e	63	/**
EricLew	0:80ee8f3b695e	64	* @brief ADC Regular Conversion Oversampling structure definition
EricLew	0:80ee8f3b695e	65	*/
EricLew	0:80ee8f3b695e	66	typedef struct
EricLew	0:80ee8f3b695e	67	{
EricLew	0:80ee8f3b695e	68	uint32_t Ratio; /*!< Configures the oversampling ratio.
EricLew	0:80ee8f3b695e	69	This parameter can be a value of @ref ADCEx_Oversampling_Ratio */
EricLew	0:80ee8f3b695e	70
EricLew	0:80ee8f3b695e	71	uint32_t RightBitShift; /*!< Configures the division coefficient for the Oversampler.
EricLew	0:80ee8f3b695e	72	This parameter can be a value of @ref ADCEx_Right_Bit_Shift */
EricLew	0:80ee8f3b695e	73
EricLew	0:80ee8f3b695e	74	uint32_t TriggeredMode; /*!< Selects the regular triggered oversampling mode.
EricLew	0:80ee8f3b695e	75	This parameter can be a value of @ref ADCEx_Triggered_Oversampling_Mode */
EricLew	0:80ee8f3b695e	76
EricLew	0:80ee8f3b695e	77	uint32_t OversamplingStopReset; /*!< Selects the regular oversampling mode.
EricLew	0:80ee8f3b695e	78	The oversampling is either temporary stopped or reset upon an injected
EricLew	0:80ee8f3b695e	79	sequence interruption.
EricLew	0:80ee8f3b695e	80	If oversampling is enabled on both regular and injected groups, this parameter
EricLew	0:80ee8f3b695e	81	is discarded and forced to setting "ADC_REGOVERSAMPLING_RESUMED_MODE"
EricLew	0:80ee8f3b695e	82	(the oversampling buffer is zeroed during injection sequence).
EricLew	0:80ee8f3b695e	83	This parameter can be a value of @ref ADCEx_Regular_Oversampling_Mode */
EricLew	0:80ee8f3b695e	84
EricLew	0:80ee8f3b695e	85	}ADC_OversamplingTypeDef;
EricLew	0:80ee8f3b695e	86
EricLew	0:80ee8f3b695e	87
EricLew	0:80ee8f3b695e	88
EricLew	0:80ee8f3b695e	89
EricLew	0:80ee8f3b695e	90	/**
EricLew	0:80ee8f3b695e	91	* @brief Structure definition of ADC initialization and regular group
EricLew	0:80ee8f3b695e	92	* @note Parameters of this structure are shared within 2 scopes:
EricLew	0:80ee8f3b695e	93	* - Scope entire ADC (affects regular and injected groups): ClockPrescaler and ClockDivider, Resolution, DataAlign,
EricLew	0:80ee8f3b695e	94	* ScanConvMode, EOCSelection, LowPowerAutoWait.
EricLew	0:80ee8f3b695e	95	* - Scope regular group: ContinuousConvMode, NbrOfConversion, DiscontinuousConvMode, NbrOfDiscConversion, ExternalTrigConvEdge,
EricLew	0:80ee8f3b695e	96	* ExternalTrigConv, DMAContinuousRequests, Overrun, OversamplingMode, Oversampling.
EricLew	0:80ee8f3b695e	97	* @note The setting of these parameters by function HAL_ADC_Init() is conditioned by ADC state.
EricLew	0:80ee8f3b695e	98	* ADC state can be either:
EricLew	0:80ee8f3b695e	99	* - For all parameters: ADC disabled
EricLew	0:80ee8f3b695e	100	* - For all parameters except 'LowPowerAutoWait', 'DMAContinuousRequests' and 'Oversampling': ADC enabled without conversion on going on regular group.
EricLew	0:80ee8f3b695e	101	* - For parameters 'LowPowerAutoWait' and 'DMAContinuousRequests': ADC enabled without conversion on going on regular and injected groups.
EricLew	0:80ee8f3b695e	102	* If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
EricLew	0:80ee8f3b695e	103	* without error reporting (as it can be the expected behaviour in case of intended action to update another parameter
EricLew	0:80ee8f3b695e	104	* (which fulfills the ADC state condition) on the fly).
EricLew	0:80ee8f3b695e	105	*/
EricLew	0:80ee8f3b695e	106	typedef struct
EricLew	0:80ee8f3b695e	107	{
EricLew	0:80ee8f3b695e	108	uint32_t ClockPrescaler; /*!< Selects ADC clock source (asynchronous System/PLLSAI1/PLLSAI2 clocks or synchronous AHB clock) as well as
EricLew	0:80ee8f3b695e	109	the division factor applied to the clock.
EricLew	0:80ee8f3b695e	110	This parameter can be a value of @ref ADC_ClockPrescaler.
EricLew	0:80ee8f3b695e	111	Note: The clock is common for all the ADCs.
EricLew	0:80ee8f3b695e	112	Note: In case of usage of channels on injected group, ADC frequency should be lower than AHB clock frequency /4 for resolution 12 or 10 bits,
EricLew	0:80ee8f3b695e	113	AHB clock frequency /3 for resolution 8 bits, AHB clock frequency /2 for resolution 6 bits.
EricLew	0:80ee8f3b695e	114	Note: In case of usage of the ADC dedicated PLL clock, this clock must be preliminarily enabled and prescaler set at RCC top level.
EricLew	0:80ee8f3b695e	115	Note: In case of synchronous clock mode based on HCLK/1, the configuration must be enabled only if the AHB clock prescaler is set to 1
EricLew	0:80ee8f3b695e	116	and if the system clock has a 50% duty cycle.
EricLew	0:80ee8f3b695e	117	Note: This parameter can be modified only if all ADCs are disabled. */
EricLew	0:80ee8f3b695e	118
EricLew	0:80ee8f3b695e	119	uint32_t Resolution; /*!< Configures the ADC resolution.
EricLew	0:80ee8f3b695e	120	This parameter can be a value of @ref ADC_Resolution */
EricLew	0:80ee8f3b695e	121
EricLew	0:80ee8f3b695e	122	uint32_t DataAlign; /*!< Specifies ADC data alignment (right or left).
EricLew	0:80ee8f3b695e	123	See reference manual for alignments formats versus resolutions.
EricLew	0:80ee8f3b695e	124	This parameter can be a value of @ref ADC_Data_align */
EricLew	0:80ee8f3b695e	125
EricLew	0:80ee8f3b695e	126	uint32_t ScanConvMode; /*!< Configures the sequencer of regular and injected groups.
EricLew	0:80ee8f3b695e	127	This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
EricLew	0:80ee8f3b695e	128	If disabled: Conversion is performed in single mode (one channel converted, that defined in rank 1).
EricLew	0:80ee8f3b695e	129	Parameters 'NbrOfConversion' and 'InjectedNbrOfConversion' are discarded (equivalent to set to 1).
EricLew	0:80ee8f3b695e	130	If enabled: Conversions are performed in sequence mode (multiple ranks defined by 'NbrOfConversion' or'InjectedNbrOfConversion').
EricLew	0:80ee8f3b695e	131	Scan direction is upward: from rank 1 to rank 'n'.
EricLew	0:80ee8f3b695e	132	This parameter can be a value of @ref ADC_Scan_mode */
EricLew	0:80ee8f3b695e	133
EricLew	0:80ee8f3b695e	134	uint32_t EOCSelection; /*!< Specifies which EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence.
EricLew	0:80ee8f3b695e	135	This parameter can be a value of @ref ADC_EOCSelection. */
EricLew	0:80ee8f3b695e	136
EricLew	0:80ee8f3b695e	137	uint32_t LowPowerAutoWait; /*!< Selects the dynamic low power Auto Delay: new conversion start only when the previous
EricLew	0:80ee8f3b695e	138	conversion (for regular group) or previous sequence (for injected group) has been processed by user software
EricLew	0:80ee8f3b695e	139	(EOC bit cleared or DR read for regular conversions, JEOS cleared for injected conversions).
EricLew	0:80ee8f3b695e	140	This feature automatically adapts the speed of ADC to the speed of the system that reads the data. Moreover, this avoids risk of overrun
EricLew	0:80ee8f3b695e	141	for low frequency applications.
EricLew	0:80ee8f3b695e	142	This parameter can be set to ENABLE or DISABLE.
EricLew	0:80ee8f3b695e	143	Note: Do not use with interruption or DMA (HAL_ADC_Start_IT(), HAL_ADC_Start_DMA(), HAL_ADCEx_InjectedStart_IT()) when it is necessary
EricLew	0:80ee8f3b695e	144	to clear immediately the EOC flag to free the IRQ vector sequencer.
EricLew	0:80ee8f3b695e	145	Do use with polling: 1. Start conversion with HAL_ADC_Start() or HAL_ADCEx_InjectedStart(), 2. When conversion data is available: use
EricLew	0:80ee8f3b695e	146	HAL_ADC_PollForConversion() to ensure that conversion is completed and HAL_ADC_GetValue() to retrieve conversion result and trig another
EricLew	0:80ee8f3b695e	147	conversion. For injected conversion, resort to HAL_ADCEx_InjectedPollForConversion() then HAL_ADCEx_InjectedGetValue() */
EricLew	0:80ee8f3b695e	148
EricLew	0:80ee8f3b695e	149	uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
EricLew	0:80ee8f3b695e	150	after software start or external trigger occurred.
EricLew	0:80ee8f3b695e	151	This parameter can be set to ENABLE or DISABLE. */
EricLew	0:80ee8f3b695e	152
EricLew	0:80ee8f3b695e	153	uint32_t NbrOfConversion; /*!< Specifies the number of ranks that will be converted within the regular group sequencer.
EricLew	0:80ee8f3b695e	154	To use the regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
EricLew	0:80ee8f3b695e	155	This parameter must be a number between Min_Data = 1 and Max_Data = 16.
EricLew	0:80ee8f3b695e	156	Note: This parameter must be modified when no conversion is on going on regular group (ADC disabled, or ADC enabled without
EricLew	0:80ee8f3b695e	157	continuous mode or external trigger that could launch a conversion). */
EricLew	0:80ee8f3b695e	158
EricLew	0:80ee8f3b695e	159	uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence
EricLew	0:80ee8f3b695e	160	subdivided in successive parts).
EricLew	0:80ee8f3b695e	161	Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
EricLew	0:80ee8f3b695e	162	Discontinuous mode can be enabled only if continuous mode is disabled.
EricLew	0:80ee8f3b695e	163	This parameter can be set to ENABLE or DISABLE. */
EricLew	0:80ee8f3b695e	164
EricLew	0:80ee8f3b695e	165	uint32_t NbrOfDiscConversion; /*!< Specifies the number of discontinuous conversions in which the main sequence of regular group (parameter NbrOfConversion) will be subdivided.
EricLew	0:80ee8f3b695e	166	If parameter 'DiscontinuousConvMode' is disabled, this parameter is discarded.
EricLew	0:80ee8f3b695e	167	This parameter must be a number between Min_Data = 1 and Max_Data = 8. */
EricLew	0:80ee8f3b695e	168
EricLew	0:80ee8f3b695e	169	uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group.
EricLew	0:80ee8f3b695e	170	If set to ADC_SOFTWARE_START, external triggers are disabled and software trigger is used instead.
EricLew	0:80ee8f3b695e	171	This parameter can be a value of @ref ADC_Regular_External_Trigger_Source.
EricLew	0:80ee8f3b695e	172	Caution: external trigger source is common to ADCs. */
EricLew	0:80ee8f3b695e	173
EricLew	0:80ee8f3b695e	174	uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group.
EricLew	0:80ee8f3b695e	175	If set to ADC_EXTERNALTRIGCONVEDGE_NONE, external triggers are disabled and software trigger is used instead.
EricLew	0:80ee8f3b695e	176	This parameter can be a value of @ref ADC_Regular_External_Trigger_Source_Edge */
EricLew	0:80ee8f3b695e	177
EricLew	0:80ee8f3b695e	178	uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stops when number of conversions is reached)
EricLew	0:80ee8f3b695e	179	or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
EricLew	0:80ee8f3b695e	180	Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
EricLew	0:80ee8f3b695e	181	This parameter can be set to ENABLE or DISABLE.
EricLew	0:80ee8f3b695e	182	Note: This parameter must be modified when no conversion is on going on both regular and injected groups
EricLew	0:80ee8f3b695e	183	(ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion). */
EricLew	0:80ee8f3b695e	184
EricLew	0:80ee8f3b695e	185	uint32_t Overrun; /*!< Select the behaviour in case of overrun: data overwritten or preserved (default).
EricLew	0:80ee8f3b695e	186	This parameter applies to regular group only.
EricLew	0:80ee8f3b695e	187	This parameter can be a value of @ref ADC_Overrun.
EricLew	0:80ee8f3b695e	188	Note: Case of overrun set to data preserved and usage with end on conversion interruption (HAL_Start_IT()): ADC IRQ handler has to clear
EricLew	0:80ee8f3b695e	189	end of conversion flags, this induces the release of the preserved data. If needed, this data can be saved by user-developped function
EricLew	0:80ee8f3b695e	190	HAL_ADC_ConvCpltCallback() (called before end of conversion flags clear).
EricLew	0:80ee8f3b695e	191	Note: Error reporting with respect to the conversion mode:
EricLew	0:80ee8f3b695e	192	- Usage with ADC conversion by polling for event or interruption: Error is reported only if overrun is set to data preserved. If overrun is set to data
EricLew	0:80ee8f3b695e	193	overwritten, user can willingly not read all the converted data, this is not considered as an erroneous case.
EricLew	0:80ee8f3b695e	194	- Usage with ADC conversion by DMA: Error is reported whatever overrun setting (DMA is expected to process all data from data register). */
EricLew	0:80ee8f3b695e	195
EricLew	0:80ee8f3b695e	196	uint32_t OversamplingMode; /*!< Specifies whether the oversampling feature is enabled or disabled.
EricLew	0:80ee8f3b695e	197	This parameter can be set to ENABLE or DISABLE.
EricLew	0:80ee8f3b695e	198	Note: This parameter can be modified only if there is no conversion is ongoing (both ADSTART and JADSTART cleared). */
EricLew	0:80ee8f3b695e	199
EricLew	0:80ee8f3b695e	200	ADC_OversamplingTypeDef Oversampling; /*!< Specifies the Oversampling parameters.
EricLew	0:80ee8f3b695e	201	Caution: this setting overwrites the previous oversampling configuration if oversampling already enabled.
EricLew	0:80ee8f3b695e	202	Note: This parameter can be modified only if there is no conversion is ongoing (both ADSTART and JADSTART cleared). */
EricLew	0:80ee8f3b695e	203	}ADC_InitTypeDef;
EricLew	0:80ee8f3b695e	204
EricLew	0:80ee8f3b695e	205
EricLew	0:80ee8f3b695e	206	/** @defgroup ADC_States ADC States
EricLew	0:80ee8f3b695e	207	* @{
EricLew	0:80ee8f3b695e	208	*/
EricLew	0:80ee8f3b695e	209
EricLew	0:80ee8f3b695e	210	/**
EricLew	0:80ee8f3b695e	211	* @brief HAL ADC state machine: ADC State bitfield definition
EricLew	0:80ee8f3b695e	212	*/
EricLew	0:80ee8f3b695e	213	/* States of ADC global scope */
EricLew	0:80ee8f3b695e	214	#define HAL_ADC_STATE_RESET ((uint32_t)0x00000000) /!< ADC not yet initialized or disabled /
EricLew	0:80ee8f3b695e	215	#define HAL_ADC_STATE_READY ((uint32_t)0x00000001) /!< ADC peripheral ready for use /
EricLew	0:80ee8f3b695e	216	#define HAL_ADC_STATE_BUSY_INTERNAL ((uint32_t)0x00000002) /!< ADC is busy because of an internal process (initialization, calibration) /
EricLew	0:80ee8f3b695e	217	#define HAL_ADC_STATE_TIMEOUT ((uint32_t)0x00000004) /!< TimeOut occurrence /
EricLew	0:80ee8f3b695e	218
EricLew	0:80ee8f3b695e	219	/* States of ADC errors */
EricLew	0:80ee8f3b695e	220	#define HAL_ADC_STATE_ERROR_INTERNAL ((uint32_t)0x00000010) /!< Internal error occurrence /
EricLew	0:80ee8f3b695e	221	#define HAL_ADC_STATE_ERROR_CONFIG ((uint32_t)0x00000020) /!< Configuration error occurrence /
EricLew	0:80ee8f3b695e	222	#define HAL_ADC_STATE_ERROR_DMA ((uint32_t)0x00000040) /!< DMA error occurrence /
EricLew	0:80ee8f3b695e	223
EricLew	0:80ee8f3b695e	224	/* States of ADC regular group */
EricLew	0:80ee8f3b695e	225	#define HAL_ADC_STATE_REG_BUSY ((uint32_t)0x00000100) /*!< A regular conversion is ongoing or can occur (either by continuous mode,
EricLew	0:80ee8f3b695e	226	external trigger, low power auto power-on, multimode ADC master control) */
EricLew	0:80ee8f3b695e	227	#define HAL_ADC_STATE_REG_EOC ((uint32_t)0x00000200) /!< Regular conversion data available /
EricLew	0:80ee8f3b695e	228	#define HAL_ADC_STATE_REG_OVR ((uint32_t)0x00000400) /!< Overrun occurrence /
EricLew	0:80ee8f3b695e	229	#define HAL_ADC_STATE_REG_EOSMP ((uint32_t)0x00000800) /!< End Of Sampling flag raised /
EricLew	0:80ee8f3b695e	230
EricLew	0:80ee8f3b695e	231	/* States of ADC injected group */
EricLew	0:80ee8f3b695e	232	#define HAL_ADC_STATE_INJ_BUSY ((uint32_t)0x00001000) /*!< An injected conversion is ongoing or can occur (either by auto-injection mode,
EricLew	0:80ee8f3b695e	233	external trigger, low power auto power-on, multimode ADC master control) */
EricLew	0:80ee8f3b695e	234	#define HAL_ADC_STATE_INJ_EOC ((uint32_t)0x00002000) /!< Injected conversion data available /
EricLew	0:80ee8f3b695e	235	#define HAL_ADC_STATE_INJ_JQOVF ((uint32_t)0x00004000) /!< Injected queue overflow occurrence /
EricLew	0:80ee8f3b695e	236
EricLew	0:80ee8f3b695e	237	/* States of ADC analog watchdogs */
EricLew	0:80ee8f3b695e	238	#define HAL_ADC_STATE_AWD1 ((uint32_t)0x00010000) /!< Out-of-window occurrence of Analog Watchdog 1 /
EricLew	0:80ee8f3b695e	239	#define HAL_ADC_STATE_AWD2 ((uint32_t)0x00020000) /!< Out-of-window occurrence of Analog Watchdog 2 /
EricLew	0:80ee8f3b695e	240	#define HAL_ADC_STATE_AWD3 ((uint32_t)0x00040000) /!< Out-of-window occurrence of Analog Watchdog 3 /
EricLew	0:80ee8f3b695e	241
EricLew	0:80ee8f3b695e	242	/* States of ADC multi-mode */
EricLew	0:80ee8f3b695e	243	#define HAL_ADC_STATE_MULTIMODE_SLAVE ((uint32_t)0x00100000) /!< ADC in multimode slave state, controlled by another ADC master /
EricLew	0:80ee8f3b695e	244
EricLew	0:80ee8f3b695e	245	/**
EricLew	0:80ee8f3b695e	246	* @}
EricLew	0:80ee8f3b695e	247	*/
EricLew	0:80ee8f3b695e	248
EricLew	0:80ee8f3b695e	249	/**
EricLew	0:80ee8f3b695e	250	* @brief ADC Injection Configuration
EricLew	0:80ee8f3b695e	251	*/
EricLew	0:80ee8f3b695e	252	typedef struct
EricLew	0:80ee8f3b695e	253	{
EricLew	0:80ee8f3b695e	254	uint32_t ContextQueue; /*!< Injected channel configuration context: build-up over each
EricLew	0:80ee8f3b695e	255	HAL_ADCEx_InjectedConfigChannel() call to finally initialize
EricLew	0:80ee8f3b695e	256	JSQR register at HAL_ADCEx_InjectedConfigChannel() last call */
EricLew	0:80ee8f3b695e	257
EricLew	0:80ee8f3b695e	258	uint32_t ChannelCount; /!< Number of channels in the injected sequence /
EricLew	0:80ee8f3b695e	259	}ADC_InjectionConfigTypeDef;
EricLew	0:80ee8f3b695e	260
EricLew	0:80ee8f3b695e	261
EricLew	0:80ee8f3b695e	262
EricLew	0:80ee8f3b695e	263	/**
EricLew	0:80ee8f3b695e	264	* @brief ADC handle Structure definition
EricLew	0:80ee8f3b695e	265	*/
EricLew	0:80ee8f3b695e	266	typedef struct
EricLew	0:80ee8f3b695e	267	{
EricLew	0:80ee8f3b695e	268	ADC_TypeDef Instance; /!< Register base address */
EricLew	0:80ee8f3b695e	269
EricLew	0:80ee8f3b695e	270	ADC_InitTypeDef Init; /!< ADC initialization parameters and regular conversions setting /
EricLew	0:80ee8f3b695e	271
EricLew	0:80ee8f3b695e	272	DMA_HandleTypeDef DMA_Handle; /!< Pointer DMA Handler */
EricLew	0:80ee8f3b695e	273
EricLew	0:80ee8f3b695e	274	HAL_LockTypeDef Lock; /!< ADC locking object /
EricLew	0:80ee8f3b695e	275
EricLew	0:80ee8f3b695e	276	__IO uint32_t State; /!< ADC communication state (bit-map of ADC states) /
EricLew	0:80ee8f3b695e	277
EricLew	0:80ee8f3b695e	278	__IO uint32_t ErrorCode; /!< ADC Error code /
EricLew	0:80ee8f3b695e	279
EricLew	0:80ee8f3b695e	280	ADC_InjectionConfigTypeDef InjectionConfig ; /!< ADC injected channel configuration build-up structure /
EricLew	0:80ee8f3b695e	281	}ADC_HandleTypeDef;
EricLew	0:80ee8f3b695e	282
EricLew	0:80ee8f3b695e	283
EricLew	0:80ee8f3b695e	284
EricLew	0:80ee8f3b695e	285	/**
EricLew	0:80ee8f3b695e	286	* @brief Structure definition of ADC channel for regular group
EricLew	0:80ee8f3b695e	287	* @note The setting of these parameters with function HAL_ADC_ConfigChannel() is conditioned by ADC state.
EricLew	0:80ee8f3b695e	288	* ADC state can be either:
EricLew	0:80ee8f3b695e	289	* - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'SingleDiff')
EricLew	0:80ee8f3b695e	290	* - For all except parameters 'SamplingTime', 'Offset', 'OffsetNumber': ADC enabled without conversion on going on regular group.
EricLew	0:80ee8f3b695e	291	* - For parameters 'SamplingTime', 'Offset', 'OffsetNumber': ADC enabled without conversion on going on regular and injected groups.
EricLew	0:80ee8f3b695e	292	* If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
EricLew	0:80ee8f3b695e	293	* without error reporting (as it can be the expected behaviour in case of intended action to update another parameter
EricLew	0:80ee8f3b695e	294	* (which fulfills the ADC state condition) on the fly).
EricLew	0:80ee8f3b695e	295	*/
EricLew	0:80ee8f3b695e	296	typedef struct
EricLew	0:80ee8f3b695e	297	{
EricLew	0:80ee8f3b695e	298	uint32_t Channel; /*!< Specifies the channel to configure into ADC regular group.
EricLew	0:80ee8f3b695e	299	This parameter can be a value of @ref ADC_channels
EricLew	0:80ee8f3b695e	300	Note: Depending on devices and ADC instances, some channels may not be available. Refer to device DataSheet for channels availability. */
EricLew	0:80ee8f3b695e	301	uint32_t Rank; /*!< Specifies the rank in the regular group sequencer.
EricLew	0:80ee8f3b695e	302	This parameter can be a value of @ref ADCEx_regular_rank
EricLew	0:80ee8f3b695e	303	Note: to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by
EricLew	0:80ee8f3b695e	304	the new channel setting (or parameter number of conversions adjusted) */
EricLew	0:80ee8f3b695e	305	uint32_t SamplingTime; /*!< Sampling time value to be set for the selected channel.
EricLew	0:80ee8f3b695e	306	Unit: ADC clock cycles
EricLew	0:80ee8f3b695e	307	Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits,
EricLew	0:80ee8f3b695e	308	8.5 cycles at 8 bits, 6.5 cycles at 6 bits).
EricLew	0:80ee8f3b695e	309	This parameter can be a value of @ref ADC_sampling_times
EricLew	0:80ee8f3b695e	310	Caution: This parameter applies to a channel that can be used in a regular and/or injected group.
EricLew	0:80ee8f3b695e	311	It overwrites the last setting.
EricLew	0:80ee8f3b695e	312	Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
EricLew	0:80ee8f3b695e	313	sampling time constraints must be respected (sampling time can be adjusted with respect to the ADC clock frequency and sampling time setting)
EricLew	0:80ee8f3b695e	314	Refer to device DataSheet for timings values. */
EricLew	0:80ee8f3b695e	315	uint32_t SingleDiff; /*!< Selection of single-ended or differential input.
EricLew	0:80ee8f3b695e	316	In differential mode: Differential measurement is carried out between the selected channel 'i' (positive input) and channel 'i+1' (negative input).
EricLew	0:80ee8f3b695e	317	Only channel 'i' has to be configured, channel 'i+1' is configured automatically.
EricLew	0:80ee8f3b695e	318	This parameter must be a value of @ref ADCEx_SingleDifferential
EricLew	0:80ee8f3b695e	319	Caution: This parameter applies to a channel that can be used in a regular and/or injected group.
EricLew	0:80ee8f3b695e	320	It overwrites the last setting.
EricLew	0:80ee8f3b695e	321	Note: Refer to Reference Manual to ensure the selected channel is available in differential mode.
EricLew	0:80ee8f3b695e	322	Note: When configuring a channel 'i' in differential mode, the channel 'i+1' is not usable separately.
EricLew	0:80ee8f3b695e	323	Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
EricLew	0:80ee8f3b695e	324	If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case
EricLew	0:80ee8f3b695e	325	of another parameter update on the fly) */
EricLew	0:80ee8f3b695e	326	uint32_t OffsetNumber; /*!< Selects the offset number
EricLew	0:80ee8f3b695e	327	This parameter can be a value of @ref ADCEx_OffsetNumber
EricLew	0:80ee8f3b695e	328	Caution: Only one offset is allowed per channel. This parameter overwrites the last setting. */
EricLew	0:80ee8f3b695e	329	uint32_t Offset; /*!< Defines the offset to be subtracted from the raw converted data.
EricLew	0:80ee8f3b695e	330	Offset value must be a positive number.
EricLew	0:80ee8f3b695e	331	Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF,
EricLew	0:80ee8f3b695e	332	0x3FF, 0xFF or 0x3F respectively.
EricLew	0:80ee8f3b695e	333	Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled
EricLew	0:80ee8f3b695e	334	without continuous mode or external trigger that could launch a conversion). */
EricLew	0:80ee8f3b695e	335	}ADC_ChannelConfTypeDef;
EricLew	0:80ee8f3b695e	336
EricLew	0:80ee8f3b695e	337
EricLew	0:80ee8f3b695e	338	/**
EricLew	0:80ee8f3b695e	339	* @brief Structure definition of ADC analog watchdog
EricLew	0:80ee8f3b695e	340	* @note The setting of these parameters with function HAL_ADC_AnalogWDGConfig() is conditioned by ADC state.
EricLew	0:80ee8f3b695e	341	* ADC state can be either: ADC disabled or ADC enabled without conversion on going on regular and injected groups.
EricLew	0:80ee8f3b695e	342	*/
EricLew	0:80ee8f3b695e	343	typedef struct
EricLew	0:80ee8f3b695e	344	{
EricLew	0:80ee8f3b695e	345	uint32_t WatchdogNumber; /*!< Selects which ADC analog watchdog is applied to the selected channel.
EricLew	0:80ee8f3b695e	346	For Analog Watchdog 1: Only 1 channel can be monitored (or overall group of channels by setting parameter 'WatchdogMode')
EricLew	0:80ee8f3b695e	347	For Analog Watchdog 2 and 3: Several channels can be monitored (by successive calls of 'HAL_ADC_AnalogWDGConfig()' for each channel)
EricLew	0:80ee8f3b695e	348	This parameter can be a value of @ref ADCEx_analog_watchdog_number. */
EricLew	0:80ee8f3b695e	349	uint32_t WatchdogMode; /*!< For Analog Watchdog 1: Configures the ADC analog watchdog mode: single channel/overall group of channels, regular/injected group.
EricLew	0:80ee8f3b695e	350	For Analog Watchdog 2 and 3: There is no configuration for overall group of channels as AWD1. Set value 'ADC_ANALOGWATCHDOG_NONE' to reset
EricLew	0:80ee8f3b695e	351	channels group programmed with parameter 'Channel', set any other value to program the channel(s) to be monitored.
EricLew	0:80ee8f3b695e	352	This parameter can be a value of @ref ADCEx_analog_watchdog_mode. */
EricLew	0:80ee8f3b695e	353	uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
EricLew	0:80ee8f3b695e	354	For Analog Watchdog 1: this parameter has an effect only if parameter 'WatchdogMode' is configured on single channel (only 1 channel can be monitored).
EricLew	0:80ee8f3b695e	355	For Analog Watchdog 2 and 3: Several channels can be monitored (successive calls of HAL_ADC_AnalogWDGConfig() must be done, one for each channel.
EricLew	0:80ee8f3b695e	356	Channels group reset can be done by setting WatchdogMode to 'ADC_ANALOGWATCHDOG_NONE').
EricLew	0:80ee8f3b695e	357	This parameter can be a value of @ref ADC_channels. */
EricLew	0:80ee8f3b695e	358	uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
EricLew	0:80ee8f3b695e	359	This parameter can be set to ENABLE or DISABLE */
EricLew	0:80ee8f3b695e	360	uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
EricLew	0:80ee8f3b695e	361	Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF,
EricLew	0:80ee8f3b695e	362	0x3FF, 0xFF or 0x3F respectively.
EricLew	0:80ee8f3b695e	363	Note: Analog watchdog 2 and 3 are limited to a resolution of 8 bits: if ADC resolution is 12 bits
EricLew	0:80ee8f3b695e	364	the 4 LSB are ignored, if ADC resolution is 10 bits the 2 LSB are ignored. */
EricLew	0:80ee8f3b695e	365	uint32_t LowThreshold; /*!< Configures the ADC analog watchdog Low threshold value.
EricLew	0:80ee8f3b695e	366	Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively.
EricLew	0:80ee8f3b695e	367	Note: Analog watchdog 2 and 3 are limited to a resolution of 8 bits: if ADC resolution is 12 bits
EricLew	0:80ee8f3b695e	368	the 4 LSB are ignored, if ADC resolution is 10 bits the 2 LSB are ignored. */
EricLew	0:80ee8f3b695e	369	}ADC_AnalogWDGConfTypeDef;
EricLew	0:80ee8f3b695e	370
EricLew	0:80ee8f3b695e	371
EricLew	0:80ee8f3b695e	372	/**
EricLew	0:80ee8f3b695e	373	* @}
EricLew	0:80ee8f3b695e	374	*/
EricLew	0:80ee8f3b695e	375
EricLew	0:80ee8f3b695e	376	/* Exported constants --------------------------------------------------------*/
EricLew	0:80ee8f3b695e	377
EricLew	0:80ee8f3b695e	378	/** @defgroup ADC_Exported_Constants ADC Exported Constants
EricLew	0:80ee8f3b695e	379	* @{
EricLew	0:80ee8f3b695e	380	*/
EricLew	0:80ee8f3b695e	381
EricLew	0:80ee8f3b695e	382	/** @defgroup ADC_Error_Code ADC Error Code
EricLew	0:80ee8f3b695e	383	* @{
EricLew	0:80ee8f3b695e	384	*/
EricLew	0:80ee8f3b695e	385	#define HAL_ADC_ERROR_NONE ((uint32_t)0x00) /!< No error /
EricLew	0:80ee8f3b695e	386	#define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01) /*!< ADC IP internal error: problem of
EricLew	0:80ee8f3b695e	387	clocking, enable/disable, erroneous state */
EricLew	0:80ee8f3b695e	388	#define HAL_ADC_ERROR_OVR ((uint32_t)0x02) /!< Overrun error /
EricLew	0:80ee8f3b695e	389	#define HAL_ADC_ERROR_DMA ((uint32_t)0x04) /!< DMA transfer error /
EricLew	0:80ee8f3b695e	390	#define HAL_ADC_ERROR_JQOVF ((uint32_t)0x08) /!< Injected context queue overflow error /
EricLew	0:80ee8f3b695e	391	/**
EricLew	0:80ee8f3b695e	392	* @}
EricLew	0:80ee8f3b695e	393	*/
EricLew	0:80ee8f3b695e	394
EricLew	0:80ee8f3b695e	395	/** @defgroup ADC_ClockPrescaler ADC Clock Prescaler
EricLew	0:80ee8f3b695e	396	* @{
EricLew	0:80ee8f3b695e	397	*/
EricLew	0:80ee8f3b695e	398	#define ADC_CLOCK_SYNC_PCLK_DIV1 ((uint32_t)ADC_CCR_CKMODE_0) /!< ADC synchronous clock derived from AHB clock not divided /
EricLew	0:80ee8f3b695e	399	#define ADC_CLOCK_SYNC_PCLK_DIV2 ((uint32_t)ADC_CCR_CKMODE_1) /!< ADC synchronous clock derived from AHB clock divided by 2 /
EricLew	0:80ee8f3b695e	400	#define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CCR_CKMODE) /!< ADC synchronous clock derived from AHB clock divided by 4 /
EricLew	0:80ee8f3b695e	401
EricLew	0:80ee8f3b695e	402	#define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1 /!< Obsolete naming, kept for compatibility with some other devices /
EricLew	0:80ee8f3b695e	403	#define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2 /!< Obsolete naming, kept for compatibility with some other devices /
EricLew	0:80ee8f3b695e	404	#define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4 /!< Obsolete naming, kept for compatibility with some other devices /
EricLew	0:80ee8f3b695e	405
EricLew	0:80ee8f3b695e	406	#define ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000) /!< ADC asynchronous clock not divided /
EricLew	0:80ee8f3b695e	407	#define ADC_CLOCK_ASYNC_DIV2 ((uint32_t)ADC_CCR_PRESC_0) /!< ADC asynchronous clock divided by 2 /
EricLew	0:80ee8f3b695e	408	#define ADC_CLOCK_ASYNC_DIV4 ((uint32_t)ADC_CCR_PRESC_1) /!< ADC asynchronous clock divided by 4 /
EricLew	0:80ee8f3b695e	409	#define ADC_CLOCK_ASYNC_DIV6 ((uint32_t)(ADC_CCR_PRESC_1\|ADC_CCR_PRESC_0)) /!< ADC asynchronous clock divided by 6 /
EricLew	0:80ee8f3b695e	410	#define ADC_CLOCK_ASYNC_DIV8 ((uint32_t)(ADC_CCR_PRESC_2)) /!< ADC asynchronous clock divided by 8 /
EricLew	0:80ee8f3b695e	411	#define ADC_CLOCK_ASYNC_DIV10 ((uint32_t)(ADC_CCR_PRESC_2\|ADC_CCR_PRESC_0)) /!< ADC asynchronous clock divided by 10 /
EricLew	0:80ee8f3b695e	412	#define ADC_CLOCK_ASYNC_DIV12 ((uint32_t)(ADC_CCR_PRESC_2\|ADC_CCR_PRESC_1)) /!< ADC asynchronous clock divided by 12 /
EricLew	0:80ee8f3b695e	413	#define ADC_CLOCK_ASYNC_DIV16 ((uint32_t)(ADC_CCR_PRESC_2\|ADC_CCR_PRESC_1\|ADC_CCR_PRESC_0)) /!< ADC asynchronous clock divided by 16 /
EricLew	0:80ee8f3b695e	414	#define ADC_CLOCK_ASYNC_DIV32 ((uint32_t)(ADC_CCR_PRESC_3)) /!< ADC asynchronous clock divided by 32 /
EricLew	0:80ee8f3b695e	415	#define ADC_CLOCK_ASYNC_DIV64 ((uint32_t)(ADC_CCR_PRESC_3\|ADC_CCR_PRESC_0)) /!< ADC asynchronous clock divided by 64 /
EricLew	0:80ee8f3b695e	416	#define ADC_CLOCK_ASYNC_DIV128 ((uint32_t)(ADC_CCR_PRESC_3\|ADC_CCR_PRESC_1)) /!< ADC asynchronous clock divided by 128 /
EricLew	0:80ee8f3b695e	417	#define ADC_CLOCK_ASYNC_DIV256 ((uint32_t)(ADC_CCR_PRESC_3\|ADC_CCR_PRESC_1\|ADC_CCR_PRESC_0)) /!< ADC asynchronous clock divided by 256 /
EricLew	0:80ee8f3b695e	418	/**
EricLew	0:80ee8f3b695e	419	* @}
EricLew	0:80ee8f3b695e	420	*/
EricLew	0:80ee8f3b695e	421
EricLew	0:80ee8f3b695e	422
EricLew	0:80ee8f3b695e	423	/** @defgroup ADC_Resolution ADC Resolution
EricLew	0:80ee8f3b695e	424	* @{
EricLew	0:80ee8f3b695e	425	*/
EricLew	0:80ee8f3b695e	426	#define ADC_RESOLUTION_12B ((uint32_t)0x00000000) /!< ADC 12-bit resolution /
EricLew	0:80ee8f3b695e	427	#define ADC_RESOLUTION_10B ((uint32_t)ADC_CFGR_RES_0) /!< ADC 10-bit resolution /
EricLew	0:80ee8f3b695e	428	#define ADC_RESOLUTION_8B ((uint32_t)ADC_CFGR_RES_1) /!< ADC 8-bit resolution /
EricLew	0:80ee8f3b695e	429	#define ADC_RESOLUTION_6B ((uint32_t)ADC_CFGR_RES) /!< ADC 6-bit resolution /
EricLew	0:80ee8f3b695e	430	/**
EricLew	0:80ee8f3b695e	431	* @}
EricLew	0:80ee8f3b695e	432	*/
EricLew	0:80ee8f3b695e	433
EricLew	0:80ee8f3b695e	434	/** @defgroup ADC_Data_align ADC Data Alignment
EricLew	0:80ee8f3b695e	435	* @{
EricLew	0:80ee8f3b695e	436	*/
EricLew	0:80ee8f3b695e	437	#define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000) /!< Data right alignment /
EricLew	0:80ee8f3b695e	438	#define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CFGR_ALIGN) /!< Data left alignment /
EricLew	0:80ee8f3b695e	439	/**
EricLew	0:80ee8f3b695e	440	* @}
EricLew	0:80ee8f3b695e	441	*/
EricLew	0:80ee8f3b695e	442
EricLew	0:80ee8f3b695e	443	/** @defgroup ADC_Scan_mode ADC Scan Mode
EricLew	0:80ee8f3b695e	444	* @{
EricLew	0:80ee8f3b695e	445	*/
EricLew	0:80ee8f3b695e	446	#define ADC_SCAN_DISABLE ((uint32_t)0x00000000) /!< Scan mode disabled /
EricLew	0:80ee8f3b695e	447	#define ADC_SCAN_ENABLE ((uint32_t)0x00000001) /!< Scan mode enabled /
EricLew	0:80ee8f3b695e	448	/**
EricLew	0:80ee8f3b695e	449	* @}
EricLew	0:80ee8f3b695e	450	*/
EricLew	0:80ee8f3b695e	451
EricLew	0:80ee8f3b695e	452	/** @defgroup ADC_Regular_External_Trigger_Source_Edge ADC External Trigger Source Edge for Regular Group
EricLew	0:80ee8f3b695e	453	* @{
EricLew	0:80ee8f3b695e	454	*/
EricLew	0:80ee8f3b695e	455	#define ADC_EXTERNALTRIGCONVEDGE_NONE ((uint32_t)0x00000000) /!< Regular conversions hardware trigger detection disabled /
EricLew	0:80ee8f3b695e	456	#define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CFGR_EXTEN_0) /!< Regular conversions hardware trigger detection on the rising edge /
EricLew	0:80ee8f3b695e	457	#define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CFGR_EXTEN_1) /!< Regular conversions hardware trigger detection on the falling edge /
EricLew	0:80ee8f3b695e	458	#define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CFGR_EXTEN) /!< Regular conversions hardware trigger detection on both the rising and falling edges /
EricLew	0:80ee8f3b695e	459	/**
EricLew	0:80ee8f3b695e	460	* @}
EricLew	0:80ee8f3b695e	461	*/
EricLew	0:80ee8f3b695e	462
EricLew	0:80ee8f3b695e	463	/** @defgroup ADC_Regular_External_Trigger_Source ADC External Trigger Source for Regular Group
EricLew	0:80ee8f3b695e	464	* @{
EricLew	0:80ee8f3b695e	465	*/
EricLew	0:80ee8f3b695e	466
EricLew	0:80ee8f3b695e	467	/* External triggers of ADC regular group */
EricLew	0:80ee8f3b695e	468	#define ADC_EXTERNALTRIG_T1_CC1 ((uint32_t)0x00000000) /!< Event 0 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	469	#define ADC_EXTERNALTRIG_T1_CC2 ((uint32_t)ADC_CFGR_EXTSEL_0) /!< Event 1 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	470	#define ADC_EXTERNALTRIG_T1_CC3 ((uint32_t)ADC_CFGR_EXTSEL_1) /!< Event 2 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	471	#define ADC_EXTERNALTRIG_T2_CC2 ((uint32_t)(ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0)) /!< Event 3 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	472	#define ADC_EXTERNALTRIG_T3_TRGO ((uint32_t)ADC_CFGR_EXTSEL_2) /!< Event 4 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	473	#define ADC_EXTERNALTRIG_T4_CC4 ((uint32_t)(ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_0)) /!< Event 5 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	474	#define ADC_EXTERNALTRIG_EXT_IT11 ((uint32_t)(ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_1)) /!< Event 6 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	475	#define ADC_EXTERNALTRIG_T8_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0)) /!< Event 7 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	476	#define ADC_EXTERNALTRIG_T8_TRGO2 ((uint32_t) ADC_CFGR_EXTSEL_3) /!< Event 8 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	477	#define ADC_EXTERNALTRIG_T1_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_0)) /!< Event 9 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	478	#define ADC_EXTERNALTRIG_T1_TRGO2 ((uint32_t)(ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_1)) /!< Event 10 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	479	#define ADC_EXTERNALTRIG_T2_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0)) /!< Event 11 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	480	#define ADC_EXTERNALTRIG_T4_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_2)) /!< Event 12 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	481	#define ADC_EXTERNALTRIG_T6_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_0)) /!< Event 13 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	482	#define ADC_EXTERNALTRIG_T15_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 \| ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_1)) /!< Event 14 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	483	#define ADC_EXTERNALTRIG_T3_CC4 ((uint32_t)ADC_CFGR_EXTSEL) /!< Event 15 triggers regular group conversion start /
EricLew	0:80ee8f3b695e	484
EricLew	0:80ee8f3b695e	485	#define ADC_SOFTWARE_START ((uint32_t)0x00000001) /!< Software triggers regular group conversion start /
EricLew	0:80ee8f3b695e	486	/**
EricLew	0:80ee8f3b695e	487	* @}
EricLew	0:80ee8f3b695e	488	*/
EricLew	0:80ee8f3b695e	489
EricLew	0:80ee8f3b695e	490
EricLew	0:80ee8f3b695e	491	/** @defgroup ADC_EOCSelection ADC End of Regular Sequence/Conversion
EricLew	0:80ee8f3b695e	492	* @{
EricLew	0:80ee8f3b695e	493	*/
EricLew	0:80ee8f3b695e	494	#define ADC_EOC_SINGLE_CONV ((uint32_t) ADC_ISR_EOC) /!< End of conversion flag /
EricLew	0:80ee8f3b695e	495	#define ADC_EOC_SEQ_CONV ((uint32_t) ADC_ISR_EOS) /!< End of sequence flag /
EricLew	0:80ee8f3b695e	496	#define ADC_EOC_SINGLE_SEQ_CONV ((uint32_t)(ADC_ISR_EOC \| ADC_ISR_EOS)) /!< Reserved for future use /
EricLew	0:80ee8f3b695e	497	/**
EricLew	0:80ee8f3b695e	498	* @}
EricLew	0:80ee8f3b695e	499	*/
EricLew	0:80ee8f3b695e	500
EricLew	0:80ee8f3b695e	501	/** @defgroup ADC_Overrun ADC overrun
EricLew	0:80ee8f3b695e	502	* @{
EricLew	0:80ee8f3b695e	503	*/
EricLew	0:80ee8f3b695e	504	#define ADC_OVR_DATA_PRESERVED ((uint32_t)0x00000000) /!< Data preserved in case of overrun /
EricLew	0:80ee8f3b695e	505	#define ADC_OVR_DATA_OVERWRITTEN ((uint32_t)ADC_CFGR_OVRMOD) /!< Data overwritten in case of overrun /
EricLew	0:80ee8f3b695e	506	/**
EricLew	0:80ee8f3b695e	507	* @}
EricLew	0:80ee8f3b695e	508	*/
EricLew	0:80ee8f3b695e	509
EricLew	0:80ee8f3b695e	510	/** @defgroup ADC_channels ADC Channels
EricLew	0:80ee8f3b695e	511	* @{
EricLew	0:80ee8f3b695e	512	*/
EricLew	0:80ee8f3b695e	513	#define ADC_CHANNEL_0 ((uint32_t)(0x00000000)) /!< ADC channel 0 /
EricLew	0:80ee8f3b695e	514	#define ADC_CHANNEL_1 ((uint32_t)(ADC_SQR3_SQ10_0)) /!< ADC channel 1 /
EricLew	0:80ee8f3b695e	515	#define ADC_CHANNEL_2 ((uint32_t)(ADC_SQR3_SQ10_1)) /!< ADC channel 2 /
EricLew	0:80ee8f3b695e	516	#define ADC_CHANNEL_3 ((uint32_t)(ADC_SQR3_SQ10_1 \| ADC_SQR3_SQ10_0)) /!< ADC channel 3 /
EricLew	0:80ee8f3b695e	517	#define ADC_CHANNEL_4 ((uint32_t)(ADC_SQR3_SQ10_2)) /!< ADC channel 4 /
EricLew	0:80ee8f3b695e	518	#define ADC_CHANNEL_5 ((uint32_t)(ADC_SQR3_SQ10_2 \| ADC_SQR3_SQ10_0)) /!< ADC channel 5 /
EricLew	0:80ee8f3b695e	519	#define ADC_CHANNEL_6 ((uint32_t)(ADC_SQR3_SQ10_2 \| ADC_SQR3_SQ10_1)) /!< ADC channel 6 /
EricLew	0:80ee8f3b695e	520	#define ADC_CHANNEL_7 ((uint32_t)(ADC_SQR3_SQ10_2 \| ADC_SQR3_SQ10_1 \| ADC_SQR3_SQ10_0)) /!< ADC channel 7 /
EricLew	0:80ee8f3b695e	521	#define ADC_CHANNEL_8 ((uint32_t)(ADC_SQR3_SQ10_3)) /!< ADC channel 8 /
EricLew	0:80ee8f3b695e	522	#define ADC_CHANNEL_9 ((uint32_t)(ADC_SQR3_SQ10_3 \| ADC_SQR3_SQ10_0)) /!< ADC channel 9 /
EricLew	0:80ee8f3b695e	523	#define ADC_CHANNEL_10 ((uint32_t)(ADC_SQR3_SQ10_3 \| ADC_SQR3_SQ10_1)) /!< ADC channel 10 /
EricLew	0:80ee8f3b695e	524	#define ADC_CHANNEL_11 ((uint32_t)(ADC_SQR3_SQ10_3 \| ADC_SQR3_SQ10_1 \| ADC_SQR3_SQ10_0)) /!< ADC channel 11 /
EricLew	0:80ee8f3b695e	525	#define ADC_CHANNEL_12 ((uint32_t)(ADC_SQR3_SQ10_3 \| ADC_SQR3_SQ10_2)) /!< ADC channel 12 /
EricLew	0:80ee8f3b695e	526	#define ADC_CHANNEL_13 ((uint32_t)(ADC_SQR3_SQ10_3 \| ADC_SQR3_SQ10_2 \| ADC_SQR3_SQ10_0)) /!< ADC channel 13 /
EricLew	0:80ee8f3b695e	527	#define ADC_CHANNEL_14 ((uint32_t)(ADC_SQR3_SQ10_3 \| ADC_SQR3_SQ10_2 \| ADC_SQR3_SQ10_1)) /!< ADC channel 14 /
EricLew	0:80ee8f3b695e	528	#define ADC_CHANNEL_15 ((uint32_t)(ADC_SQR3_SQ10_3 \| ADC_SQR3_SQ10_2 \| ADC_SQR3_SQ10_1 \| ADC_SQR3_SQ10_0)) /!< ADC channel 15 /
EricLew	0:80ee8f3b695e	529	#define ADC_CHANNEL_16 ((uint32_t)(ADC_SQR3_SQ10_4)) /!< ADC channel 16 /
EricLew	0:80ee8f3b695e	530	#define ADC_CHANNEL_17 ((uint32_t)(ADC_SQR3_SQ10_4 \| ADC_SQR3_SQ10_0)) /!< ADC channel 17 /
EricLew	0:80ee8f3b695e	531	#define ADC_CHANNEL_18 ((uint32_t)(ADC_SQR3_SQ10_4 \| ADC_SQR3_SQ10_1)) /!< ADC channel 18 /
EricLew	0:80ee8f3b695e	532
EricLew	0:80ee8f3b695e	533	/* Note: VrefInt, TempSensor and Vbat internal channels are not available on all ADC's
EricLew	0:80ee8f3b695e	534	(information present in Reference Manual) */
EricLew	0:80ee8f3b695e	535	#define ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_17 /!< ADC temperature sensor channel /
EricLew	0:80ee8f3b695e	536	#define ADC_CHANNEL_VBAT ADC_CHANNEL_18 /!< ADC Vbat channel /
EricLew	0:80ee8f3b695e	537	#define ADC_CHANNEL_VREFINT ADC_CHANNEL_0 /!< ADC Vrefint channel /
EricLew	0:80ee8f3b695e	538	/**
EricLew	0:80ee8f3b695e	539	* @}
EricLew	0:80ee8f3b695e	540	*/
EricLew	0:80ee8f3b695e	541
EricLew	0:80ee8f3b695e	542	/** @defgroup ADC_sampling_times ADC Sampling Times
EricLew	0:80ee8f3b695e	543	* @{
EricLew	0:80ee8f3b695e	544	*/
EricLew	0:80ee8f3b695e	545	#define ADC_SAMPLETIME_2CYCLE_5 ((uint32_t)0x00000000) /!< Sampling time 2.5 ADC clock cycle /
EricLew	0:80ee8f3b695e	546	#define ADC_SAMPLETIME_6CYCLES_5 ((uint32_t)ADC_SMPR2_SMP10_0) /!< Sampling time 6.5 ADC clock cycles /
EricLew	0:80ee8f3b695e	547	#define ADC_SAMPLETIME_12CYCLES_5 ((uint32_t)ADC_SMPR2_SMP10_1) /!< Sampling time 12.5 ADC clock cycles /
EricLew	0:80ee8f3b695e	548	#define ADC_SAMPLETIME_24CYCLES_5 ((uint32_t)(ADC_SMPR2_SMP10_1 \| ADC_SMPR2_SMP10_0)) /!< Sampling time 24.5 ADC clock cycles /
EricLew	0:80ee8f3b695e	549	#define ADC_SAMPLETIME_47CYCLES_5 ((uint32_t)ADC_SMPR2_SMP10_2) /!< Sampling time 47.5 ADC clock cycles /
EricLew	0:80ee8f3b695e	550	#define ADC_SAMPLETIME_92CYCLES_5 ((uint32_t)(ADC_SMPR2_SMP10_2 \| ADC_SMPR2_SMP10_0)) /!< Sampling time 92.5 ADC clock cycles /
EricLew	0:80ee8f3b695e	551	#define ADC_SAMPLETIME_247CYCLES_5 ((uint32_t)(ADC_SMPR2_SMP10_2 \| ADC_SMPR2_SMP10_1)) /!< Sampling time 247.5 ADC clock cycles /
EricLew	0:80ee8f3b695e	552	#define ADC_SAMPLETIME_640CYCLES_5 ((uint32_t)ADC_SMPR2_SMP10) /!< Sampling time 640.5 ADC clock cycles /
EricLew	0:80ee8f3b695e	553	/**
EricLew	0:80ee8f3b695e	554	* @}
EricLew	0:80ee8f3b695e	555	*/
EricLew	0:80ee8f3b695e	556
EricLew	0:80ee8f3b695e	557	/**
EricLew	0:80ee8f3b695e	558	* @}
EricLew	0:80ee8f3b695e	559	*/
EricLew	0:80ee8f3b695e	560
EricLew	0:80ee8f3b695e	561	/* Private macros ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	562
EricLew	0:80ee8f3b695e	563	/** @defgroup ADC_Private_Macro ADC Private Macros
EricLew	0:80ee8f3b695e	564	* @{
EricLew	0:80ee8f3b695e	565	*/
EricLew	0:80ee8f3b695e	566
EricLew	0:80ee8f3b695e	567	/**
EricLew	0:80ee8f3b695e	568	* @brief Test if conversion trigger of regular group is software start
EricLew	0:80ee8f3b695e	569	* or external trigger.
EricLew	0:80ee8f3b695e	570	* @param __HANDLE__: ADC handle.
EricLew	0:80ee8f3b695e	571	* @retval SET (software start) or RESET (external trigger)
EricLew	0:80ee8f3b695e	572	*/
EricLew	0:80ee8f3b695e	573	#define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \
EricLew	0:80ee8f3b695e	574	(((__HANDLE__)->Instance->CFGR & ADC_CFGR_EXTEN) == RESET)
EricLew	0:80ee8f3b695e	575
EricLew	0:80ee8f3b695e	576	/**
EricLew	0:80ee8f3b695e	577	* @brief Return resolution bits in CFGR register RES[1:0] field.
EricLew	0:80ee8f3b695e	578	* @param __HANDLE__: ADC handle.
EricLew	0:80ee8f3b695e	579	* @retval 2-bit field RES of CFGR register.
EricLew	0:80ee8f3b695e	580	*/
EricLew	0:80ee8f3b695e	581	#define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES)
EricLew	0:80ee8f3b695e	582
EricLew	0:80ee8f3b695e	583	/**
EricLew	0:80ee8f3b695e	584	* @brief Clear ADC error code (set it to no error code "HAL_ADC_ERROR_NONE").
EricLew	0:80ee8f3b695e	585	* @param __HANDLE__: ADC handle.
EricLew	0:80ee8f3b695e	586	* @retval None
EricLew	0:80ee8f3b695e	587	*/
EricLew	0:80ee8f3b695e	588	#define ADC_CLEAR_ERRORCODE(__HANDLE__) ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)
EricLew	0:80ee8f3b695e	589
EricLew	0:80ee8f3b695e	590	/**
EricLew	0:80ee8f3b695e	591	* @brief Verification of ADC state: enabled or disabled.
EricLew	0:80ee8f3b695e	592	* @param __HANDLE__: ADC handle.
EricLew	0:80ee8f3b695e	593	* @retval SET (ADC enabled) or RESET (ADC disabled)
EricLew	0:80ee8f3b695e	594	*/
EricLew	0:80ee8f3b695e	595	#define ADC_IS_ENABLE(__HANDLE__) \
EricLew	0:80ee8f3b695e	596	(( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN \| ADC_CR_ADDIS)) == ADC_CR_ADEN) && \
EricLew	0:80ee8f3b695e	597	((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) \
EricLew	0:80ee8f3b695e	598	) ? SET : RESET)
EricLew	0:80ee8f3b695e	599
EricLew	0:80ee8f3b695e	600
EricLew	0:80ee8f3b695e	601	/**
EricLew	0:80ee8f3b695e	602	* @brief Check if conversion is on going on regular group.
EricLew	0:80ee8f3b695e	603	* @param __HANDLE__: ADC handle.
EricLew	0:80ee8f3b695e	604	* @retval SET (conversion is on going) or RESET (no conversion is on going)
EricLew	0:80ee8f3b695e	605	*/
EricLew	0:80ee8f3b695e	606	#define ADC_IS_CONVERSION_ONGOING_REGULAR(__HANDLE__) \
EricLew	0:80ee8f3b695e	607	(( (((__HANDLE__)->Instance->CR) & ADC_CR_ADSTART) == RESET \
EricLew	0:80ee8f3b695e	608	) ? RESET : SET)
EricLew	0:80ee8f3b695e	609
EricLew	0:80ee8f3b695e	610
EricLew	0:80ee8f3b695e	611	/**
EricLew	0:80ee8f3b695e	612	* @brief Simultaneously clear and set specific bits of the handle State.
EricLew	0:80ee8f3b695e	613	* @note ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(),
EricLew	0:80ee8f3b695e	614	* the first parameter is the ADC handle State, the second parameter is the
EricLew	0:80ee8f3b695e	615	* bit field to clear, the third and last parameter is the bit field to set.
EricLew	0:80ee8f3b695e	616	* @retval None
EricLew	0:80ee8f3b695e	617	*/
EricLew	0:80ee8f3b695e	618	#define ADC_STATE_CLR_SET MODIFY_REG
EricLew	0:80ee8f3b695e	619
EricLew	0:80ee8f3b695e	620	/**
EricLew	0:80ee8f3b695e	621	* @brief Verify that a given value is aligned with the ADC resolution range.
EricLew	0:80ee8f3b695e	622	* @param __RESOLUTION__: ADC resolution (12, 10, 8 or 6 bits).
EricLew	0:80ee8f3b695e	623	* @param __ADC_VALUE__: value checked against the resolution.
EricLew	0:80ee8f3b695e	624	* @retval SET (__ADC_VALUE__ in line with __RESOLUTION__) or RESET (__ADC_VALUE__ not in line with __RESOLUTION__)
EricLew	0:80ee8f3b695e	625	*/
EricLew	0:80ee8f3b695e	626	#define IS_ADC_RANGE(__RESOLUTION__, __ADC_VALUE__) \
EricLew	0:80ee8f3b695e	627	((((__RESOLUTION__) == ADC_RESOLUTION_12B) && ((__ADC_VALUE__) <= ((uint32_t)0x0FFF))) \|\| \
EricLew	0:80ee8f3b695e	628	(((__RESOLUTION__) == ADC_RESOLUTION_10B) && ((__ADC_VALUE__) <= ((uint32_t)0x03FF))) \|\| \
EricLew	0:80ee8f3b695e	629	(((__RESOLUTION__) == ADC_RESOLUTION_8B) && ((__ADC_VALUE__) <= ((uint32_t)0x00FF))) \|\| \
EricLew	0:80ee8f3b695e	630	(((__RESOLUTION__) == ADC_RESOLUTION_6B) && ((__ADC_VALUE__) <= ((uint32_t)0x003F))) )
EricLew	0:80ee8f3b695e	631
EricLew	0:80ee8f3b695e	632
EricLew	0:80ee8f3b695e	633	/**
EricLew	0:80ee8f3b695e	634	* @brief Verify the length of the scheduled regular conversions group.
EricLew	0:80ee8f3b695e	635	* @param __LENGTH__: number of programmed conversions.
EricLew	0:80ee8f3b695e	636	* @retval SET (__LENGTH__ is within the maximum number of possible programmable regular conversions) or RESET (__LENGTH__ is null or too large)
EricLew	0:80ee8f3b695e	637	*/
EricLew	0:80ee8f3b695e	638	#define IS_ADC_REGULAR_NB_CONV(__LENGTH__) (((__LENGTH__) >= ((uint32_t)1)) && ((__LENGTH__) <= ((uint32_t)16)))
EricLew	0:80ee8f3b695e	639
EricLew	0:80ee8f3b695e	640
EricLew	0:80ee8f3b695e	641	/**
EricLew	0:80ee8f3b695e	642	* @brief Verify the number of scheduled regular conversions in discontinuous mode.
EricLew	0:80ee8f3b695e	643	* @param NUMBER: number of scheduled regular conversions in discontinuous mode.
EricLew	0:80ee8f3b695e	644	* @retval SET (NUMBER is within the maximum number of regular conversions in discontinous mode) or RESET (NUMBER is null or too large)
EricLew	0:80ee8f3b695e	645	*/
EricLew	0:80ee8f3b695e	646	#define IS_ADC_REGULAR_DISCONT_NUMBER(NUMBER) (((NUMBER) >= ((uint32_t)1)) && ((NUMBER) <= ((uint32_t)8)))
EricLew	0:80ee8f3b695e	647
EricLew	0:80ee8f3b695e	648
EricLew	0:80ee8f3b695e	649	/**
EricLew	0:80ee8f3b695e	650	* @brief Verify the ADC clock setting.
EricLew	0:80ee8f3b695e	651	* @param __ADC_CLOCK__: programmed ADC clock.
EricLew	0:80ee8f3b695e	652	* @retval SET (__ADC_CLOCK__ is a valid value) or RESET (__ADC_CLOCK__ is invalid)
EricLew	0:80ee8f3b695e	653	*/
EricLew	0:80ee8f3b695e	654	#define IS_ADC_CLOCKPRESCALER(__ADC_CLOCK__) (((__ADC_CLOCK__) == ADC_CLOCK_SYNC_PCLK_DIV1) \|\| \
EricLew	0:80ee8f3b695e	655	((__ADC_CLOCK__) == ADC_CLOCK_SYNC_PCLK_DIV2) \|\| \
EricLew	0:80ee8f3b695e	656	((__ADC_CLOCK__) == ADC_CLOCK_SYNC_PCLK_DIV4) \|\| \
EricLew	0:80ee8f3b695e	657	((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV1) \|\| \
EricLew	0:80ee8f3b695e	658	((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV2) \|\| \
EricLew	0:80ee8f3b695e	659	((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV4) \|\| \
EricLew	0:80ee8f3b695e	660	((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV6) \|\| \
EricLew	0:80ee8f3b695e	661	((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV8) \|\| \
EricLew	0:80ee8f3b695e	662	((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV10) \|\| \
EricLew	0:80ee8f3b695e	663	((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV12) \|\| \
EricLew	0:80ee8f3b695e	664	((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV16) \|\| \
EricLew	0:80ee8f3b695e	665	((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV32) \|\| \
EricLew	0:80ee8f3b695e	666	((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV64) \|\| \
EricLew	0:80ee8f3b695e	667	((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV128) \|\| \
EricLew	0:80ee8f3b695e	668	((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV256) )
EricLew	0:80ee8f3b695e	669
EricLew	0:80ee8f3b695e	670
EricLew	0:80ee8f3b695e	671	/**
EricLew	0:80ee8f3b695e	672	* @brief Verify the ADC resolution setting.
EricLew	0:80ee8f3b695e	673	* @param __RESOLUTION__: programmed ADC resolution.
EricLew	0:80ee8f3b695e	674	* @retval SET (__RESOLUTION__ is a valid value) or RESET (__RESOLUTION__ is invalid)
EricLew	0:80ee8f3b695e	675	*/
EricLew	0:80ee8f3b695e	676	#define IS_ADC_RESOLUTION(__RESOLUTION__) (((__RESOLUTION__) == ADC_RESOLUTION_12B) \|\| \
EricLew	0:80ee8f3b695e	677	((__RESOLUTION__) == ADC_RESOLUTION_10B) \|\| \
EricLew	0:80ee8f3b695e	678	((__RESOLUTION__) == ADC_RESOLUTION_8B) \|\| \
EricLew	0:80ee8f3b695e	679	((__RESOLUTION__) == ADC_RESOLUTION_6B) )
EricLew	0:80ee8f3b695e	680
EricLew	0:80ee8f3b695e	681	/**
EricLew	0:80ee8f3b695e	682	* @brief Verify the ADC resolution setting when limited to 6 or 8 bits.
EricLew	0:80ee8f3b695e	683	* @param __RESOLUTION__: programmed ADC resolution when limited to 6 or 8 bits.
EricLew	0:80ee8f3b695e	684	* @retval SET (__RESOLUTION__ is a valid value) or RESET (__RESOLUTION__ is invalid)
EricLew	0:80ee8f3b695e	685	*/
EricLew	0:80ee8f3b695e	686	#define IS_ADC_RESOLUTION_8_6_BITS(__RESOLUTION__) (((__RESOLUTION__) == ADC_RESOLUTION_8B) \|\| \
EricLew	0:80ee8f3b695e	687	((__RESOLUTION__) == ADC_RESOLUTION_6B) )
EricLew	0:80ee8f3b695e	688
EricLew	0:80ee8f3b695e	689	/**
EricLew	0:80ee8f3b695e	690	* @brief Verify the ADC converted data alignment.
EricLew	0:80ee8f3b695e	691	* @param __ALIGN__: programmed ADC converted data alignment.
EricLew	0:80ee8f3b695e	692	* @retval SET (__ALIGN__ is a valid value) or RESET (__ALIGN__ is invalid)
EricLew	0:80ee8f3b695e	693	*/
EricLew	0:80ee8f3b695e	694	#define IS_ADC_DATA_ALIGN(__ALIGN__) (((__ALIGN__) == ADC_DATAALIGN_RIGHT) \|\| \
EricLew	0:80ee8f3b695e	695	((__ALIGN__) == ADC_DATAALIGN_LEFT) )
EricLew	0:80ee8f3b695e	696
EricLew	0:80ee8f3b695e	697
EricLew	0:80ee8f3b695e	698	/**
EricLew	0:80ee8f3b695e	699	* @brief Verify the ADC scan mode.
EricLew	0:80ee8f3b695e	700	* @param __SCAN_MODE__: programmed ADC scan mode.
EricLew	0:80ee8f3b695e	701	* @retval SET (__SCAN_MODE__ is valid) or RESET (__SCAN_MODE__ is invalid)
EricLew	0:80ee8f3b695e	702	*/
EricLew	0:80ee8f3b695e	703	#define IS_ADC_SCAN_MODE(__SCAN_MODE__) (((__SCAN_MODE__) == ADC_SCAN_DISABLE) \|\| \
EricLew	0:80ee8f3b695e	704	((__SCAN_MODE__) == ADC_SCAN_ENABLE) )
EricLew	0:80ee8f3b695e	705
EricLew	0:80ee8f3b695e	706	/**
EricLew	0:80ee8f3b695e	707	* @brief Verify the ADC edge trigger setting for regular group.
EricLew	0:80ee8f3b695e	708	* @param __EDGE__: programmed ADC edge trigger setting.
EricLew	0:80ee8f3b695e	709	* @retval SET (__EDGE__ is a valid value) or RESET (__EDGE__ is invalid)
EricLew	0:80ee8f3b695e	710	*/
EricLew	0:80ee8f3b695e	711	#define IS_ADC_EXTTRIG_EDGE(__EDGE__) (((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_NONE) \|\| \
EricLew	0:80ee8f3b695e	712	((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_RISING) \|\| \
EricLew	0:80ee8f3b695e	713	((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_FALLING) \|\| \
EricLew	0:80ee8f3b695e	714	((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING) )
EricLew	0:80ee8f3b695e	715
EricLew	0:80ee8f3b695e	716
EricLew	0:80ee8f3b695e	717
EricLew	0:80ee8f3b695e	718	/**
EricLew	0:80ee8f3b695e	719	* @brief Verify the ADC regular conversions external trigger.
EricLew	0:80ee8f3b695e	720	* @param __REGTRIG__: programmed ADC regular conversions external trigger.
EricLew	0:80ee8f3b695e	721	* @retval SET (__REGTRIG__ is a valid value) or RESET (__REGTRIG__ is invalid)
EricLew	0:80ee8f3b695e	722	*/
EricLew	0:80ee8f3b695e	723	#define IS_ADC_EXTTRIG(__REGTRIG__) (((__REGTRIG__) == ADC_EXTERNALTRIG_T1_CC1) \|\| \
EricLew	0:80ee8f3b695e	724	((__REGTRIG__) == ADC_EXTERNALTRIG_T1_CC2) \|\| \
EricLew	0:80ee8f3b695e	725	((__REGTRIG__) == ADC_EXTERNALTRIG_T1_CC3) \|\| \
EricLew	0:80ee8f3b695e	726	((__REGTRIG__) == ADC_EXTERNALTRIG_T2_CC2) \|\| \
EricLew	0:80ee8f3b695e	727	((__REGTRIG__) == ADC_EXTERNALTRIG_T3_TRGO) \|\| \
EricLew	0:80ee8f3b695e	728	((__REGTRIG__) == ADC_EXTERNALTRIG_T4_CC4) \|\| \
EricLew	0:80ee8f3b695e	729	((__REGTRIG__) == ADC_EXTERNALTRIG_EXT_IT11) \|\| \
EricLew	0:80ee8f3b695e	730	((__REGTRIG__) == ADC_EXTERNALTRIG_T8_TRGO) \|\| \
EricLew	0:80ee8f3b695e	731	((__REGTRIG__) == ADC_EXTERNALTRIG_T8_TRGO2) \|\| \
EricLew	0:80ee8f3b695e	732	((__REGTRIG__) == ADC_EXTERNALTRIG_T1_TRGO) \|\| \
EricLew	0:80ee8f3b695e	733	((__REGTRIG__) == ADC_EXTERNALTRIG_T1_TRGO2) \|\| \
EricLew	0:80ee8f3b695e	734	((__REGTRIG__) == ADC_EXTERNALTRIG_T2_TRGO) \|\| \
EricLew	0:80ee8f3b695e	735	((__REGTRIG__) == ADC_EXTERNALTRIG_T4_TRGO) \|\| \
EricLew	0:80ee8f3b695e	736	((__REGTRIG__) == ADC_EXTERNALTRIG_T6_TRGO) \|\| \
EricLew	0:80ee8f3b695e	737	((__REGTRIG__) == ADC_EXTERNALTRIG_T15_TRGO) \|\| \
EricLew	0:80ee8f3b695e	738	((__REGTRIG__) == ADC_EXTERNALTRIG_T3_CC4) \|\| \
EricLew	0:80ee8f3b695e	739	\
EricLew	0:80ee8f3b695e	740	((__REGTRIG__) == ADC_SOFTWARE_START) )
EricLew	0:80ee8f3b695e	741
EricLew	0:80ee8f3b695e	742
EricLew	0:80ee8f3b695e	743
EricLew	0:80ee8f3b695e	744	/**
EricLew	0:80ee8f3b695e	745	* @brief Verify the ADC regular conversions check for converted data availability.
EricLew	0:80ee8f3b695e	746	* @param __EOC_SELECTION__: converted data availability check.
EricLew	0:80ee8f3b695e	747	* @retval SET (__EOC_SELECTION__ is a valid value) or RESET (__EOC_SELECTION__ is invalid)
EricLew	0:80ee8f3b695e	748	*/
EricLew	0:80ee8f3b695e	749	#define IS_ADC_EOC_SELECTION(__EOC_SELECTION__) (((__EOC_SELECTION__) == ADC_EOC_SINGLE_CONV) \|\| \
EricLew	0:80ee8f3b695e	750	((__EOC_SELECTION__) == ADC_EOC_SEQ_CONV) \|\| \
EricLew	0:80ee8f3b695e	751	((__EOC_SELECTION__) == ADC_EOC_SINGLE_SEQ_CONV) )
EricLew	0:80ee8f3b695e	752
EricLew	0:80ee8f3b695e	753	/**
EricLew	0:80ee8f3b695e	754	* @brief Verify the ADC regular conversions overrun handling.
EricLew	0:80ee8f3b695e	755	* @param __OVR__: ADC regular conversions overrun handling.
EricLew	0:80ee8f3b695e	756	* @retval SET (__OVR__ is a valid value) or RESET (__OVR__ is invalid)
EricLew	0:80ee8f3b695e	757	*/
EricLew	0:80ee8f3b695e	758	#define IS_ADC_OVERRUN(__OVR__) (((__OVR__) == ADC_OVR_DATA_PRESERVED) \|\| \
EricLew	0:80ee8f3b695e	759	((__OVR__) == ADC_OVR_DATA_OVERWRITTEN) )
EricLew	0:80ee8f3b695e	760
EricLew	0:80ee8f3b695e	761	/**
EricLew	0:80ee8f3b695e	762	* @brief Verify the ADC conversions sampling time.
EricLew	0:80ee8f3b695e	763	* @param __TIME__: ADC conversions sampling time.
EricLew	0:80ee8f3b695e	764	* @retval SET (__TIME__ is a valid value) or RESET (__TIME__ is invalid)
EricLew	0:80ee8f3b695e	765	*/
EricLew	0:80ee8f3b695e	766	#define IS_ADC_SAMPLE_TIME(__TIME__) (((__TIME__) == ADC_SAMPLETIME_2CYCLE_5) \|\| \
EricLew	0:80ee8f3b695e	767	((__TIME__) == ADC_SAMPLETIME_6CYCLES_5) \|\| \
EricLew	0:80ee8f3b695e	768	((__TIME__) == ADC_SAMPLETIME_12CYCLES_5) \|\| \
EricLew	0:80ee8f3b695e	769	((__TIME__) == ADC_SAMPLETIME_24CYCLES_5) \|\| \
EricLew	0:80ee8f3b695e	770	((__TIME__) == ADC_SAMPLETIME_47CYCLES_5) \|\| \
EricLew	0:80ee8f3b695e	771	((__TIME__) == ADC_SAMPLETIME_92CYCLES_5) \|\| \
EricLew	0:80ee8f3b695e	772	((__TIME__) == ADC_SAMPLETIME_247CYCLES_5) \|\| \
EricLew	0:80ee8f3b695e	773	((__TIME__) == ADC_SAMPLETIME_640CYCLES_5) )
EricLew	0:80ee8f3b695e	774	/**
EricLew	0:80ee8f3b695e	775	* @}
EricLew	0:80ee8f3b695e	776	*/
EricLew	0:80ee8f3b695e	777
EricLew	0:80ee8f3b695e	778
EricLew	0:80ee8f3b695e	779	/* Private constants ---------------------------------------------------------*/
EricLew	0:80ee8f3b695e	780
EricLew	0:80ee8f3b695e	781	/** @defgroup ADC_Private_Constants ADC Private Constants
EricLew	0:80ee8f3b695e	782	* @{
EricLew	0:80ee8f3b695e	783	*/
EricLew	0:80ee8f3b695e	784
EricLew	0:80ee8f3b695e	785	/* Fixed timeout values for ADC conversion (including sampling time) */
EricLew	0:80ee8f3b695e	786	/* Maximum sampling time is 640.5 ADC clock cycle (SMPx[2:0] = 0b111 */
EricLew	0:80ee8f3b695e	787	/* Maximum conversion time is 12.5 + Maximum sampling time */
EricLew	0:80ee8f3b695e	788	/* or 12.5 + 640.5 = 653 ADC clock cycles */
EricLew	0:80ee8f3b695e	789	/* Minimum ADC Clock frequency is 0.14 MHz */
EricLew	0:80ee8f3b695e	790	/* Maximum conversion time is */
EricLew	0:80ee8f3b695e	791	/* 653 / 0.14 MHz = 4.66 ms */
EricLew	0:80ee8f3b695e	792	#define ADC_STOP_CONVERSION_TIMEOUT ((uint32_t) 5) /!< ADC stop time-out value /
EricLew	0:80ee8f3b695e	793
EricLew	0:80ee8f3b695e	794	/* Delay for temperature sensor stabilization time. */
EricLew	0:80ee8f3b695e	795	/* Maximum delay is 120us (refer device datasheet, parameter tSTART). */
EricLew	0:80ee8f3b695e	796	/* Unit: us */
EricLew	0:80ee8f3b695e	797	#define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 120)
EricLew	0:80ee8f3b695e	798
EricLew	0:80ee8f3b695e	799	/**
EricLew	0:80ee8f3b695e	800	* @}
EricLew	0:80ee8f3b695e	801	*/
EricLew	0:80ee8f3b695e	802
EricLew	0:80ee8f3b695e	803	/* Exported macros -----------------------------------------------------------*/
EricLew	0:80ee8f3b695e	804
EricLew	0:80ee8f3b695e	805	/** @defgroup ADC_Exported_Macro ADC Exported Macros
EricLew	0:80ee8f3b695e	806	* @{
EricLew	0:80ee8f3b695e	807	*/
EricLew	0:80ee8f3b695e	808
EricLew	0:80ee8f3b695e	809	/** @brief Reset ADC handle state.
EricLew	0:80ee8f3b695e	810	* @param __HANDLE__: ADC handle.
EricLew	0:80ee8f3b695e	811	* @retval None
EricLew	0:80ee8f3b695e	812	*/
EricLew	0:80ee8f3b695e	813	#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
EricLew	0:80ee8f3b695e	814
EricLew	0:80ee8f3b695e	815
EricLew	0:80ee8f3b695e	816	/** @brief Check whether the specified ADC interrupt source is enabled or not.
EricLew	0:80ee8f3b695e	817	* @param __HANDLE__: ADC handle.
EricLew	0:80ee8f3b695e	818	* @param __INTERRUPT__: ADC interrupt source to check
EricLew	0:80ee8f3b695e	819	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	820	* @arg ADC_IT_RDY, ADC Ready (ADRDY) interrupt source
EricLew	0:80ee8f3b695e	821	* @arg ADC_IT_EOSMP, ADC End of Sampling interrupt source
EricLew	0:80ee8f3b695e	822	* @arg ADC_IT_EOC, ADC End of Regular Conversion interrupt source
EricLew	0:80ee8f3b695e	823	* @arg ADC_IT_EOS, ADC End of Regular sequence of Conversions interrupt source
EricLew	0:80ee8f3b695e	824	* @arg ADC_IT_OVR, ADC overrun interrupt source
EricLew	0:80ee8f3b695e	825	* @arg ADC_IT_JEOC, ADC End of Injected Conversion interrupt source
EricLew	0:80ee8f3b695e	826	* @arg ADC_IT_JEOS, ADC End of Injected sequence of Conversions interrupt source
EricLew	0:80ee8f3b695e	827	* @arg ADC_IT_AWD1, ADC Analog watchdog 1 interrupt source (main analog watchdog)
EricLew	0:80ee8f3b695e	828	* @arg ADC_IT_AWD2, ADC Analog watchdog 2 interrupt source (additional analog watchdog)
EricLew	0:80ee8f3b695e	829	* @arg ADC_IT_AWD3, ADC Analog watchdog 3 interrupt source (additional analog watchdog)
EricLew	0:80ee8f3b695e	830	* @arg ADC_IT_JQOVF, ADC Injected Context Queue Overflow interrupt source.
EricLew	0:80ee8f3b695e	831	* @retval State of interruption (SET or RESET)
EricLew	0:80ee8f3b695e	832	*/
EricLew	0:80ee8f3b695e	833	#define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \
EricLew	0:80ee8f3b695e	834	(( ((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__) \
EricLew	0:80ee8f3b695e	835	)? SET : RESET \
EricLew	0:80ee8f3b695e	836	)
EricLew	0:80ee8f3b695e	837
EricLew	0:80ee8f3b695e	838	/**
EricLew	0:80ee8f3b695e	839	* @brief Enable an ADC interrupt.
EricLew	0:80ee8f3b695e	840	* @param __HANDLE__: ADC handle.
EricLew	0:80ee8f3b695e	841	* @param __INTERRUPT__: ADC Interrupt to enable
EricLew	0:80ee8f3b695e	842	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	843	* @arg ADC_IT_RDY, ADC Ready (ADRDY) interrupt source
EricLew	0:80ee8f3b695e	844	* @arg ADC_IT_EOSMP, ADC End of Sampling interrupt source
EricLew	0:80ee8f3b695e	845	* @arg ADC_IT_EOC, ADC End of Regular Conversion interrupt source
EricLew	0:80ee8f3b695e	846	* @arg ADC_IT_EOS, ADC End of Regular sequence of Conversions interrupt source
EricLew	0:80ee8f3b695e	847	* @arg ADC_IT_OVR, ADC overrun interrupt source
EricLew	0:80ee8f3b695e	848	* @arg ADC_IT_JEOC, ADC End of Injected Conversion interrupt source
EricLew	0:80ee8f3b695e	849	* @arg ADC_IT_JEOS, ADC End of Injected sequence of Conversions interrupt source
EricLew	0:80ee8f3b695e	850	* @arg ADC_IT_AWD1, ADC Analog watchdog 1 interrupt source (main analog watchdog)
EricLew	0:80ee8f3b695e	851	* @arg ADC_IT_AWD2, ADC Analog watchdog 2 interrupt source (additional analog watchdog)
EricLew	0:80ee8f3b695e	852	* @arg ADC_IT_AWD3, ADC Analog watchdog 3 interrupt source (additional analog watchdog)
EricLew	0:80ee8f3b695e	853	* @arg ADC_IT_JQOVF, ADC Injected Context Queue Overflow interrupt source.
EricLew	0:80ee8f3b695e	854	* @retval None
EricLew	0:80ee8f3b695e	855	*/
EricLew	0:80ee8f3b695e	856	#define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) \|= (__INTERRUPT__))
EricLew	0:80ee8f3b695e	857
EricLew	0:80ee8f3b695e	858	/**
EricLew	0:80ee8f3b695e	859	* @brief Disable an ADC interrupt.
EricLew	0:80ee8f3b695e	860	* @param __HANDLE__: ADC handle.
EricLew	0:80ee8f3b695e	861	* @param __INTERRUPT__: ADC Interrupt to disable
EricLew	0:80ee8f3b695e	862	* @arg ADC_IT_RDY, ADC Ready (ADRDY) interrupt source
EricLew	0:80ee8f3b695e	863	* @arg ADC_IT_EOSMP, ADC End of Sampling interrupt source
EricLew	0:80ee8f3b695e	864	* @arg ADC_IT_EOC, ADC End of Regular Conversion interrupt source
EricLew	0:80ee8f3b695e	865	* @arg ADC_IT_EOS, ADC End of Regular sequence of Conversions interrupt source
EricLew	0:80ee8f3b695e	866	* @arg ADC_IT_OVR, ADC overrun interrupt source
EricLew	0:80ee8f3b695e	867	* @arg ADC_IT_JEOC, ADC End of Injected Conversion interrupt source
EricLew	0:80ee8f3b695e	868	* @arg ADC_IT_JEOS, ADC End of Injected sequence of Conversions interrupt source
EricLew	0:80ee8f3b695e	869	* @arg ADC_IT_AWD1, ADC Analog watchdog 1 interrupt source (main analog watchdog)
EricLew	0:80ee8f3b695e	870	* @arg ADC_IT_AWD2, ADC Analog watchdog 2 interrupt source (additional analog watchdog)
EricLew	0:80ee8f3b695e	871	* @arg ADC_IT_AWD3, ADC Analog watchdog 3 interrupt source (additional analog watchdog)
EricLew	0:80ee8f3b695e	872	* @arg ADC_IT_JQOVF, ADC Injected Context Queue Overflow interrupt source.
EricLew	0:80ee8f3b695e	873	* @retval None
EricLew	0:80ee8f3b695e	874	*/
EricLew	0:80ee8f3b695e	875	#define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
EricLew	0:80ee8f3b695e	876
EricLew	0:80ee8f3b695e	877	/**
EricLew	0:80ee8f3b695e	878	* @brief Check whether the specified ADC flag is set or not.
EricLew	0:80ee8f3b695e	879	* @param __HANDLE__: ADC handle.
EricLew	0:80ee8f3b695e	880	* @param __FLAG__: ADC flag to check
EricLew	0:80ee8f3b695e	881	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	882	* @arg ADC_FLAG_RDY, ADC Ready (ADRDY) flag
EricLew	0:80ee8f3b695e	883	* @arg ADC_FLAG_EOSMP, ADC End of Sampling flag
EricLew	0:80ee8f3b695e	884	* @arg ADC_FLAG_EOC, ADC End of Regular Conversion flag
EricLew	0:80ee8f3b695e	885	* @arg ADC_FLAG_EOS, ADC End of Regular sequence of Conversions flag
EricLew	0:80ee8f3b695e	886	* @arg ADC_FLAG_OVR, ADC overrun flag
EricLew	0:80ee8f3b695e	887	* @arg ADC_FLAG_JEOC, ADC End of Injected Conversion flag
EricLew	0:80ee8f3b695e	888	* @arg ADC_FLAG_JEOS, ADC End of Injected sequence of Conversions flag
EricLew	0:80ee8f3b695e	889	* @arg ADC_FLAG_AWD1, ADC Analog watchdog 1 flag (main analog watchdog)
EricLew	0:80ee8f3b695e	890	* @arg ADC_FLAG_AWD2, ADC Analog watchdog 2 flag (additional analog watchdog)
EricLew	0:80ee8f3b695e	891	* @arg ADC_FLAG_AWD3, ADC Analog watchdog 3 flag (additional analog watchdog)
EricLew	0:80ee8f3b695e	892	* @arg ADC_FLAG_JQOVF, ADC Injected Context Queue Overflow flag.
EricLew	0:80ee8f3b695e	893	* @retval The new state of __FLAG__ (TRUE or FALSE).
EricLew	0:80ee8f3b695e	894	*/
EricLew	0:80ee8f3b695e	895	#define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__))
EricLew	0:80ee8f3b695e	896
EricLew	0:80ee8f3b695e	897	/**
EricLew	0:80ee8f3b695e	898	* @brief Clear a specified ADC flag.
EricLew	0:80ee8f3b695e	899	* @param __HANDLE__: ADC handle.
EricLew	0:80ee8f3b695e	900	* @param __FLAG__: ADC flag to clear
EricLew	0:80ee8f3b695e	901	* This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	902	* @arg ADC_FLAG_RDY, ADC Ready (ADRDY) flag
EricLew	0:80ee8f3b695e	903	* @arg ADC_FLAG_EOSMP, ADC End of Sampling flag
EricLew	0:80ee8f3b695e	904	* @arg ADC_FLAG_EOC, ADC End of Regular Conversion flag
EricLew	0:80ee8f3b695e	905	* @arg ADC_FLAG_EOS, ADC End of Regular sequence of Conversions flag
EricLew	0:80ee8f3b695e	906	* @arg ADC_FLAG_OVR, ADC overrun flag
EricLew	0:80ee8f3b695e	907	* @arg ADC_FLAG_JEOC, ADC End of Injected Conversion flag
EricLew	0:80ee8f3b695e	908	* @arg ADC_FLAG_JEOS, ADC End of Injected sequence of Conversions flag
EricLew	0:80ee8f3b695e	909	* @arg ADC_FLAG_AWD1, ADC Analog watchdog 1 flag (main analog watchdog)
EricLew	0:80ee8f3b695e	910	* @arg ADC_FLAG_AWD2, ADC Analog watchdog 2 flag (additional analog watchdog)
EricLew	0:80ee8f3b695e	911	* @arg ADC_FLAG_AWD3, ADC Analog watchdog 3 flag (additional analog watchdog)
EricLew	0:80ee8f3b695e	912	* @arg ADC_FLAG_JQOVF, ADC Injected Context Queue Overflow flag.
EricLew	0:80ee8f3b695e	913	* @note Bit cleared bit by writing 1 (writing 0 has no effect on any bit of register ISR).
EricLew	0:80ee8f3b695e	914	* @retval None
EricLew	0:80ee8f3b695e	915	*/
EricLew	0:80ee8f3b695e	916	#define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR) = (__FLAG__))
EricLew	0:80ee8f3b695e	917
EricLew	0:80ee8f3b695e	918
EricLew	0:80ee8f3b695e	919	/**
EricLew	0:80ee8f3b695e	920	* @}
EricLew	0:80ee8f3b695e	921	*/
EricLew	0:80ee8f3b695e	922
EricLew	0:80ee8f3b695e	923	/* Include ADC HAL Extended module */
EricLew	0:80ee8f3b695e	924	#include "stm32l4xx_hal_adc_ex.h"
EricLew	0:80ee8f3b695e	925
EricLew	0:80ee8f3b695e	926	/* Exported functions --------------------------------------------------------*/
EricLew	0:80ee8f3b695e	927	/** @addtogroup ADC_Exported_Functions ADC Exported Functions
EricLew	0:80ee8f3b695e	928	* @{
EricLew	0:80ee8f3b695e	929	*/
EricLew	0:80ee8f3b695e	930
EricLew	0:80ee8f3b695e	931	/** @addtogroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions
EricLew	0:80ee8f3b695e	932	* @brief Initialization and Configuration functions
EricLew	0:80ee8f3b695e	933	* @{
EricLew	0:80ee8f3b695e	934	*/
EricLew	0:80ee8f3b695e	935	/* Initialization and de-initialization functions **********************************/
EricLew	0:80ee8f3b695e	936	HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	937	HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
EricLew	0:80ee8f3b695e	938	void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	939	void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	940	/**
EricLew	0:80ee8f3b695e	941	* @}
EricLew	0:80ee8f3b695e	942	*/
EricLew	0:80ee8f3b695e	943
EricLew	0:80ee8f3b695e	944	/** @addtogroup ADC_Exported_Functions_Group2 Input and Output operation functions
EricLew	0:80ee8f3b695e	945	* @brief IO operation functions
EricLew	0:80ee8f3b695e	946	* @{
EricLew	0:80ee8f3b695e	947	*/
EricLew	0:80ee8f3b695e	948	/* Blocking mode: Polling */
EricLew	0:80ee8f3b695e	949	HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	950	HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	951	HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
EricLew	0:80ee8f3b695e	952	HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
EricLew	0:80ee8f3b695e	953
EricLew	0:80ee8f3b695e	954	/* Non-blocking mode: Interruption */
EricLew	0:80ee8f3b695e	955	HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	956	HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	957
EricLew	0:80ee8f3b695e	958	/* Non-blocking mode: DMA */
EricLew	0:80ee8f3b695e	959	HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
EricLew	0:80ee8f3b695e	960	HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	961
EricLew	0:80ee8f3b695e	962	/* ADC retrieve conversion value intended to be used with polling or interruption */
EricLew	0:80ee8f3b695e	963	uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	964
EricLew	0:80ee8f3b695e	965	/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */
EricLew	0:80ee8f3b695e	966	void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	967	void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	968	void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	969	void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	970	void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
EricLew	0:80ee8f3b695e	971	/**
EricLew	0:80ee8f3b695e	972	* @}
EricLew	0:80ee8f3b695e	973	*/
EricLew	0:80ee8f3b695e	974
EricLew	0:80ee8f3b695e	975	/** @addtogroup ADC_Exported_Functions_Group3 Peripheral Control functions
EricLew	0:80ee8f3b695e	976	* @brief Peripheral Control functions
EricLew	0:80ee8f3b695e	977	* @{
EricLew	0:80ee8f3b695e	978	*/
EricLew	0:80ee8f3b695e	979	/* Peripheral Control functions ***********************************************/
EricLew	0:80ee8f3b695e	980	HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
EricLew	0:80ee8f3b695e	981	HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
EricLew	0:80ee8f3b695e	982	/**
EricLew	0:80ee8f3b695e	983	* @}
EricLew	0:80ee8f3b695e	984	*/
EricLew	0:80ee8f3b695e	985
EricLew	0:80ee8f3b695e	986	/** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
EricLew	0:80ee8f3b695e	987	* @brief ADC Peripheral State functions
EricLew	0:80ee8f3b695e	988	* @{
EricLew	0:80ee8f3b695e	989	*/
EricLew	0:80ee8f3b695e	990	/* Peripheral State functions *************************************************/
EricLew	0:80ee8f3b695e	991	uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	992	uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
EricLew	0:80ee8f3b695e	993	/**
EricLew	0:80ee8f3b695e	994	* @}
EricLew	0:80ee8f3b695e	995	*/
EricLew	0:80ee8f3b695e	996
EricLew	0:80ee8f3b695e	997	/**
EricLew	0:80ee8f3b695e	998	* @}
EricLew	0:80ee8f3b695e	999	*/
EricLew	0:80ee8f3b695e	1000
EricLew	0:80ee8f3b695e	1001	/* Private functions -----------------------------------------------------------*/
EricLew	0:80ee8f3b695e	1002	/** @addtogroup ADC_Private_Functions ADC Private Functions
EricLew	0:80ee8f3b695e	1003	* @{
EricLew	0:80ee8f3b695e	1004	*/
EricLew	0:80ee8f3b695e	1005
EricLew	0:80ee8f3b695e	1006	HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc, uint32_t ConversionGroup);
EricLew	0:80ee8f3b695e	1007	HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	1008	HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc);
EricLew	0:80ee8f3b695e	1009	void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
EricLew	0:80ee8f3b695e	1010	void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
EricLew	0:80ee8f3b695e	1011	void ADC_DMAError(DMA_HandleTypeDef *hdma);
EricLew	0:80ee8f3b695e	1012
EricLew	0:80ee8f3b695e	1013	/**
EricLew	0:80ee8f3b695e	1014	* @}
EricLew	0:80ee8f3b695e	1015	*/
EricLew	0:80ee8f3b695e	1016
EricLew	0:80ee8f3b695e	1017	/**
EricLew	0:80ee8f3b695e	1018	* @}
EricLew	0:80ee8f3b695e	1019	*/
EricLew	0:80ee8f3b695e	1020
EricLew	0:80ee8f3b695e	1021	/**
EricLew	0:80ee8f3b695e	1022	* @}
EricLew	0:80ee8f3b695e	1023	*/
EricLew	0:80ee8f3b695e	1024
EricLew	0:80ee8f3b695e	1025	#ifdef __cplusplus
EricLew	0:80ee8f3b695e	1026	}
EricLew	0:80ee8f3b695e	1027	#endif
EricLew	0:80ee8f3b695e	1028
EricLew	0:80ee8f3b695e	1029	#endif /__STM32L4xx_ADC_H /
EricLew	0:80ee8f3b695e	1030
EricLew	0:80ee8f3b695e	1031
EricLew	0:80ee8f3b695e	1032	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
EricLew	0:80ee8f3b695e	1033

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Type:	Library
Created:	12 Nov 2015
Imports:	198
Forks:	0
Commits:	3
Dependents:	4
Dependencies:	0
Followers:	14

Inc/stm32l4xx_hal_adc.h@0:80ee8f3b695e, 2015-11-02 (annotated)

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