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targets/TARGET_ublox/TARGET_HI2110/pinmap.c@174:ed647f63e28d, 2017-12-19 (annotated)

Committer:
Dollyparton
Date:
Tue Dec 19 12:50:13 2017 +0000
Revision:
174:ed647f63e28d
Parent:
150:02e0a0aed4ec 
Added RAW socket.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 150:02e0a0aed4ec 1 /* mbed Microcontroller Library
<> 150:02e0a0aed4ec 2 * Copyright (c) 2016 u-blox
<> 150:02e0a0aed4ec 3 *
<> 150:02e0a0aed4ec 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 150:02e0a0aed4ec 5 * you may not use this file except in compliance with the License.
<> 150:02e0a0aed4ec 6 * You may obtain a copy of the License at
<> 150:02e0a0aed4ec 7 *
<> 150:02e0a0aed4ec 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 150:02e0a0aed4ec 9 *
<> 150:02e0a0aed4ec 10 * Unless required by applicable law or agreed to in writing, software
<> 150:02e0a0aed4ec 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 150:02e0a0aed4ec 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 150:02e0a0aed4ec 13 * See the License for the specific language governing permissions and
<> 150:02e0a0aed4ec 14 * limitations under the License.
<> 150:02e0a0aed4ec 15 */
<> 150:02e0a0aed4ec 16
<> 150:02e0a0aed4ec 17 /* As well as claiming and setting pins, the functions here also need
<> 150:02e0a0aed4ec 18 * to take into account the way the pins are powered. On the Boudica
<> 150:02e0a0aed4ec 19 * chip they are arranged in three banks, PIO 0:5, PIO 6:10 and
<> 150:02e0a0aed4ec 20 * PIO 11:19.
<> 150:02e0a0aed4ec 21 *
<> 150:02e0a0aed4ec 22 * The arrangement for which PIO bank is powered is determined by the module
<> 150:02e0a0aed4ec 23 * in which the HI2110 chip is mounted, hence the use of conditional
<> 150:02e0a0aed4ec 24 * compilation below.
<> 150:02e0a0aed4ec 25 */
<> 150:02e0a0aed4ec 26
<> 150:02e0a0aed4ec 27 #include "stdbool.h"
<> 150:02e0a0aed4ec 28 #include "mbed_assert.h"
<> 150:02e0a0aed4ec 29 #include "mbed_error.h"
<> 150:02e0a0aed4ec 30 #include "pinmap.h"
<> 150:02e0a0aed4ec 31
<> 150:02e0a0aed4ec 32 /* ----------------------------------------------------------------
<> 150:02e0a0aed4ec 33 * MACROS
<> 150:02e0a0aed4ec 34 * ----------------------------------------------------------------*/
<> 150:02e0a0aed4ec 35
<> 150:02e0a0aed4ec 36 #define HAL_PIO_MASK_FUNC (0xFF)
<> 150:02e0a0aed4ec 37 #define HAL_PIO_MODULO_4_MASK (0x3)
<> 150:02e0a0aed4ec 38
<> 150:02e0a0aed4ec 39 /* ----------------------------------------------------------------
<> 150:02e0a0aed4ec 40 * GLOBAL VARIABLES
<> 150:02e0a0aed4ec 41 * ----------------------------------------------------------------*/
<> 150:02e0a0aed4ec 42
<> 150:02e0a0aed4ec 43 /* ----------------------------------------------------------------
<> 150:02e0a0aed4ec 44 * FUNCTION PROTOTYPES
<> 150:02e0a0aed4ec 45 * ----------------------------------------------------------------*/
<> 150:02e0a0aed4ec 46
<> 150:02e0a0aed4ec 47 static inline uint32_t clr_mask (PinName pin);
<> 150:02e0a0aed4ec 48 static inline uint32_t set_mask (PinName pin, int function);
<> 150:02e0a0aed4ec 49 static inline volatile uint32_t * func_reg (PinName pin);
<> 150:02e0a0aed4ec 50
<> 150:02e0a0aed4ec 51 /* ----------------------------------------------------------------
<> 150:02e0a0aed4ec 52 * NON-API FUNCTIONS
<> 150:02e0a0aed4ec 53 * ----------------------------------------------------------------*/
<> 150:02e0a0aed4ec 54
<> 150:02e0a0aed4ec 55 // Return the clear mask for a pin
<> 150:02e0a0aed4ec 56 static inline uint32_t clr_mask (PinName pin)
<> 150:02e0a0aed4ec 57 {
<> 150:02e0a0aed4ec 58 return HAL_PIO_MASK_FUNC << ((pin & HAL_PIO_MODULO_4_MASK) << 3);
<> 150:02e0a0aed4ec 59 }
<> 150:02e0a0aed4ec 60
<> 150:02e0a0aed4ec 61 // Return the set mask for a pin and a given function
<> 150:02e0a0aed4ec 62 static inline uint32_t set_mask (PinName pin, int function)
<> 150:02e0a0aed4ec 63 {
<> 150:02e0a0aed4ec 64 return function << ((pin & HAL_PIO_MODULO_4_MASK) << 3);
<> 150:02e0a0aed4ec 65 }
<> 150:02e0a0aed4ec 66
<> 150:02e0a0aed4ec 67 // Return the function register for a pin
<> 150:02e0a0aed4ec 68 static inline volatile uint32_t * func_reg (PinName pin)
<> 150:02e0a0aed4ec 69 {
<> 150:02e0a0aed4ec 70 return &PIO_FUNC0 + (pin >> 2);
<> 150:02e0a0aed4ec 71 }
<> 150:02e0a0aed4ec 72
<> 150:02e0a0aed4ec 73 // Return the owner of a pin
<> 150:02e0a0aed4ec 74 // 0: None
<> 150:02e0a0aed4ec 75 // 1: security core
<> 150:02e0a0aed4ec 76 // 2: protocol core
<> 150:02e0a0aed4ec 77 // 3: apps core
<> 150:02e0a0aed4ec 78 static inline uint8_t get_owner(PinName pin)
<> 150:02e0a0aed4ec 79 {
<> 150:02e0a0aed4ec 80 uint8_t pio_owner_shift = (pin & 0x0F) << 1;
<> 150:02e0a0aed4ec 81 volatile uint32_t * pio_owner_reg = (&PIO_OWNER0 + (pin >> 4));
<> 150:02e0a0aed4ec 82
<> 150:02e0a0aed4ec 83 return 0x03 & (*pio_owner_reg >> pio_owner_shift);
<> 150:02e0a0aed4ec 84 }
<> 150:02e0a0aed4ec 85
<> 150:02e0a0aed4ec 86 /* ----------------------------------------------------------------
<> 150:02e0a0aed4ec 87 * MBED "INTERNAL" API CALLS
<> 150:02e0a0aed4ec 88 * ----------------------------------------------------------------*/
<> 150:02e0a0aed4ec 89
<> 150:02e0a0aed4ec 90 void pin_function(PinName pin, int function)
<> 150:02e0a0aed4ec 91 {
<> 150:02e0a0aed4ec 92 volatile uint32_t *pio_func_reg;
<> 150:02e0a0aed4ec 93
<> 150:02e0a0aed4ec 94 /* Set the function for the given pin */
<> 150:02e0a0aed4ec 95 pio_func_reg = func_reg (pin);
<> 150:02e0a0aed4ec 96 *pio_func_reg = (*pio_func_reg & ~(clr_mask(pin))) | set_mask(pin, function);
<> 150:02e0a0aed4ec 97
<> 150:02e0a0aed4ec 98 /* Power the pin */
<> 150:02e0a0aed4ec 99 #ifdef TARGET_SARA_NBIOT
<> 150:02e0a0aed4ec 100 /* On Sara NBIoT, GPIO pin 19 has to be high to power GPIO pins 0 to 10 */
<> 150:02e0a0aed4ec 101 if ((pin >= p0) && (pin <= p10)) {
<> 150:02e0a0aed4ec 102 /* Grab pin 19 as a GPIO if we don't have it already */
<> 150:02e0a0aed4ec 103 if (get_owner(p19) != 0x03) {
<> 150:02e0a0aed4ec 104 pio_func_reg = func_reg (p19);
<> 150:02e0a0aed4ec 105 *pio_func_reg = (*pio_func_reg & ~(clr_mask(p19))) | set_mask(p19, 1); /* 1 == PIN_FUNCTION_GPIO */
<> 150:02e0a0aed4ec 106
<> 150:02e0a0aed4ec 107 MBED_ASSERT (get_owner(p19) == 0x03);
<> 150:02e0a0aed4ec 108 }
<> 150:02e0a0aed4ec 109
<> 150:02e0a0aed4ec 110 /* Set pin 19 to be an output and to be high */
<> 150:02e0a0aed4ec 111 GPIO_DIR |= (1ul << p19);
<> 150:02e0a0aed4ec 112 GPIO_OUT_BITSET = (1ul << p19);
<> 150:02e0a0aed4ec 113
<> 150:02e0a0aed4ec 114 /* Note: the level on pins 6 to 10 is controlled by the protocol
<> 150:02e0a0aed4ec 115 * processor to be the VCC level required by the SIM. The
<> 150:02e0a0aed4ec 116 * application has no control over this. */
<> 150:02e0a0aed4ec 117 }
<> 150:02e0a0aed4ec 118 /* The power to GPIOs 11 to 19 is fed directly from pin 51 of the module */
<> 150:02e0a0aed4ec 119 #endif
<> 150:02e0a0aed4ec 120 }
<> 150:02e0a0aed4ec 121
<> 150:02e0a0aed4ec 122 void pin_mode(PinName pin, PinMode mode)
<> 150:02e0a0aed4ec 123 {
<> 150:02e0a0aed4ec 124 MBED_ASSERT(pin != (PinName)NC);
<> 150:02e0a0aed4ec 125
<> 150:02e0a0aed4ec 126 switch (mode) {
<> 150:02e0a0aed4ec 127 case PullUp:
<> 150:02e0a0aed4ec 128 {
<> 150:02e0a0aed4ec 129 MBED_ASSERT(false); /* Not currently supported on HI2100 */
<> 150:02e0a0aed4ec 130 }
<> 150:02e0a0aed4ec 131 break;
<> 150:02e0a0aed4ec 132 case PullDown:
<> 150:02e0a0aed4ec 133 {
<> 150:02e0a0aed4ec 134 GPIO_PULLEN_BITSET = 1U << pin;
<> 150:02e0a0aed4ec 135 }
<> 150:02e0a0aed4ec 136 break;
<> 150:02e0a0aed4ec 137 case PullNone:
<> 150:02e0a0aed4ec 138 {
<> 150:02e0a0aed4ec 139 GPIO_PULLEN_BITCLR = 1U << pin;
<> 150:02e0a0aed4ec 140 }
<> 150:02e0a0aed4ec 141 break;
<> 150:02e0a0aed4ec 142 default:
<> 150:02e0a0aed4ec 143 break;
<> 150:02e0a0aed4ec 144 }
<> 150:02e0a0aed4ec 145 }