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targets/TARGET_Maxim/TARGET_MAX32625/mxc/spix.c@174:ed647f63e28d, 2017-12-19 (annotated)

Committer:
Dollyparton
Date:
Tue Dec 19 12:50:13 2017 +0000
Revision:
174:ed647f63e28d
Parent:
150:02e0a0aed4ec 
Added RAW socket.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 150:02e0a0aed4ec 1 /*******************************************************************************
<> 150:02e0a0aed4ec 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 150:02e0a0aed4ec 3 *
<> 150:02e0a0aed4ec 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 150:02e0a0aed4ec 5 * copy of this software and associated documentation files (the "Software"),
<> 150:02e0a0aed4ec 6 * to deal in the Software without restriction, including without limitation
<> 150:02e0a0aed4ec 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 150:02e0a0aed4ec 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 150:02e0a0aed4ec 9 * Software is furnished to do so, subject to the following conditions:
<> 150:02e0a0aed4ec 10 *
<> 150:02e0a0aed4ec 11 * The above copyright notice and this permission notice shall be included
<> 150:02e0a0aed4ec 12 * in all copies or substantial portions of the Software.
<> 150:02e0a0aed4ec 13 *
<> 150:02e0a0aed4ec 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 150:02e0a0aed4ec 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 150:02e0a0aed4ec 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 150:02e0a0aed4ec 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 150:02e0a0aed4ec 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 150:02e0a0aed4ec 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 150:02e0a0aed4ec 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 150:02e0a0aed4ec 21 *
<> 150:02e0a0aed4ec 22 * Except as contained in this notice, the name of Maxim Integrated
<> 150:02e0a0aed4ec 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 150:02e0a0aed4ec 24 * Products, Inc. Branding Policy.
<> 150:02e0a0aed4ec 25 *
<> 150:02e0a0aed4ec 26 * The mere transfer of this software does not imply any licenses
<> 150:02e0a0aed4ec 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 150:02e0a0aed4ec 28 * trademarks, maskwork rights, or any other form of intellectual
<> 150:02e0a0aed4ec 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 150:02e0a0aed4ec 30 * ownership rights.
<> 150:02e0a0aed4ec 31 *
<> 150:02e0a0aed4ec 32 * $Date: 2016-05-31 17:30:09 -0500 (Tue, 31 May 2016) $
<> 150:02e0a0aed4ec 33 * $Revision: 23119 $
<> 150:02e0a0aed4ec 34 *
<> 150:02e0a0aed4ec 35 ******************************************************************************/
<> 150:02e0a0aed4ec 36 /**
<> 150:02e0a0aed4ec 37 * @file spix.c
<> 150:02e0a0aed4ec 38 * @brief SPI execute in place driver.
<> 150:02e0a0aed4ec 39 */
<> 150:02e0a0aed4ec 40
<> 150:02e0a0aed4ec 41 /***** Includes *****/
<> 150:02e0a0aed4ec 42 #include <stddef.h>
<> 150:02e0a0aed4ec 43 #include "mxc_config.h"
<> 150:02e0a0aed4ec 44 #include "mxc_assert.h"
<> 150:02e0a0aed4ec 45 #include "spix.h"
<> 150:02e0a0aed4ec 46 #include "spix_regs.h"
<> 150:02e0a0aed4ec 47
<> 150:02e0a0aed4ec 48 /***** Definitions *****/
<> 150:02e0a0aed4ec 49 #define CMD_CLOCKS 8
<> 150:02e0a0aed4ec 50 #define ADDR_3BYTE_CLOCKS 24
<> 150:02e0a0aed4ec 51 #define ADDR_4BYTE_CLOCKS 32
<> 150:02e0a0aed4ec 52
<> 150:02e0a0aed4ec 53 /***** Globals *****/
<> 150:02e0a0aed4ec 54
<> 150:02e0a0aed4ec 55 /***** Functions *****/
<> 150:02e0a0aed4ec 56
<> 150:02e0a0aed4ec 57 /******************************************************************************/
<> 150:02e0a0aed4ec 58 #if defined ( __GNUC__)
<> 150:02e0a0aed4ec 59 #undef IAR_SPIX_PRAGMA //Make sure this is not defined for GCC
<> 150:02e0a0aed4ec 60 #endif
<> 150:02e0a0aed4ec 61
<> 150:02e0a0aed4ec 62 #if IAR_SPIX_PRAGMA
<> 150:02e0a0aed4ec 63 // IAR memory section declaration for the SPIX functions to be loaded in RAM.
<> 150:02e0a0aed4ec 64 #pragma section=".spix_config"
<> 150:02e0a0aed4ec 65 #endif
<> 150:02e0a0aed4ec 66
<> 150:02e0a0aed4ec 67 #if(MXC_SPIX_REV == 0)
<> 150:02e0a0aed4ec 68
<> 150:02e0a0aed4ec 69 #if defined ( __GNUC__ )
<> 150:02e0a0aed4ec 70 __attribute__ ((section(".spix_config"), noinline))
<> 150:02e0a0aed4ec 71 #endif /* __GNUC */
<> 150:02e0a0aed4ec 72
<> 150:02e0a0aed4ec 73 #if IAR_SPIX_PRAGMA
<> 150:02e0a0aed4ec 74 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
<> 150:02e0a0aed4ec 75 #pragma optimize=no_inline // IAR no inline optimization on this function
<> 150:02e0a0aed4ec 76 #endif /* IAR_PRAGMA */
<> 150:02e0a0aed4ec 77
<> 150:02e0a0aed4ec 78 static void SPIX_UpdateFBIgnore()
<> 150:02e0a0aed4ec 79 {
<> 150:02e0a0aed4ec 80 // Update the feedback ignore clocks
<> 150:02e0a0aed4ec 81 uint8_t clocks = 0;
<> 150:02e0a0aed4ec 82 uint8_t no_cmd_clocks = 0;
<> 150:02e0a0aed4ec 83
<> 150:02e0a0aed4ec 84 // Adjust the clocks for the command
<> 150:02e0a0aed4ec 85 if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH) ==
<> 150:02e0a0aed4ec 86 MXC_S_SPIX_FETCH_CTRL_CMD_WIDTH_QUAD_IO) {
<> 150:02e0a0aed4ec 87
<> 150:02e0a0aed4ec 88 clocks += CMD_CLOCKS/4;
<> 150:02e0a0aed4ec 89 } else if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH) ==
<> 150:02e0a0aed4ec 90 MXC_S_SPIX_FETCH_CTRL_CMD_WIDTH_DUAL_IO) {
<> 150:02e0a0aed4ec 91
<> 150:02e0a0aed4ec 92 clocks += CMD_CLOCKS/2;
<> 150:02e0a0aed4ec 93 } else {
<> 150:02e0a0aed4ec 94
<> 150:02e0a0aed4ec 95 clocks += CMD_CLOCKS;
<> 150:02e0a0aed4ec 96 }
<> 150:02e0a0aed4ec 97
<> 150:02e0a0aed4ec 98 // Adjust the clocks for the address
<> 150:02e0a0aed4ec 99 if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH) ==
<> 150:02e0a0aed4ec 100 MXC_S_SPIX_FETCH_CTRL_ADDR_WIDTH_QUAD_IO) {
<> 150:02e0a0aed4ec 101
<> 150:02e0a0aed4ec 102 if(MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR) {
<> 150:02e0a0aed4ec 103 clocks += ADDR_4BYTE_CLOCKS/4;
<> 150:02e0a0aed4ec 104 no_cmd_clocks += ADDR_4BYTE_CLOCKS/4;
<> 150:02e0a0aed4ec 105 } else {
<> 150:02e0a0aed4ec 106 clocks += ADDR_3BYTE_CLOCKS/4;
<> 150:02e0a0aed4ec 107 no_cmd_clocks += ADDR_3BYTE_CLOCKS/4;
<> 150:02e0a0aed4ec 108 }
<> 150:02e0a0aed4ec 109
<> 150:02e0a0aed4ec 110 } else if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH) ==
<> 150:02e0a0aed4ec 111 MXC_S_SPIX_FETCH_CTRL_ADDR_WIDTH_DUAL_IO) {
<> 150:02e0a0aed4ec 112
<> 150:02e0a0aed4ec 113 if(MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR) {
<> 150:02e0a0aed4ec 114 clocks += ADDR_4BYTE_CLOCKS/2;
<> 150:02e0a0aed4ec 115 no_cmd_clocks += ADDR_4BYTE_CLOCKS/2;
<> 150:02e0a0aed4ec 116 } else {
<> 150:02e0a0aed4ec 117 clocks += ADDR_3BYTE_CLOCKS/2;
<> 150:02e0a0aed4ec 118 no_cmd_clocks += ADDR_3BYTE_CLOCKS/2;
<> 150:02e0a0aed4ec 119 }
<> 150:02e0a0aed4ec 120 } else {
<> 150:02e0a0aed4ec 121
<> 150:02e0a0aed4ec 122 if(MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR) {
<> 150:02e0a0aed4ec 123 clocks += ADDR_4BYTE_CLOCKS;
<> 150:02e0a0aed4ec 124 no_cmd_clocks += ADDR_4BYTE_CLOCKS;
<> 150:02e0a0aed4ec 125 } else {
<> 150:02e0a0aed4ec 126 clocks += ADDR_3BYTE_CLOCKS;
<> 150:02e0a0aed4ec 127 no_cmd_clocks += ADDR_3BYTE_CLOCKS;
<> 150:02e0a0aed4ec 128 }
<> 150:02e0a0aed4ec 129 }
<> 150:02e0a0aed4ec 130
<> 150:02e0a0aed4ec 131 // Adjust for the mode clocks
<> 150:02e0a0aed4ec 132 clocks += ((MXC_SPIX->mode_ctrl & MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS) >>
<> 150:02e0a0aed4ec 133 MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS_POS);
<> 150:02e0a0aed4ec 134
<> 150:02e0a0aed4ec 135 // Set the FB Ignore clocks
<> 150:02e0a0aed4ec 136 MXC_SPIX->sck_fb_ctrl = ((MXC_SPIX->sck_fb_ctrl & ~MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS) |
<> 150:02e0a0aed4ec 137 (clocks << MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS_POS));
<> 150:02e0a0aed4ec 138
<> 150:02e0a0aed4ec 139 MXC_SPIX->sck_fb_ctrl = ((MXC_SPIX->sck_fb_ctrl & ~MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS_NO_CMD) |
<> 150:02e0a0aed4ec 140 (no_cmd_clocks << MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS_NO_CMD_POS));
<> 150:02e0a0aed4ec 141 }
<> 150:02e0a0aed4ec 142 #endif /* MXC_SPIX_REV==0 */
<> 150:02e0a0aed4ec 143
<> 150:02e0a0aed4ec 144 /******************************************************************************/
<> 150:02e0a0aed4ec 145 #if defined ( __GNUC__ )
<> 150:02e0a0aed4ec 146 __attribute__ ((section(".spix_config"), noinline))
<> 150:02e0a0aed4ec 147 #endif /* __GNUC */
<> 150:02e0a0aed4ec 148
<> 150:02e0a0aed4ec 149 #if IAR_SPIX_PRAGMA
<> 150:02e0a0aed4ec 150 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
<> 150:02e0a0aed4ec 151 #pragma optimize=no_inline // IAR no inline optimization on this function
<> 150:02e0a0aed4ec 152 #endif /* IAR_SPIX_PRAGMA */
<> 150:02e0a0aed4ec 153 int SPIX_ConfigClock(const sys_cfg_spix_t *sys_cfg, uint32_t baud, uint8_t sample)
<> 150:02e0a0aed4ec 154 {
<> 150:02e0a0aed4ec 155 int err;
<> 150:02e0a0aed4ec 156 uint32_t spix_clk, clocks;
<> 150:02e0a0aed4ec 157
<> 150:02e0a0aed4ec 158 // Check the input parameters
<> 150:02e0a0aed4ec 159 if(sys_cfg == NULL) {
<> 150:02e0a0aed4ec 160 return E_NULL_PTR;
<> 150:02e0a0aed4ec 161 }
<> 150:02e0a0aed4ec 162
<> 150:02e0a0aed4ec 163 // Set system level configurations
<> 150:02e0a0aed4ec 164 if ((err = SYS_SPIX_Init(sys_cfg, baud)) != E_NO_ERROR) {
<> 150:02e0a0aed4ec 165 return err;
<> 150:02e0a0aed4ec 166 }
<> 150:02e0a0aed4ec 167
<> 150:02e0a0aed4ec 168 // Configure the mode and baud
<> 150:02e0a0aed4ec 169 spix_clk = SYS_SPIX_GetFreq();
<> 150:02e0a0aed4ec 170 if(spix_clk <= 0) {
<> 150:02e0a0aed4ec 171 return E_UNINITIALIZED;
<> 150:02e0a0aed4ec 172 }
<> 150:02e0a0aed4ec 173
<> 150:02e0a0aed4ec 174 // Make sure that we can generate this frequency
<> 150:02e0a0aed4ec 175 clocks = (spix_clk / (2*baud));
<> 150:02e0a0aed4ec 176 if((clocks <= 0) || (clocks >= 0x10)) {
<> 150:02e0a0aed4ec 177 return E_BAD_PARAM;
<> 150:02e0a0aed4ec 178 }
<> 150:02e0a0aed4ec 179
<> 150:02e0a0aed4ec 180 // Set the baud
<> 150:02e0a0aed4ec 181 MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg &
<> 150:02e0a0aed4ec 182 ~(MXC_F_SPIX_MASTER_CFG_SCK_HI_CLK | MXC_F_SPIX_MASTER_CFG_SCK_LO_CLK)) |
<> 150:02e0a0aed4ec 183 (clocks << MXC_F_SPIX_MASTER_CFG_SCK_HI_CLK_POS) |
<> 150:02e0a0aed4ec 184 (clocks << MXC_F_SPIX_MASTER_CFG_SCK_LO_CLK_POS));
<> 150:02e0a0aed4ec 185
<> 150:02e0a0aed4ec 186 if(sample != 0) {
<> 150:02e0a0aed4ec 187 // Use sample mode
<> 150:02e0a0aed4ec 188 MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg & ~MXC_F_SPIX_MASTER_CFG_SDIO_SAMPLE_POINT) |
<> 150:02e0a0aed4ec 189 (sample << MXC_F_SPIX_MASTER_CFG_SDIO_SAMPLE_POINT_POS));
<> 150:02e0a0aed4ec 190
<> 150:02e0a0aed4ec 191 MXC_SPIX->sck_fb_ctrl &= ~(MXC_F_SPIX_SCK_FB_CTRL_ENABLE_SCK_FB_MODE |
<> 150:02e0a0aed4ec 192 MXC_F_SPIX_SCK_FB_CTRL_INVERT_SCK_FB_CLK);
<> 150:02e0a0aed4ec 193 } else {
<> 150:02e0a0aed4ec 194 // Use Feedback mode
<> 150:02e0a0aed4ec 195 MXC_SPIX->master_cfg &= ~(MXC_F_SPIX_MASTER_CFG_SDIO_SAMPLE_POINT);
<> 150:02e0a0aed4ec 196
<> 150:02e0a0aed4ec 197 MXC_SPIX->sck_fb_ctrl |= (MXC_F_SPIX_SCK_FB_CTRL_ENABLE_SCK_FB_MODE |
<> 150:02e0a0aed4ec 198 MXC_F_SPIX_SCK_FB_CTRL_INVERT_SCK_FB_CLK);
<> 150:02e0a0aed4ec 199
<> 150:02e0a0aed4ec 200
<> 150:02e0a0aed4ec 201 #if(MXC_SPIX_REV == 0)
<> 150:02e0a0aed4ec 202 SPIX_UpdateFBIgnore();
<> 150:02e0a0aed4ec 203 #endif
<> 150:02e0a0aed4ec 204 }
<> 150:02e0a0aed4ec 205
<> 150:02e0a0aed4ec 206 return E_NO_ERROR;
<> 150:02e0a0aed4ec 207 }
<> 150:02e0a0aed4ec 208
<> 150:02e0a0aed4ec 209 /******************************************************************************/
<> 150:02e0a0aed4ec 210 #if defined ( __GNUC__ )
<> 150:02e0a0aed4ec 211 __attribute__ ((section(".spix_config"), noinline))
<> 150:02e0a0aed4ec 212 #endif /* __GNUC */
<> 150:02e0a0aed4ec 213
<> 150:02e0a0aed4ec 214 #if IAR_SPIX_PRAGMA
<> 150:02e0a0aed4ec 215 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
<> 150:02e0a0aed4ec 216 #pragma optimize=no_inline // IAR no inline optimization on this function
<> 150:02e0a0aed4ec 217 #endif /* IAR_SPIX_PRAGMA */
<> 150:02e0a0aed4ec 218
<> 150:02e0a0aed4ec 219 void SPIX_ConfigSlave(uint8_t ssel, uint8_t pol, uint8_t act_delay, uint8_t inact_delay)
<> 150:02e0a0aed4ec 220 {
<> 150:02e0a0aed4ec 221
<> 150:02e0a0aed4ec 222 // Set the slave select
<> 150:02e0a0aed4ec 223 MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg & ~MXC_F_SPIX_MASTER_CFG_SLAVE_SEL) |
<> 150:02e0a0aed4ec 224 (ssel << MXC_F_SPIX_MASTER_CFG_SLAVE_SEL_POS));
<> 150:02e0a0aed4ec 225
<> 150:02e0a0aed4ec 226 if(pol != 0) {
<> 150:02e0a0aed4ec 227 // Active high
<> 150:02e0a0aed4ec 228 MXC_SPIX->master_cfg &= ~(MXC_F_SPIX_MASTER_CFG_SS_ACT_LO);
<> 150:02e0a0aed4ec 229 } else {
<> 150:02e0a0aed4ec 230 // Active low
<> 150:02e0a0aed4ec 231 MXC_SPIX->master_cfg |= MXC_F_SPIX_MASTER_CFG_SS_ACT_LO;
<> 150:02e0a0aed4ec 232 }
<> 150:02e0a0aed4ec 233
<> 150:02e0a0aed4ec 234 // Set the delays
<> 150:02e0a0aed4ec 235 MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg & ~(MXC_F_SPIX_MASTER_CFG_ACT_DELAY |
<> 150:02e0a0aed4ec 236 MXC_F_SPIX_MASTER_CFG_INACT_DELAY)) |
<> 150:02e0a0aed4ec 237 (act_delay << MXC_F_SPIX_MASTER_CFG_ACT_DELAY_POS) |
<> 150:02e0a0aed4ec 238 (inact_delay << MXC_F_SPIX_MASTER_CFG_INACT_DELAY_POS));
<> 150:02e0a0aed4ec 239 }
<> 150:02e0a0aed4ec 240
<> 150:02e0a0aed4ec 241 /******************************************************************************/
<> 150:02e0a0aed4ec 242 #if defined ( __GNUC__ )
<> 150:02e0a0aed4ec 243 __attribute__ ((section(".spix_config"), noinline))
<> 150:02e0a0aed4ec 244 #endif /* __GNUC */
<> 150:02e0a0aed4ec 245
<> 150:02e0a0aed4ec 246 #if IAR_SPIX_PRAGMA
<> 150:02e0a0aed4ec 247 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
<> 150:02e0a0aed4ec 248 #pragma optimize=no_inline // IAR no inline optimization on this function
<> 150:02e0a0aed4ec 249 #endif /* IAR_SPIX_PRAGMA */
<> 150:02e0a0aed4ec 250
<> 150:02e0a0aed4ec 251 void SPIX_ConfigFetch(const spix_fetch_t *fetch)
<> 150:02e0a0aed4ec 252 {
<> 150:02e0a0aed4ec 253 // Configure how the SPIX fetches data
<> 150:02e0a0aed4ec 254 MXC_SPIX->fetch_ctrl = (((fetch->cmd << MXC_F_SPIX_FETCH_CTRL_CMD_VALUE_POS) & MXC_F_SPIX_FETCH_CTRL_CMD_VALUE) |
<> 150:02e0a0aed4ec 255 ((fetch->cmd_width << MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH_POS) & MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH) |
<> 150:02e0a0aed4ec 256 ((fetch->addr_width << MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH_POS) & MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH) |
<> 150:02e0a0aed4ec 257 ((fetch->data_width << MXC_F_SPIX_FETCH_CTRL_DATA_WIDTH_POS) & MXC_F_SPIX_FETCH_CTRL_DATA_WIDTH) |
<> 150:02e0a0aed4ec 258 ((fetch->addr_size << MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR_POS) & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR));
<> 150:02e0a0aed4ec 259
<> 150:02e0a0aed4ec 260 // Set the command mode and clocks
<> 150:02e0a0aed4ec 261 MXC_SPIX->mode_ctrl = (((fetch->mode_clocks << MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS_POS) & MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS) |
<> 150:02e0a0aed4ec 262 (!!fetch->no_cmd_mode << MXC_F_SPIX_MODE_CTRL_NO_CMD_MODE_POS));
<> 150:02e0a0aed4ec 263
<> 150:02e0a0aed4ec 264 MXC_SPIX->mode_data = (((fetch->mode_data << MXC_F_SPIX_MODE_DATA_MODE_DATA_BITS_POS) & MXC_F_SPIX_MODE_DATA_MODE_DATA_BITS) |
<> 150:02e0a0aed4ec 265 MXC_F_SPIX_MODE_DATA_MODE_DATA_OE);
<> 150:02e0a0aed4ec 266
<> 150:02e0a0aed4ec 267 #if(MXC_SPIX_REV == 0)
<> 150:02e0a0aed4ec 268 SPIX_UpdateFBIgnore();
<> 150:02e0a0aed4ec 269 #endif
<> 150:02e0a0aed4ec 270 }
<> 150:02e0a0aed4ec 271
<> 150:02e0a0aed4ec 272 /******************************************************************************/
<> 150:02e0a0aed4ec 273 #if defined ( __GNUC__ )
<> 150:02e0a0aed4ec 274 __attribute__ ((section(".spix_config"), noinline))
<> 150:02e0a0aed4ec 275 #endif /* __GNUC */
<> 150:02e0a0aed4ec 276
<> 150:02e0a0aed4ec 277 #if IAR_SPIX_PRAGMA
<> 150:02e0a0aed4ec 278 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
<> 150:02e0a0aed4ec 279 #pragma optimize=no_inline // IAR no inline optimization on this function
<> 150:02e0a0aed4ec 280 #endif /* IAR_SPIX_PRAGMA */
<> 150:02e0a0aed4ec 281
<> 150:02e0a0aed4ec 282 int SPIX_Shutdown(mxc_spix_regs_t *spix)
<> 150:02e0a0aed4ec 283 {
<> 150:02e0a0aed4ec 284 int err;
<> 150:02e0a0aed4ec 285
<> 150:02e0a0aed4ec 286 // Clear system level configurations
<> 150:02e0a0aed4ec 287 if ((err = SYS_SPIX_Shutdown()) != E_NO_ERROR) {
<> 150:02e0a0aed4ec 288 return err;
<> 150:02e0a0aed4ec 289 }
<> 150:02e0a0aed4ec 290
<> 150:02e0a0aed4ec 291 return E_NO_ERROR;
<> 150:02e0a0aed4ec 292 }