b luo / mbed-dev

mbed library sources. With a patch for the can_api

Fork of mbed-dev by mbed official

targets/TARGET_STM/TARGET_STM32F4/serial_api.c@151:91825d030f9b, 2016-11-14 (annotated)

Committer:
DangerousElectrician
Date:
Mon Nov 14 04:39:23 2016 +0000
Revision:
151:91825d030f9b
Parent:
149:156823d33999 
stuff changed?

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 *******************************************************************************
<> 149:156823d33999 3 * Copyright (c) 2015, STMicroelectronics
<> 149:156823d33999 4 * All rights reserved.
<> 149:156823d33999 5 *
<> 149:156823d33999 6 * Redistribution and use in source and binary forms, with or without
<> 149:156823d33999 7 * modification, are permitted provided that the following conditions are met:
<> 149:156823d33999 8 *
<> 149:156823d33999 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 10 * this list of conditions and the following disclaimer.
<> 149:156823d33999 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 12 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 13 * and/or other materials provided with the distribution.
<> 149:156823d33999 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 15 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 16 * without specific prior written permission.
<> 149:156823d33999 17 *
<> 149:156823d33999 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 28 *******************************************************************************
<> 149:156823d33999 29 */
<> 149:156823d33999 30
<> 149:156823d33999 31 #include "mbed_assert.h"
<> 149:156823d33999 32 #include "serial_api.h"
<> 149:156823d33999 33
<> 149:156823d33999 34 #if DEVICE_SERIAL
<> 149:156823d33999 35
<> 149:156823d33999 36 #include "cmsis.h"
<> 149:156823d33999 37 #include "pinmap.h"
<> 149:156823d33999 38 #include <string.h>
<> 149:156823d33999 39 #include "PeripheralPins.h"
<> 149:156823d33999 40 #include "mbed_error.h"
<> 149:156823d33999 41
<> 149:156823d33999 42 #define UART_NUM (8)
<> 149:156823d33999 43 static uint32_t serial_irq_ids[UART_NUM] = {0};
<> 149:156823d33999 44 static UART_HandleTypeDef uart_handlers[UART_NUM];
<> 149:156823d33999 45
<> 149:156823d33999 46 static uart_irq_handler irq_handler;
<> 149:156823d33999 47
<> 149:156823d33999 48 int stdio_uart_inited = 0;
<> 149:156823d33999 49 serial_t stdio_uart;
<> 149:156823d33999 50
<> 149:156823d33999 51 #if DEVICE_SERIAL_ASYNCH
<> 149:156823d33999 52 #define SERIAL_S(obj) (&((obj)->serial))
<> 149:156823d33999 53 #else
<> 149:156823d33999 54 #define SERIAL_S(obj) (obj)
<> 149:156823d33999 55 #endif
<> 149:156823d33999 56
<> 149:156823d33999 57
<> 149:156823d33999 58 static void init_uart(serial_t *obj)
<> 149:156823d33999 59 {
<> 149:156823d33999 60 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 61 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 62 huart->Instance = (USART_TypeDef *)(obj_s->uart);
<> 149:156823d33999 63
<> 149:156823d33999 64 huart->Init.BaudRate = obj_s->baudrate;
<> 149:156823d33999 65 huart->Init.WordLength = obj_s->databits;
<> 149:156823d33999 66 huart->Init.StopBits = obj_s->stopbits;
<> 149:156823d33999 67 huart->Init.Parity = obj_s->parity;
<> 149:156823d33999 68 #if DEVICE_SERIAL_FC
<> 149:156823d33999 69 huart->Init.HwFlowCtl = obj_s->hw_flow_ctl;
<> 149:156823d33999 70 #else
<> 149:156823d33999 71 huart->Init.HwFlowCtl = UART_HWCONTROL_NONE;
<> 149:156823d33999 72 #endif
<> 149:156823d33999 73 huart->Init.OverSampling = UART_OVERSAMPLING_16;
<> 149:156823d33999 74 huart->TxXferCount = 0;
<> 149:156823d33999 75 huart->TxXferSize = 0;
<> 149:156823d33999 76 huart->RxXferCount = 0;
<> 149:156823d33999 77 huart->RxXferSize = 0;
<> 149:156823d33999 78
<> 149:156823d33999 79 if (obj_s->pin_rx == NC) {
<> 149:156823d33999 80 huart->Init.Mode = UART_MODE_TX;
<> 149:156823d33999 81 } else if (obj_s->pin_tx == NC) {
<> 149:156823d33999 82 huart->Init.Mode = UART_MODE_RX;
<> 149:156823d33999 83 } else {
<> 149:156823d33999 84 huart->Init.Mode = UART_MODE_TX_RX;
<> 149:156823d33999 85 }
<> 149:156823d33999 86
<> 149:156823d33999 87 if (HAL_UART_Init(huart) != HAL_OK) {
<> 149:156823d33999 88 error("Cannot initialize UART\n");
<> 149:156823d33999 89 }
<> 149:156823d33999 90 }
<> 149:156823d33999 91
<> 149:156823d33999 92 void serial_init(serial_t *obj, PinName tx, PinName rx)
<> 149:156823d33999 93 {
<> 149:156823d33999 94 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 95
<> 149:156823d33999 96 // Determine the UART to use (UART_1, UART_2, ...)
<> 149:156823d33999 97 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
<> 149:156823d33999 98 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
<> 149:156823d33999 99
<> 149:156823d33999 100 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
<> 149:156823d33999 101 obj_s->uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
<> 149:156823d33999 102 MBED_ASSERT(obj_s->uart != (UARTName)NC);
<> 149:156823d33999 103
<> 149:156823d33999 104 // Enable USART clock
<> 149:156823d33999 105 switch (obj_s->uart) {
<> 149:156823d33999 106 case UART_1:
<> 149:156823d33999 107 __HAL_RCC_USART1_FORCE_RESET();
<> 149:156823d33999 108 __HAL_RCC_USART1_RELEASE_RESET();
<> 149:156823d33999 109 __HAL_RCC_USART1_CLK_ENABLE();
<> 149:156823d33999 110 obj_s->index = 0;
<> 149:156823d33999 111 break;
<> 149:156823d33999 112
<> 149:156823d33999 113 case UART_2:
<> 149:156823d33999 114 __HAL_RCC_USART2_FORCE_RESET();
<> 149:156823d33999 115 __HAL_RCC_USART2_RELEASE_RESET();
<> 149:156823d33999 116 __HAL_RCC_USART2_CLK_ENABLE();
<> 149:156823d33999 117 obj_s->index = 1;
<> 149:156823d33999 118 break;
<> 149:156823d33999 119 #if defined(USART3_BASE)
<> 149:156823d33999 120 case UART_3:
<> 149:156823d33999 121 __HAL_RCC_USART3_FORCE_RESET();
<> 149:156823d33999 122 __HAL_RCC_USART3_RELEASE_RESET();
<> 149:156823d33999 123 __HAL_RCC_USART3_CLK_ENABLE();
<> 149:156823d33999 124 obj_s->index = 2;
<> 149:156823d33999 125 break;
<> 149:156823d33999 126 #endif
<> 149:156823d33999 127 #if defined(UART4_BASE)
<> 149:156823d33999 128 case UART_4:
<> 149:156823d33999 129 __HAL_RCC_UART4_FORCE_RESET();
<> 149:156823d33999 130 __HAL_RCC_UART4_RELEASE_RESET();
<> 149:156823d33999 131 __HAL_RCC_UART4_CLK_ENABLE();
<> 149:156823d33999 132 obj_s->index = 3;
<> 149:156823d33999 133 break;
<> 149:156823d33999 134 #endif
<> 149:156823d33999 135 #if defined(UART5_BASE)
<> 149:156823d33999 136 case UART_5:
<> 149:156823d33999 137 __HAL_RCC_UART5_FORCE_RESET();
<> 149:156823d33999 138 __HAL_RCC_UART5_RELEASE_RESET();
<> 149:156823d33999 139 __HAL_RCC_UART5_CLK_ENABLE();
<> 149:156823d33999 140 obj_s->index = 4;
<> 149:156823d33999 141 break;
<> 149:156823d33999 142 #endif
<> 149:156823d33999 143 #if defined(USART6_BASE)
<> 149:156823d33999 144 case UART_6:
<> 149:156823d33999 145 __HAL_RCC_USART6_FORCE_RESET();
<> 149:156823d33999 146 __HAL_RCC_USART6_RELEASE_RESET();
<> 149:156823d33999 147 __HAL_RCC_USART6_CLK_ENABLE();
<> 149:156823d33999 148 obj_s->index = 5;
<> 149:156823d33999 149 break;
<> 149:156823d33999 150 #endif
<> 149:156823d33999 151 #if defined(UART7_BASE)
<> 149:156823d33999 152 case UART_7:
<> 149:156823d33999 153 __HAL_RCC_UART7_FORCE_RESET();
<> 149:156823d33999 154 __HAL_RCC_UART7_RELEASE_RESET();
<> 149:156823d33999 155 __HAL_RCC_UART7_CLK_ENABLE();
<> 149:156823d33999 156 obj_s->index = 6;
<> 149:156823d33999 157 break;
<> 149:156823d33999 158 #endif
<> 149:156823d33999 159 #if defined(UART8_BASE)
<> 149:156823d33999 160 case UART_8:
<> 149:156823d33999 161 __HAL_RCC_UART8_FORCE_RESET();
<> 149:156823d33999 162 __HAL_RCC_UART8_RELEASE_RESET();
<> 149:156823d33999 163 __HAL_RCC_UART8_CLK_ENABLE();
<> 149:156823d33999 164 obj_s->index = 7;
<> 149:156823d33999 165 break;
<> 149:156823d33999 166 #endif
<> 149:156823d33999 167 }
<> 149:156823d33999 168
<> 149:156823d33999 169 // Configure the UART pins
<> 149:156823d33999 170 pinmap_pinout(tx, PinMap_UART_TX);
<> 149:156823d33999 171 pinmap_pinout(rx, PinMap_UART_RX);
<> 149:156823d33999 172
<> 149:156823d33999 173 if (tx != NC) {
<> 149:156823d33999 174 pin_mode(tx, PullUp);
<> 149:156823d33999 175 }
<> 149:156823d33999 176 if (rx != NC) {
<> 149:156823d33999 177 pin_mode(rx, PullUp);
<> 149:156823d33999 178 }
<> 149:156823d33999 179
<> 149:156823d33999 180 // Configure UART
<> 149:156823d33999 181 obj_s->baudrate = 9600;
<> 149:156823d33999 182 obj_s->databits = UART_WORDLENGTH_8B;
<> 149:156823d33999 183 obj_s->stopbits = UART_STOPBITS_1;
<> 149:156823d33999 184 obj_s->parity = UART_PARITY_NONE;
<> 149:156823d33999 185
<> 149:156823d33999 186 #if DEVICE_SERIAL_FC
<> 149:156823d33999 187 obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
<> 149:156823d33999 188 #endif
<> 149:156823d33999 189
<> 149:156823d33999 190 obj_s->pin_tx = tx;
<> 149:156823d33999 191 obj_s->pin_rx = rx;
<> 149:156823d33999 192
<> 149:156823d33999 193 init_uart(obj);
<> 149:156823d33999 194
<> 149:156823d33999 195 // For stdio management
<> 149:156823d33999 196 if (obj_s->uart == STDIO_UART) {
<> 149:156823d33999 197 stdio_uart_inited = 1;
<> 149:156823d33999 198 memcpy(&stdio_uart, obj, sizeof(serial_t));
<> 149:156823d33999 199 }
<> 149:156823d33999 200 }
<> 149:156823d33999 201
<> 149:156823d33999 202 void serial_free(serial_t *obj)
<> 149:156823d33999 203 {
<> 149:156823d33999 204 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 205
<> 149:156823d33999 206 // Reset UART and disable clock
<> 149:156823d33999 207 switch (obj_s->index) {
<> 149:156823d33999 208 case 0:
<> 149:156823d33999 209 __USART1_FORCE_RESET();
<> 149:156823d33999 210 __USART1_RELEASE_RESET();
<> 149:156823d33999 211 __USART1_CLK_DISABLE();
<> 149:156823d33999 212 break;
<> 149:156823d33999 213 case 1:
<> 149:156823d33999 214 __USART2_FORCE_RESET();
<> 149:156823d33999 215 __USART2_RELEASE_RESET();
<> 149:156823d33999 216 __USART2_CLK_DISABLE();
<> 149:156823d33999 217 break;
<> 149:156823d33999 218 #if defined(USART3_BASE)
<> 149:156823d33999 219 case 2:
<> 149:156823d33999 220 __USART3_FORCE_RESET();
<> 149:156823d33999 221 __USART3_RELEASE_RESET();
<> 149:156823d33999 222 __USART3_CLK_DISABLE();
<> 149:156823d33999 223 break;
<> 149:156823d33999 224 #endif
<> 149:156823d33999 225 #if defined(UART4_BASE)
<> 149:156823d33999 226 case 3:
<> 149:156823d33999 227 __UART4_FORCE_RESET();
<> 149:156823d33999 228 __UART4_RELEASE_RESET();
<> 149:156823d33999 229 __UART4_CLK_DISABLE();
<> 149:156823d33999 230 break;
<> 149:156823d33999 231 #endif
<> 149:156823d33999 232 #if defined(UART5_BASE)
<> 149:156823d33999 233 case 4:
<> 149:156823d33999 234 __UART5_FORCE_RESET();
<> 149:156823d33999 235 __UART5_RELEASE_RESET();
<> 149:156823d33999 236 __UART5_CLK_DISABLE();
<> 149:156823d33999 237 break;
<> 149:156823d33999 238 #endif
<> 149:156823d33999 239 #if defined(USART6_BASE)
<> 149:156823d33999 240 case 5:
<> 149:156823d33999 241 __USART6_FORCE_RESET();
<> 149:156823d33999 242 __USART6_RELEASE_RESET();
<> 149:156823d33999 243 __USART6_CLK_DISABLE();
<> 149:156823d33999 244 break;
<> 149:156823d33999 245 #endif
<> 149:156823d33999 246 #if defined(UART7_BASE)
<> 149:156823d33999 247 case 6:
<> 149:156823d33999 248 __UART7_FORCE_RESET();
<> 149:156823d33999 249 __UART7_RELEASE_RESET();
<> 149:156823d33999 250 __UART7_CLK_DISABLE();
<> 149:156823d33999 251 break;
<> 149:156823d33999 252 #endif
<> 149:156823d33999 253 #if defined(UART8_BASE)
<> 149:156823d33999 254 case 7:
<> 149:156823d33999 255 __UART8_FORCE_RESET();
<> 149:156823d33999 256 __UART8_RELEASE_RESET();
<> 149:156823d33999 257 __UART8_CLK_DISABLE();
<> 149:156823d33999 258 break;
<> 149:156823d33999 259 #endif
<> 149:156823d33999 260 }
<> 149:156823d33999 261
<> 149:156823d33999 262 // Configure GPIOs
<> 149:156823d33999 263 pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
<> 149:156823d33999 264 pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
<> 149:156823d33999 265
<> 149:156823d33999 266 serial_irq_ids[obj_s->index] = 0;
<> 149:156823d33999 267 }
<> 149:156823d33999 268
<> 149:156823d33999 269 void serial_baud(serial_t *obj, int baudrate)
<> 149:156823d33999 270 {
<> 149:156823d33999 271 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 272
<> 149:156823d33999 273 obj_s->baudrate = baudrate;
<> 149:156823d33999 274 init_uart(obj);
<> 149:156823d33999 275 }
<> 149:156823d33999 276
<> 149:156823d33999 277 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
<> 149:156823d33999 278 {
<> 149:156823d33999 279 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 280
<> 149:156823d33999 281 if (data_bits == 9) {
<> 149:156823d33999 282 obj_s->databits = UART_WORDLENGTH_9B;
<> 149:156823d33999 283 } else {
<> 149:156823d33999 284 obj_s->databits = UART_WORDLENGTH_8B;
<> 149:156823d33999 285 }
<> 149:156823d33999 286
<> 149:156823d33999 287 switch (parity) {
<> 149:156823d33999 288 case ParityOdd:
<> 149:156823d33999 289 obj_s->parity = UART_PARITY_ODD;
<> 149:156823d33999 290 break;
<> 149:156823d33999 291 case ParityEven:
<> 149:156823d33999 292 obj_s->parity = UART_PARITY_EVEN;
<> 149:156823d33999 293 break;
<> 149:156823d33999 294 default: // ParityNone
<> 149:156823d33999 295 case ParityForced0: // unsupported!
<> 149:156823d33999 296 case ParityForced1: // unsupported!
<> 149:156823d33999 297 obj_s->parity = UART_PARITY_NONE;
<> 149:156823d33999 298 break;
<> 149:156823d33999 299 }
<> 149:156823d33999 300
<> 149:156823d33999 301 if (stop_bits == 2) {
<> 149:156823d33999 302 obj_s->stopbits = UART_STOPBITS_2;
<> 149:156823d33999 303 } else {
<> 149:156823d33999 304 obj_s->stopbits = UART_STOPBITS_1;
<> 149:156823d33999 305 }
<> 149:156823d33999 306
<> 149:156823d33999 307 init_uart(obj);
<> 149:156823d33999 308 }
<> 149:156823d33999 309
<> 149:156823d33999 310 /******************************************************************************
<> 149:156823d33999 311 * INTERRUPTS HANDLING
<> 149:156823d33999 312 ******************************************************************************/
<> 149:156823d33999 313
<> 149:156823d33999 314 static void uart_irq(int id)
<> 149:156823d33999 315 {
<> 149:156823d33999 316 UART_HandleTypeDef * huart = &uart_handlers[id];
<> 149:156823d33999 317
<> 149:156823d33999 318 if (serial_irq_ids[id] != 0) {
<> 149:156823d33999 319 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
<> 149:156823d33999 320 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) {
<> 149:156823d33999 321 irq_handler(serial_irq_ids[id], TxIrq);
<> 149:156823d33999 322 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
<> 149:156823d33999 323 }
<> 149:156823d33999 324 }
<> 149:156823d33999 325 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) {
<> 149:156823d33999 326 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE) != RESET) {
<> 149:156823d33999 327 irq_handler(serial_irq_ids[id], RxIrq);
<> 149:156823d33999 328 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_RXNE);
<> 149:156823d33999 329 }
<> 149:156823d33999 330 }
<> 149:156823d33999 331 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
<> 149:156823d33999 332 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
<> 149:156823d33999 333 volatile uint32_t tmpval = huart->Instance->DR; // Clear ORE flag
<> 149:156823d33999 334 }
<> 149:156823d33999 335 }
<> 149:156823d33999 336 }
<> 149:156823d33999 337 }
<> 149:156823d33999 338
<> 149:156823d33999 339 static void uart1_irq(void)
<> 149:156823d33999 340 {
<> 149:156823d33999 341 uart_irq(0);
<> 149:156823d33999 342 }
<> 149:156823d33999 343
<> 149:156823d33999 344 static void uart2_irq(void)
<> 149:156823d33999 345 {
<> 149:156823d33999 346 uart_irq(1);
<> 149:156823d33999 347 }
<> 149:156823d33999 348
<> 149:156823d33999 349 #if defined(USART3_BASE)
<> 149:156823d33999 350 static void uart3_irq(void)
<> 149:156823d33999 351 {
<> 149:156823d33999 352 uart_irq(2);
<> 149:156823d33999 353 }
<> 149:156823d33999 354 #endif
<> 149:156823d33999 355
<> 149:156823d33999 356 #if defined(UART4_BASE)
<> 149:156823d33999 357 static void uart4_irq(void)
<> 149:156823d33999 358 {
<> 149:156823d33999 359 uart_irq(3);
<> 149:156823d33999 360 }
<> 149:156823d33999 361 #endif
<> 149:156823d33999 362
<> 149:156823d33999 363 #if defined(UART5_BASE)
<> 149:156823d33999 364 static void uart5_irq(void)
<> 149:156823d33999 365 {
<> 149:156823d33999 366 uart_irq(4);
<> 149:156823d33999 367 }
<> 149:156823d33999 368 #endif
<> 149:156823d33999 369
<> 149:156823d33999 370 #if defined(USART6_BASE)
<> 149:156823d33999 371 static void uart6_irq(void)
<> 149:156823d33999 372 {
<> 149:156823d33999 373 uart_irq(5);
<> 149:156823d33999 374 }
<> 149:156823d33999 375 #endif
<> 149:156823d33999 376
<> 149:156823d33999 377 #if defined(UART7_BASE)
<> 149:156823d33999 378 static void uart7_irq(void)
<> 149:156823d33999 379 {
<> 149:156823d33999 380 uart_irq(6);
<> 149:156823d33999 381 }
<> 149:156823d33999 382 #endif
<> 149:156823d33999 383
<> 149:156823d33999 384 #if defined(UART8_BASE)
<> 149:156823d33999 385 static void uart8_irq(void)
<> 149:156823d33999 386 {
<> 149:156823d33999 387 uart_irq(7);
<> 149:156823d33999 388 }
<> 149:156823d33999 389 #endif
<> 149:156823d33999 390
<> 149:156823d33999 391 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
<> 149:156823d33999 392 {
<> 149:156823d33999 393 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 394
<> 149:156823d33999 395 irq_handler = handler;
<> 149:156823d33999 396 serial_irq_ids[obj_s->index] = id;
<> 149:156823d33999 397 }
<> 149:156823d33999 398
<> 149:156823d33999 399 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
<> 149:156823d33999 400 {
<> 149:156823d33999 401 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 402 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 403 IRQn_Type irq_n = (IRQn_Type)0;
<> 149:156823d33999 404 uint32_t vector = 0;
<> 149:156823d33999 405
<> 149:156823d33999 406 switch (obj_s->index) {
<> 149:156823d33999 407 case 0:
<> 149:156823d33999 408 irq_n = USART1_IRQn;
<> 149:156823d33999 409 vector = (uint32_t)&uart1_irq;
<> 149:156823d33999 410 break;
<> 149:156823d33999 411
<> 149:156823d33999 412 case 1:
<> 149:156823d33999 413 irq_n = USART2_IRQn;
<> 149:156823d33999 414 vector = (uint32_t)&uart2_irq;
<> 149:156823d33999 415 break;
<> 149:156823d33999 416 #if defined(USART3_BASE)
<> 149:156823d33999 417 case 2:
<> 149:156823d33999 418 irq_n = USART3_IRQn;
<> 149:156823d33999 419 vector = (uint32_t)&uart3_irq;
<> 149:156823d33999 420 break;
<> 149:156823d33999 421 #endif
<> 149:156823d33999 422 #if defined(UART4_BASE)
<> 149:156823d33999 423 case 3:
<> 149:156823d33999 424 irq_n = UART4_IRQn;
<> 149:156823d33999 425 vector = (uint32_t)&uart4_irq;
<> 149:156823d33999 426 break;
<> 149:156823d33999 427 #endif
<> 149:156823d33999 428 #if defined(UART5_BASE)
<> 149:156823d33999 429 case 4:
<> 149:156823d33999 430 irq_n = UART5_IRQn;
<> 149:156823d33999 431 vector = (uint32_t)&uart5_irq;
<> 149:156823d33999 432 break;
<> 149:156823d33999 433 #endif
<> 149:156823d33999 434 #if defined(USART6_BASE)
<> 149:156823d33999 435 case 5:
<> 149:156823d33999 436 irq_n = USART6_IRQn;
<> 149:156823d33999 437 vector = (uint32_t)&uart6_irq;
<> 149:156823d33999 438 break;
<> 149:156823d33999 439 #endif
<> 149:156823d33999 440 #if defined(UART7_BASE)
<> 149:156823d33999 441 case 6:
<> 149:156823d33999 442 irq_n = UART7_IRQn;
<> 149:156823d33999 443 vector = (uint32_t)&uart7_irq;
<> 149:156823d33999 444 break;
<> 149:156823d33999 445 #endif
<> 149:156823d33999 446 #if defined(UART8_BASE)
<> 149:156823d33999 447 case 7:
<> 149:156823d33999 448 irq_n = UART8_IRQn;
<> 149:156823d33999 449 vector = (uint32_t)&uart8_irq;
<> 149:156823d33999 450 break;
<> 149:156823d33999 451 #endif
<> 149:156823d33999 452 }
<> 149:156823d33999 453
<> 149:156823d33999 454 if (enable) {
<> 149:156823d33999 455 if (irq == RxIrq) {
<> 149:156823d33999 456 __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
<> 149:156823d33999 457 } else { // TxIrq
<> 149:156823d33999 458 __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
<> 149:156823d33999 459 }
<> 149:156823d33999 460 NVIC_SetVector(irq_n, vector);
<> 149:156823d33999 461 NVIC_EnableIRQ(irq_n);
<> 149:156823d33999 462
<> 149:156823d33999 463 } else { // disable
<> 149:156823d33999 464 int all_disabled = 0;
<> 149:156823d33999 465 if (irq == RxIrq) {
<> 149:156823d33999 466 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
<> 149:156823d33999 467 // Check if TxIrq is disabled too
<> 149:156823d33999 468 if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) {
<> 149:156823d33999 469 all_disabled = 1;
<> 149:156823d33999 470 }
<> 149:156823d33999 471 } else { // TxIrq
<> 149:156823d33999 472 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
<> 149:156823d33999 473 // Check if RxIrq is disabled too
<> 149:156823d33999 474 if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) {
<> 149:156823d33999 475 all_disabled = 1;
<> 149:156823d33999 476 }
<> 149:156823d33999 477 }
<> 149:156823d33999 478
<> 149:156823d33999 479 if (all_disabled) {
<> 149:156823d33999 480 NVIC_DisableIRQ(irq_n);
<> 149:156823d33999 481 }
<> 149:156823d33999 482 }
<> 149:156823d33999 483 }
<> 149:156823d33999 484
<> 149:156823d33999 485 /******************************************************************************
<> 149:156823d33999 486 * READ/WRITE
<> 149:156823d33999 487 ******************************************************************************/
<> 149:156823d33999 488
<> 149:156823d33999 489 int serial_getc(serial_t *obj)
<> 149:156823d33999 490 {
<> 149:156823d33999 491 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 492 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 493
<> 149:156823d33999 494 while (!serial_readable(obj));
<> 149:156823d33999 495 return (int)(huart->Instance->DR & 0x1FF);
<> 149:156823d33999 496 }
<> 149:156823d33999 497
<> 149:156823d33999 498 void serial_putc(serial_t *obj, int c)
<> 149:156823d33999 499 {
<> 149:156823d33999 500 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 501 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 502
<> 149:156823d33999 503 while (!serial_writable(obj));
<> 149:156823d33999 504 huart->Instance->DR = (uint32_t)(c & 0x1FF);
<> 149:156823d33999 505 }
<> 149:156823d33999 506
<> 149:156823d33999 507 int serial_readable(serial_t *obj)
<> 149:156823d33999 508 {
<> 149:156823d33999 509 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 510 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 511
<> 149:156823d33999 512 // Check if data is received
<> 149:156823d33999 513 return (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) ? 1 : 0;
<> 149:156823d33999 514 }
<> 149:156823d33999 515
<> 149:156823d33999 516 int serial_writable(serial_t *obj)
<> 149:156823d33999 517 {
<> 149:156823d33999 518 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 519 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 520
<> 149:156823d33999 521 // Check if data is transmitted
<> 149:156823d33999 522 return (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) ? 1 : 0;
<> 149:156823d33999 523 }
<> 149:156823d33999 524
<> 149:156823d33999 525 void serial_clear(serial_t *obj)
<> 149:156823d33999 526 {
<> 149:156823d33999 527 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 528 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 529
<> 149:156823d33999 530 huart->TxXferCount = 0;
<> 149:156823d33999 531 huart->RxXferCount = 0;
<> 149:156823d33999 532 }
<> 149:156823d33999 533
<> 149:156823d33999 534 void serial_pinout_tx(PinName tx)
<> 149:156823d33999 535 {
<> 149:156823d33999 536 pinmap_pinout(tx, PinMap_UART_TX);
<> 149:156823d33999 537 }
<> 149:156823d33999 538
<> 149:156823d33999 539 void serial_break_set(serial_t *obj)
<> 149:156823d33999 540 {
<> 149:156823d33999 541 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 542 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 543
<> 149:156823d33999 544 HAL_LIN_SendBreak(huart);
<> 149:156823d33999 545 }
<> 149:156823d33999 546
<> 149:156823d33999 547 void serial_break_clear(serial_t *obj)
<> 149:156823d33999 548 {
<> 149:156823d33999 549 (void)obj;
<> 149:156823d33999 550 }
<> 149:156823d33999 551
<> 149:156823d33999 552 #if DEVICE_SERIAL_ASYNCH
<> 149:156823d33999 553
<> 149:156823d33999 554 /******************************************************************************
<> 149:156823d33999 555 * LOCAL HELPER FUNCTIONS
<> 149:156823d33999 556 ******************************************************************************/
<> 149:156823d33999 557
<> 149:156823d33999 558 /**
<> 149:156823d33999 559 * Configure the TX buffer for an asynchronous write serial transaction
<> 149:156823d33999 560 *
<> 149:156823d33999 561 * @param obj The serial object.
<> 149:156823d33999 562 * @param tx The buffer for sending.
<> 149:156823d33999 563 * @param tx_length The number of words to transmit.
<> 149:156823d33999 564 */
<> 149:156823d33999 565 static void serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width)
<> 149:156823d33999 566 {
<> 149:156823d33999 567 (void)width;
<> 149:156823d33999 568
<> 149:156823d33999 569 // Exit if a transmit is already on-going
<> 149:156823d33999 570 if (serial_tx_active(obj)) {
<> 149:156823d33999 571 return;
<> 149:156823d33999 572 }
<> 149:156823d33999 573
<> 149:156823d33999 574 obj->tx_buff.buffer = tx;
<> 149:156823d33999 575 obj->tx_buff.length = tx_length;
<> 149:156823d33999 576 obj->tx_buff.pos = 0;
<> 149:156823d33999 577 }
<> 149:156823d33999 578
<> 149:156823d33999 579 /**
<> 149:156823d33999 580 * Configure the RX buffer for an asynchronous write serial transaction
<> 149:156823d33999 581 *
<> 149:156823d33999 582 * @param obj The serial object.
<> 149:156823d33999 583 * @param tx The buffer for sending.
<> 149:156823d33999 584 * @param tx_length The number of words to transmit.
<> 149:156823d33999 585 */
<> 149:156823d33999 586 static void serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width)
<> 149:156823d33999 587 {
<> 149:156823d33999 588 (void)width;
<> 149:156823d33999 589
<> 149:156823d33999 590 // Exit if a reception is already on-going
<> 149:156823d33999 591 if (serial_rx_active(obj)) {
<> 149:156823d33999 592 return;
<> 149:156823d33999 593 }
<> 149:156823d33999 594
<> 149:156823d33999 595 obj->rx_buff.buffer = rx;
<> 149:156823d33999 596 obj->rx_buff.length = rx_length;
<> 149:156823d33999 597 obj->rx_buff.pos = 0;
<> 149:156823d33999 598 }
<> 149:156823d33999 599
<> 149:156823d33999 600 /**
<> 149:156823d33999 601 * Configure events
<> 149:156823d33999 602 *
<> 149:156823d33999 603 * @param obj The serial object
<> 149:156823d33999 604 * @param event The logical OR of the events to configure
<> 149:156823d33999 605 * @param enable Set to non-zero to enable events, or zero to disable them
<> 149:156823d33999 606 */
<> 149:156823d33999 607 static void serial_enable_event(serial_t *obj, int event, uint8_t enable)
<> 149:156823d33999 608 {
<> 149:156823d33999 609 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 610
<> 149:156823d33999 611 // Shouldn't have to enable interrupt here, just need to keep track of the requested events.
<> 149:156823d33999 612 if (enable) {
<> 149:156823d33999 613 obj_s->events |= event;
<> 149:156823d33999 614 } else {
<> 149:156823d33999 615 obj_s->events &= ~event;
<> 149:156823d33999 616 }
<> 149:156823d33999 617 }
<> 149:156823d33999 618
<> 149:156823d33999 619
<> 149:156823d33999 620 /**
<> 149:156823d33999 621 * Get index of serial object TX IRQ, relating it to the physical peripheral.
<> 149:156823d33999 622 *
<> 149:156823d33999 623 * @param obj pointer to serial object
<> 149:156823d33999 624 * @return internal NVIC TX IRQ index of U(S)ART peripheral
<> 149:156823d33999 625 */
<> 149:156823d33999 626 static IRQn_Type serial_get_irq_n(serial_t *obj)
<> 149:156823d33999 627 {
<> 149:156823d33999 628 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 629 IRQn_Type irq_n;
<> 149:156823d33999 630
<> 149:156823d33999 631 switch (obj_s->index) {
<> 149:156823d33999 632 #if defined(USART1_BASE)
<> 149:156823d33999 633 case 0:
<> 149:156823d33999 634 irq_n = USART1_IRQn;
<> 149:156823d33999 635 break;
<> 149:156823d33999 636 #endif
<> 149:156823d33999 637 #if defined(USART2_BASE)
<> 149:156823d33999 638 case 1:
<> 149:156823d33999 639 irq_n = USART2_IRQn;
<> 149:156823d33999 640 break;
<> 149:156823d33999 641 #endif
<> 149:156823d33999 642 #if defined(USART3_BASE)
<> 149:156823d33999 643 case 2:
<> 149:156823d33999 644 irq_n = USART3_IRQn;
<> 149:156823d33999 645 break;
<> 149:156823d33999 646 #endif
<> 149:156823d33999 647 #if defined(UART4_BASE)
<> 149:156823d33999 648 case 3:
<> 149:156823d33999 649 irq_n = UART4_IRQn;
<> 149:156823d33999 650 break;
<> 149:156823d33999 651 #endif
<> 149:156823d33999 652 #if defined(USART5_BASE)
<> 149:156823d33999 653 case 4:
<> 149:156823d33999 654 irq_n = UART5_IRQn;
<> 149:156823d33999 655 break;
<> 149:156823d33999 656 #endif
<> 149:156823d33999 657 #if defined(USART6_BASE)
<> 149:156823d33999 658 case 5:
<> 149:156823d33999 659 irq_n = USART6_IRQn;
<> 149:156823d33999 660 break;
<> 149:156823d33999 661 #endif
<> 149:156823d33999 662 #if defined(UART7_BASE)
<> 149:156823d33999 663 case 6:
<> 149:156823d33999 664 irq_n = UART7_IRQn;
<> 149:156823d33999 665 break;
<> 149:156823d33999 666 #endif
<> 149:156823d33999 667 #if defined(UART8_BASE)
<> 149:156823d33999 668 case 7:
<> 149:156823d33999 669 irq_n = UART8_IRQn;
<> 149:156823d33999 670 break;
<> 149:156823d33999 671 #endif
<> 149:156823d33999 672 default:
<> 149:156823d33999 673 irq_n = (IRQn_Type)0;
<> 149:156823d33999 674 }
<> 149:156823d33999 675
<> 149:156823d33999 676 return irq_n;
<> 149:156823d33999 677 }
<> 149:156823d33999 678
<> 149:156823d33999 679 /******************************************************************************
<> 149:156823d33999 680 * MBED API FUNCTIONS
<> 149:156823d33999 681 ******************************************************************************/
<> 149:156823d33999 682
<> 149:156823d33999 683 /**
<> 149:156823d33999 684 * Begin asynchronous TX transfer. The used buffer is specified in the serial
<> 149:156823d33999 685 * object, tx_buff
<> 149:156823d33999 686 *
<> 149:156823d33999 687 * @param obj The serial object
<> 149:156823d33999 688 * @param tx The buffer for sending
<> 149:156823d33999 689 * @param tx_length The number of words to transmit
<> 149:156823d33999 690 * @param tx_width The bit width of buffer word
<> 149:156823d33999 691 * @param handler The serial handler
<> 149:156823d33999 692 * @param event The logical OR of events to be registered
<> 149:156823d33999 693 * @param hint A suggestion for how to use DMA with this transfer
<> 149:156823d33999 694 * @return Returns number of data transfered, or 0 otherwise
<> 149:156823d33999 695 */
<> 149:156823d33999 696 int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
<> 149:156823d33999 697 {
<> 149:156823d33999 698 // TODO: DMA usage is currently ignored
<> 149:156823d33999 699 (void) hint;
<> 149:156823d33999 700
<> 149:156823d33999 701 // Check buffer is ok
<> 149:156823d33999 702 MBED_ASSERT(tx != (void*)0);
<> 149:156823d33999 703 MBED_ASSERT(tx_width == 8); // support only 8b width
<> 149:156823d33999 704
<> 149:156823d33999 705 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 706 UART_HandleTypeDef * huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 707
<> 149:156823d33999 708 if (tx_length == 0) {
<> 149:156823d33999 709 return 0;
<> 149:156823d33999 710 }
<> 149:156823d33999 711
<> 149:156823d33999 712 // Set up buffer
<> 149:156823d33999 713 serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width);
<> 149:156823d33999 714
<> 149:156823d33999 715 // Set up events
<> 149:156823d33999 716 serial_enable_event(obj, SERIAL_EVENT_TX_ALL, 0); // Clear all events
<> 149:156823d33999 717 serial_enable_event(obj, event, 1); // Set only the wanted events
<> 149:156823d33999 718
<> 149:156823d33999 719 // Enable interrupt
<> 149:156823d33999 720 IRQn_Type irq_n = serial_get_irq_n(obj);
<> 149:156823d33999 721 NVIC_ClearPendingIRQ(irq_n);
<> 149:156823d33999 722 NVIC_DisableIRQ(irq_n);
<> 149:156823d33999 723 NVIC_SetPriority(irq_n, 1);
<> 149:156823d33999 724 NVIC_SetVector(irq_n, (uint32_t)handler);
<> 149:156823d33999 725 NVIC_EnableIRQ(irq_n);
<> 149:156823d33999 726
<> 149:156823d33999 727 // the following function will enable UART_IT_TXE and error interrupts
<> 149:156823d33999 728 if (HAL_UART_Transmit_IT(huart, (uint8_t*)tx, tx_length) != HAL_OK) {
<> 149:156823d33999 729 return 0;
<> 149:156823d33999 730 }
<> 149:156823d33999 731
<> 149:156823d33999 732 return tx_length;
<> 149:156823d33999 733 }
<> 149:156823d33999 734
<> 149:156823d33999 735 /**
<> 149:156823d33999 736 * Begin asynchronous RX transfer (enable interrupt for data collecting)
<> 149:156823d33999 737 * The used buffer is specified in the serial object, rx_buff
<> 149:156823d33999 738 *
<> 149:156823d33999 739 * @param obj The serial object
<> 149:156823d33999 740 * @param rx The buffer for sending
<> 149:156823d33999 741 * @param rx_length The number of words to transmit
<> 149:156823d33999 742 * @param rx_width The bit width of buffer word
<> 149:156823d33999 743 * @param handler The serial handler
<> 149:156823d33999 744 * @param event The logical OR of events to be registered
<> 149:156823d33999 745 * @param handler The serial handler
<> 149:156823d33999 746 * @param char_match A character in range 0-254 to be matched
<> 149:156823d33999 747 * @param hint A suggestion for how to use DMA with this transfer
<> 149:156823d33999 748 */
<> 149:156823d33999 749 void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
<> 149:156823d33999 750 {
<> 149:156823d33999 751 // TODO: DMA usage is currently ignored
<> 149:156823d33999 752 (void) hint;
<> 149:156823d33999 753
<> 149:156823d33999 754 /* Sanity check arguments */
<> 149:156823d33999 755 MBED_ASSERT(obj);
<> 149:156823d33999 756 MBED_ASSERT(rx != (void*)0);
<> 149:156823d33999 757 MBED_ASSERT(rx_width == 8); // support only 8b width
<> 149:156823d33999 758
<> 149:156823d33999 759 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 760 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 761
<> 149:156823d33999 762 serial_enable_event(obj, SERIAL_EVENT_RX_ALL, 0);
<> 149:156823d33999 763 serial_enable_event(obj, event, 1);
<> 149:156823d33999 764
<> 149:156823d33999 765 // set CharMatch
<> 149:156823d33999 766 obj->char_match = char_match;
<> 149:156823d33999 767
<> 149:156823d33999 768 serial_rx_buffer_set(obj, rx, rx_length, rx_width);
<> 149:156823d33999 769
<> 149:156823d33999 770 IRQn_Type irq_n = serial_get_irq_n(obj);
<> 149:156823d33999 771 NVIC_ClearPendingIRQ(irq_n);
<> 149:156823d33999 772 NVIC_DisableIRQ(irq_n);
<> 149:156823d33999 773 NVIC_SetPriority(irq_n, 0);
<> 149:156823d33999 774 NVIC_SetVector(irq_n, (uint32_t)handler);
<> 149:156823d33999 775 NVIC_EnableIRQ(irq_n);
<> 149:156823d33999 776
<> 149:156823d33999 777 // following HAL function will enable the RXNE interrupt + error interrupts
<> 149:156823d33999 778 HAL_UART_Receive_IT(huart, (uint8_t*)rx, rx_length);
<> 149:156823d33999 779 }
<> 149:156823d33999 780
<> 149:156823d33999 781 /**
<> 149:156823d33999 782 * Attempts to determine if the serial peripheral is already in use for TX
<> 149:156823d33999 783 *
<> 149:156823d33999 784 * @param obj The serial object
<> 149:156823d33999 785 * @return Non-zero if the TX transaction is ongoing, 0 otherwise
<> 149:156823d33999 786 */
<> 149:156823d33999 787 uint8_t serial_tx_active(serial_t *obj)
<> 149:156823d33999 788 {
<> 149:156823d33999 789 MBED_ASSERT(obj);
<> 149:156823d33999 790
<> 149:156823d33999 791 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 792 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 793
<> 149:156823d33999 794 return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_TX) ? 1 : 0);
<> 149:156823d33999 795 }
<> 149:156823d33999 796
<> 149:156823d33999 797 /**
<> 149:156823d33999 798 * Attempts to determine if the serial peripheral is already in use for RX
<> 149:156823d33999 799 *
<> 149:156823d33999 800 * @param obj The serial object
<> 149:156823d33999 801 * @return Non-zero if the RX transaction is ongoing, 0 otherwise
<> 149:156823d33999 802 */
<> 149:156823d33999 803 uint8_t serial_rx_active(serial_t *obj)
<> 149:156823d33999 804 {
<> 149:156823d33999 805 MBED_ASSERT(obj);
<> 149:156823d33999 806
<> 149:156823d33999 807 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 808 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 809
<> 149:156823d33999 810 return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_RX) ? 1 : 0);
<> 149:156823d33999 811 }
<> 149:156823d33999 812
<> 149:156823d33999 813 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
<> 149:156823d33999 814 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
<> 149:156823d33999 815 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
<> 149:156823d33999 816 }
<> 149:156823d33999 817 }
<> 149:156823d33999 818
<> 149:156823d33999 819 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) {
<> 149:156823d33999 820 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
<> 149:156823d33999 821 volatile uint32_t tmpval = huart->Instance->DR; // Clear PE flag
<> 149:156823d33999 822 } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
<> 149:156823d33999 823 volatile uint32_t tmpval = huart->Instance->DR; // Clear FE flag
<> 149:156823d33999 824 } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE) != RESET) {
<> 149:156823d33999 825 volatile uint32_t tmpval = huart->Instance->DR; // Clear NE flag
<> 149:156823d33999 826 } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
<> 149:156823d33999 827 volatile uint32_t tmpval = huart->Instance->DR; // Clear ORE flag
<> 149:156823d33999 828 }
<> 149:156823d33999 829 }
<> 149:156823d33999 830
<> 149:156823d33999 831 /**
<> 149:156823d33999 832 * The asynchronous TX and RX handler.
<> 149:156823d33999 833 *
<> 149:156823d33999 834 * @param obj The serial object
<> 149:156823d33999 835 * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise
<> 149:156823d33999 836 */
<> 149:156823d33999 837 int serial_irq_handler_asynch(serial_t *obj)
<> 149:156823d33999 838 {
<> 149:156823d33999 839 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 840 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 841
<> 149:156823d33999 842 volatile int return_event = 0;
<> 149:156823d33999 843 uint8_t *buf = (uint8_t*)(obj->rx_buff.buffer);
<> 149:156823d33999 844 uint8_t i = 0;
<> 149:156823d33999 845
<> 149:156823d33999 846 // TX PART:
<> 149:156823d33999 847 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
<> 149:156823d33999 848 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) {
<> 149:156823d33999 849 // Return event SERIAL_EVENT_TX_COMPLETE if requested
<> 149:156823d33999 850 if ((obj_s->events & SERIAL_EVENT_TX_COMPLETE ) != 0) {
<> 149:156823d33999 851 return_event |= (SERIAL_EVENT_TX_COMPLETE & obj_s->events);
<> 149:156823d33999 852 }
<> 149:156823d33999 853 }
<> 149:156823d33999 854 }
<> 149:156823d33999 855
<> 149:156823d33999 856 // Handle error events
<> 149:156823d33999 857 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
<> 149:156823d33999 858 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
<> 149:156823d33999 859 return_event |= (SERIAL_EVENT_RX_PARITY_ERROR & obj_s->events);
<> 149:156823d33999 860 }
<> 149:156823d33999 861 }
<> 149:156823d33999 862
<> 149:156823d33999 863 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
<> 149:156823d33999 864 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
<> 149:156823d33999 865 return_event |= (SERIAL_EVENT_RX_FRAMING_ERROR & obj_s->events);
<> 149:156823d33999 866 }
<> 149:156823d33999 867 }
<> 149:156823d33999 868
<> 149:156823d33999 869 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
<> 149:156823d33999 870 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
<> 149:156823d33999 871 return_event |= (SERIAL_EVENT_RX_OVERRUN_ERROR & obj_s->events);
<> 149:156823d33999 872 }
<> 149:156823d33999 873 }
<> 149:156823d33999 874
<> 149:156823d33999 875 HAL_UART_IRQHandler(huart);
<> 149:156823d33999 876
<> 149:156823d33999 877 // Abort if an error occurs
<> 149:156823d33999 878 if (return_event & SERIAL_EVENT_RX_PARITY_ERROR ||
<> 149:156823d33999 879 return_event & SERIAL_EVENT_RX_FRAMING_ERROR ||
<> 149:156823d33999 880 return_event & SERIAL_EVENT_RX_OVERRUN_ERROR) {
<> 149:156823d33999 881 return return_event;
<> 149:156823d33999 882 }
<> 149:156823d33999 883
<> 149:156823d33999 884 //RX PART
<> 149:156823d33999 885 if (huart->RxXferSize != 0) {
<> 149:156823d33999 886 obj->rx_buff.pos = huart->RxXferSize - huart->RxXferCount;
<> 149:156823d33999 887 }
<> 149:156823d33999 888 if ((huart->RxXferCount == 0) && (obj->rx_buff.pos >= (obj->rx_buff.length - 1))) {
<> 149:156823d33999 889 return_event |= (SERIAL_EVENT_RX_COMPLETE & obj_s->events);
<> 149:156823d33999 890 }
<> 149:156823d33999 891
<> 149:156823d33999 892 // Check if char_match is present
<> 149:156823d33999 893 if (obj_s->events & SERIAL_EVENT_RX_CHARACTER_MATCH) {
<> 149:156823d33999 894 if (buf != NULL) {
<> 149:156823d33999 895 for (i = 0; i < obj->rx_buff.pos; i++) {
<> 149:156823d33999 896 if (buf[i] == obj->char_match) {
<> 149:156823d33999 897 obj->rx_buff.pos = i;
<> 149:156823d33999 898 return_event |= (SERIAL_EVENT_RX_CHARACTER_MATCH & obj_s->events);
<> 149:156823d33999 899 serial_rx_abort_asynch(obj);
<> 149:156823d33999 900 break;
<> 149:156823d33999 901 }
<> 149:156823d33999 902 }
<> 149:156823d33999 903 }
<> 149:156823d33999 904 }
<> 149:156823d33999 905
<> 149:156823d33999 906 return return_event;
<> 149:156823d33999 907 }
<> 149:156823d33999 908
<> 149:156823d33999 909 /**
<> 149:156823d33999 910 * Abort the ongoing TX transaction. It disables the enabled interupt for TX and
<> 149:156823d33999 911 * flush TX hardware buffer if TX FIFO is used
<> 149:156823d33999 912 *
<> 149:156823d33999 913 * @param obj The serial object
<> 149:156823d33999 914 */
<> 149:156823d33999 915 void serial_tx_abort_asynch(serial_t *obj)
<> 149:156823d33999 916 {
<> 149:156823d33999 917 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 918 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 919
<> 149:156823d33999 920 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
<> 149:156823d33999 921 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
<> 149:156823d33999 922
<> 149:156823d33999 923 // clear flags
<> 149:156823d33999 924 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
<> 149:156823d33999 925
<> 149:156823d33999 926 // reset states
<> 149:156823d33999 927 huart->TxXferCount = 0;
<> 149:156823d33999 928 // update handle state
<> 149:156823d33999 929 if(huart->gState == HAL_UART_STATE_BUSY_TX_RX) {
<> 149:156823d33999 930 huart->gState = HAL_UART_STATE_BUSY_RX;
<> 149:156823d33999 931 } else {
<> 149:156823d33999 932 huart->gState = HAL_UART_STATE_READY;
<> 149:156823d33999 933 }
<> 149:156823d33999 934 }
<> 149:156823d33999 935
<> 149:156823d33999 936 /**
<> 149:156823d33999 937 * Abort the ongoing RX transaction It disables the enabled interrupt for RX and
<> 149:156823d33999 938 * flush RX hardware buffer if RX FIFO is used
<> 149:156823d33999 939 *
<> 149:156823d33999 940 * @param obj The serial object
<> 149:156823d33999 941 */
<> 149:156823d33999 942 void serial_rx_abort_asynch(serial_t *obj)
<> 149:156823d33999 943 {
<> 149:156823d33999 944 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 945 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 946
<> 149:156823d33999 947 // disable interrupts
<> 149:156823d33999 948 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
<> 149:156823d33999 949 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
<> 149:156823d33999 950 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
<> 149:156823d33999 951
<> 149:156823d33999 952 // clear flags
<> 149:156823d33999 953 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_RXNE);
<> 149:156823d33999 954 volatile uint32_t tmpval = huart->Instance->DR; // Clear errors flag
<> 149:156823d33999 955
<> 149:156823d33999 956 // reset states
<> 149:156823d33999 957 huart->RxXferCount = 0;
<> 149:156823d33999 958 // update handle state
<> 149:156823d33999 959 if(huart->RxState == HAL_UART_STATE_BUSY_TX_RX) {
<> 149:156823d33999 960 huart->RxState = HAL_UART_STATE_BUSY_TX;
<> 149:156823d33999 961 } else {
<> 149:156823d33999 962 huart->RxState = HAL_UART_STATE_READY;
<> 149:156823d33999 963 }
<> 149:156823d33999 964 }
<> 149:156823d33999 965
<> 149:156823d33999 966 #endif
<> 149:156823d33999 967
<> 149:156823d33999 968 #if DEVICE_SERIAL_FC
<> 149:156823d33999 969
<> 149:156823d33999 970 /**
<> 149:156823d33999 971 * Set HW Control Flow
<> 149:156823d33999 972 * @param obj The serial object
<> 149:156823d33999 973 * @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS)
<> 149:156823d33999 974 * @param rxflow Pin for the rxflow
<> 149:156823d33999 975 * @param txflow Pin for the txflow
<> 149:156823d33999 976 */
<> 149:156823d33999 977 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
<> 149:156823d33999 978 {
<> 149:156823d33999 979 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 980
<> 149:156823d33999 981 // Determine the UART to use (UART_1, UART_2, ...)
<> 149:156823d33999 982 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
<> 149:156823d33999 983 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
<> 149:156823d33999 984
<> 149:156823d33999 985 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
<> 149:156823d33999 986 obj_s->uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
<> 149:156823d33999 987 MBED_ASSERT(obj_s->uart != (UARTName)NC);
<> 149:156823d33999 988
<> 149:156823d33999 989 if(type == FlowControlNone) {
<> 149:156823d33999 990 // Disable hardware flow control
<> 149:156823d33999 991 obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
<> 149:156823d33999 992 }
<> 149:156823d33999 993 if (type == FlowControlRTS) {
<> 149:156823d33999 994 // Enable RTS
<> 149:156823d33999 995 MBED_ASSERT(uart_rts != (UARTName)NC);
<> 149:156823d33999 996 obj_s->hw_flow_ctl = UART_HWCONTROL_RTS;
<> 149:156823d33999 997 obj_s->pin_rts = rxflow;
<> 149:156823d33999 998 // Enable the pin for RTS function
<> 149:156823d33999 999 pinmap_pinout(rxflow, PinMap_UART_RTS);
<> 149:156823d33999 1000 }
<> 149:156823d33999 1001 if (type == FlowControlCTS) {
<> 149:156823d33999 1002 // Enable CTS
<> 149:156823d33999 1003 MBED_ASSERT(uart_cts != (UARTName)NC);
<> 149:156823d33999 1004 obj_s->hw_flow_ctl = UART_HWCONTROL_CTS;
<> 149:156823d33999 1005 obj_s->pin_cts = txflow;
<> 149:156823d33999 1006 // Enable the pin for CTS function
<> 149:156823d33999 1007 pinmap_pinout(txflow, PinMap_UART_CTS);
<> 149:156823d33999 1008 }
<> 149:156823d33999 1009 if (type == FlowControlRTSCTS) {
<> 149:156823d33999 1010 // Enable CTS & RTS
<> 149:156823d33999 1011 MBED_ASSERT(uart_rts != (UARTName)NC);
<> 149:156823d33999 1012 MBED_ASSERT(uart_cts != (UARTName)NC);
<> 149:156823d33999 1013 obj_s->hw_flow_ctl = UART_HWCONTROL_RTS_CTS;
<> 149:156823d33999 1014 obj_s->pin_rts = rxflow;
<> 149:156823d33999 1015 obj_s->pin_cts = txflow;
<> 149:156823d33999 1016 // Enable the pin for CTS function
<> 149:156823d33999 1017 pinmap_pinout(txflow, PinMap_UART_CTS);
<> 149:156823d33999 1018 // Enable the pin for RTS function
<> 149:156823d33999 1019 pinmap_pinout(rxflow, PinMap_UART_RTS);
<> 149:156823d33999 1020 }
<> 149:156823d33999 1021
<> 149:156823d33999 1022 init_uart(obj);
<> 149:156823d33999 1023 }
<> 149:156823d33999 1024
<> 149:156823d33999 1025 #endif
<> 149:156823d33999 1026
<> 149:156823d33999 1027 #endif