Clemens Valens / board

This is a part of the Kinetiszer project.

Dependents:   kinetisizer

board_sysinit.c@0:e0042c0c4d2d, 2014-10-28 (annotated)

Committer:
Clemo
Date:
Tue Oct 28 12:20:47 2014 +0000
Revision:
0:e0042c0c4d2d
Error & warning free.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Clemo 0:e0042c0c4d2d 1 /*
Clemo 0:e0042c0c4d2d 2 * @brief LPCXpresso 1347 Sysinit file
Clemo 0:e0042c0c4d2d 3 *
Clemo 0:e0042c0c4d2d 4 * @note
Clemo 0:e0042c0c4d2d 5 * Copyright(C) NXP Semiconductors, 2013
Clemo 0:e0042c0c4d2d 6 * All rights reserved.
Clemo 0:e0042c0c4d2d 7 *
Clemo 0:e0042c0c4d2d 8 * @par
Clemo 0:e0042c0c4d2d 9 * Software that is described herein is for illustrative purposes only
Clemo 0:e0042c0c4d2d 10 * which provides customers with programming information regarding the
Clemo 0:e0042c0c4d2d 11 * LPC products. This software is supplied "AS IS" without any warranties of
Clemo 0:e0042c0c4d2d 12 * any kind, and NXP Semiconductors and its licensor disclaim any and
Clemo 0:e0042c0c4d2d 13 * all warranties, express or implied, including all implied warranties of
Clemo 0:e0042c0c4d2d 14 * merchantability, fitness for a particular purpose and non-infringement of
Clemo 0:e0042c0c4d2d 15 * intellectual property rights. NXP Semiconductors assumes no responsibility
Clemo 0:e0042c0c4d2d 16 * or liability for the use of the software, conveys no license or rights under any
Clemo 0:e0042c0c4d2d 17 * patent, copyright, mask work right, or any other intellectual property rights in
Clemo 0:e0042c0c4d2d 18 * or to any products. NXP Semiconductors reserves the right to make changes
Clemo 0:e0042c0c4d2d 19 * in the software without notification. NXP Semiconductors also makes no
Clemo 0:e0042c0c4d2d 20 * representation or warranty that such application will be suitable for the
Clemo 0:e0042c0c4d2d 21 * specified use without further testing or modification.
Clemo 0:e0042c0c4d2d 22 *
Clemo 0:e0042c0c4d2d 23 * @par
Clemo 0:e0042c0c4d2d 24 * Permission to use, copy, modify, and distribute this software and its
Clemo 0:e0042c0c4d2d 25 * documentation is hereby granted, under NXP Semiconductors' and its
Clemo 0:e0042c0c4d2d 26 * licensor's relevant copyrights in the software, without fee, provided that it
Clemo 0:e0042c0c4d2d 27 * is used in conjunction with NXP Semiconductors microcontrollers. This
Clemo 0:e0042c0c4d2d 28 * copyright, permission, and disclaimer notice must appear in all copies of
Clemo 0:e0042c0c4d2d 29 * this code.
Clemo 0:e0042c0c4d2d 30 */
Clemo 0:e0042c0c4d2d 31
Clemo 0:e0042c0c4d2d 32 #include "board.h"
Clemo 0:e0042c0c4d2d 33 #include "string.h"
Clemo 0:e0042c0c4d2d 34
Clemo 0:e0042c0c4d2d 35 /* The System initialization code is called prior to the application and
Clemo 0:e0042c0c4d2d 36 initializes the board for run-time operation. Board initialization
Clemo 0:e0042c0c4d2d 37 includes clock setup and default pin muxing configuration. */
Clemo 0:e0042c0c4d2d 38
Clemo 0:e0042c0c4d2d 39 /*****************************************************************************
Clemo 0:e0042c0c4d2d 40 * Private types/enumerations/variables
Clemo 0:e0042c0c4d2d 41 ****************************************************************************/
Clemo 0:e0042c0c4d2d 42
Clemo 0:e0042c0c4d2d 43 /*****************************************************************************
Clemo 0:e0042c0c4d2d 44 * Public types/enumerations/variables
Clemo 0:e0042c0c4d2d 45 ****************************************************************************/
Clemo 0:e0042c0c4d2d 46
Clemo 0:e0042c0c4d2d 47 /* Pin muxing table, only items that need changing from their default pin
Clemo 0:e0042c0c4d2d 48 state are in this table. */
Clemo 0:e0042c0c4d2d 49 /*STATIC const PINMUX_GRP_T pinmuxing[] = {
Clemo 0:e0042c0c4d2d 50 { 0, 3, (IOCON_FUNC1 | IOCON_RESERVED_BIT_7) }, // PIO0_3 used for USB_VBUS
Clemo 0:e0042c0c4d2d 51 { 0, 4, (IOCON_FUNC1 | IOCON_SFI2C_EN) }, // PIO0_4 used for SCL
Clemo 0:e0042c0c4d2d 52 { 0, 5, (IOCON_FUNC1 | IOCON_SFI2C_EN) }, // PIO0_5 used for SDA
Clemo 0:e0042c0c4d2d 53 { 0, 6, (IOCON_FUNC1 | IOCON_RESERVED_BIT_7) }, // PIO0_6 used for USB_CONNECT
Clemo 0:e0042c0c4d2d 54 { 0, 11, (IOCON_FUNC1 | IOCON_DIGMODE_EN) }, // PIO0_11 used for GPIO
Clemo 0:e0042c0c4d2d 55 { 0, 12, (IOCON_FUNC1 | IOCON_DIGMODE_EN) }, // PIO0_12 used for GPIO
Clemo 0:e0042c0c4d2d 56 { 0, 13, (IOCON_FUNC3 | IOCON_DIGMODE_EN) }, // PIO0_13 used for CT32B1_MAT0
Clemo 0:e0042c0c4d2d 57 { 0, 14, (IOCON_FUNC1 | IOCON_DIGMODE_EN) }, // PIO0_14 used for GPIO
Clemo 0:e0042c0c4d2d 58 { 0, 10, (IOCON_FUNC1 | IOCON_RESERVED_BIT_7) }, // PIO0_10 used for GPIO
Clemo 0:e0042c0c4d2d 59 { 0, 15, (IOCON_FUNC3 | IOCON_DIGMODE_EN) }, // PIO0_15 used for CT32B1_MAT2
Clemo 0:e0042c0c4d2d 60 { 1, 13, (IOCON_FUNC3 | IOCON_RESERVED_BIT_7) }, // PIO1_13 used for TXD
Clemo 0:e0042c0c4d2d 61 { 1, 14, (IOCON_FUNC3 | IOCON_RESERVED_BIT_7) }, // PIO1_14 used for RXD
Clemo 0:e0042c0c4d2d 62 { 1, 27, (IOCON_FUNC1 | IOCON_RESERVED_BIT_7) }, // PIO1_27 used for CT32B0_MAT3
Clemo 0:e0042c0c4d2d 63 };*/
Clemo 0:e0042c0c4d2d 64
Clemo 0:e0042c0c4d2d 65 /*****************************************************************************
Clemo 0:e0042c0c4d2d 66 * Private functions
Clemo 0:e0042c0c4d2d 67 ****************************************************************************/
Clemo 0:e0042c0c4d2d 68
Clemo 0:e0042c0c4d2d 69 /*****************************************************************************
Clemo 0:e0042c0c4d2d 70 * Public functions
Clemo 0:e0042c0c4d2d 71 ****************************************************************************/
Clemo 0:e0042c0c4d2d 72
Clemo 0:e0042c0c4d2d 73 /* Sets up system pin muxing */
Clemo 0:e0042c0c4d2d 74 void Board_SetupMuxing(void)
Clemo 0:e0042c0c4d2d 75 {
Clemo 0:e0042c0c4d2d 76 /* Enable IOCON clock */
Clemo 0:e0042c0c4d2d 77 //Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);
Clemo 0:e0042c0c4d2d 78
Clemo 0:e0042c0c4d2d 79 //Chip_IOCON_SetPinMuxing(LPC_IOCON, pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
Clemo 0:e0042c0c4d2d 80 }
Clemo 0:e0042c0c4d2d 81
Clemo 0:e0042c0c4d2d 82 /* Set up and initialize clocking prior to call to main */
Clemo 0:e0042c0c4d2d 83 void Board_SetupClocking(void)
Clemo 0:e0042c0c4d2d 84 {
Clemo 0:e0042c0c4d2d 85 //Chip_SetupXtalClocking();
Clemo 0:e0042c0c4d2d 86 }
Clemo 0:e0042c0c4d2d 87
Clemo 0:e0042c0c4d2d 88 /* Set up and initialize hardware prior to call to main */
Clemo 0:e0042c0c4d2d 89 void Board_SystemInit(void)
Clemo 0:e0042c0c4d2d 90 {
Clemo 0:e0042c0c4d2d 91 /* Booting from FLASH, so remap vector table to FLASH */
Clemo 0:e0042c0c4d2d 92 //Chip_SYSCTL_Map(REMAP_USER_FLASH_MODE);
Clemo 0:e0042c0c4d2d 93
Clemo 0:e0042c0c4d2d 94 /* Setup system clocking and muxing */
Clemo 0:e0042c0c4d2d 95 Board_SetupMuxing();
Clemo 0:e0042c0c4d2d 96 Board_SetupClocking();
Clemo 0:e0042c0c4d2d 97 }