Bongjun Hur / W5500Interface

W5500 driver for mbed OS 5

Dependents:   http-webserver-example mbed-os-example-sockets

Fork of W5500Interface by Sergei G

WIZnet/W5500.cpp@18:afec30f0922a, 2018-08-16 (annotated)

Committer:
Bongjun
Date:
Thu Aug 16 07:33:40 2018 +0000
Revision:
18:afec30f0922a
Parent:
17:60f75e78f35d 
change spi frame bits : 32->8

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Bongjun 6:e2ab76b2be07 1 // modified 08/08/2018 by Bongjun Hur
dgriffin65 0:77e050d1fb12 2
dgriffin65 0:77e050d1fb12 3 #include "mbed.h"
dgriffin65 0:77e050d1fb12 4 #include "mbed_debug.h"
dgriffin65 0:77e050d1fb12 5 #include "wiznet.h"
dgriffin65 0:77e050d1fb12 6
dgriffin65 0:77e050d1fb12 7 #ifdef USE_W5500
dgriffin65 0:77e050d1fb12 8
dgriffin65 0:77e050d1fb12 9 //Debug is disabled by default
Bongjun 8:c71c66d43703 10 #define w5500_DBG 0
Bongjun 8:c71c66d43703 11
Bongjun 8:c71c66d43703 12 #if w5500_DBG
dgriffin65 0:77e050d1fb12 13 #define DBG(...) do{debug("%p %d %s ", this,__LINE__,__PRETTY_FUNCTION__); debug(__VA_ARGS__); } while(0);
dgriffin65 0:77e050d1fb12 14 //#define DBG(x, ...) debug("[W5500:DBG]"x"\r\n", ##__VA_ARGS__);
dgriffin65 0:77e050d1fb12 15 #define WARN(x, ...) debug("[W5500:WARN]"x"\r\n", ##__VA_ARGS__);
dgriffin65 0:77e050d1fb12 16 #define ERR(x, ...) debug("[W5500:ERR]"x"\r\n", ##__VA_ARGS__);
Bongjun 8:c71c66d43703 17 #define INFO(x, ...) debug("[W5500:INFO]"x"\r\n", ##__VA_ARGS__);
dgriffin65 0:77e050d1fb12 18 #else
dgriffin65 0:77e050d1fb12 19 #define DBG(x, ...)
dgriffin65 0:77e050d1fb12 20 #define WARN(x, ...)
dgriffin65 0:77e050d1fb12 21 #define ERR(x, ...)
dgriffin65 0:77e050d1fb12 22 #define INFO(x, ...)
dgriffin65 0:77e050d1fb12 23 #endif
dgriffin65 0:77e050d1fb12 24
sgnezdov 3:61ff27ed8355 25 #define DBG_SPI 0
dgriffin65 0:77e050d1fb12 26
Bongjun 8:c71c66d43703 27 #if !defined(MBED_CONF_W5500_SPI_SPEED)
Bongjun 8:c71c66d43703 28 #define MBED_CONF_W5500_SPI_SPEED 100000
Bongjun 8:c71c66d43703 29 #endif
Bongjun 8:c71c66d43703 30
Bongjun 8:c71c66d43703 31
dgriffin65 0:77e050d1fb12 32 WIZnet_Chip* WIZnet_Chip::inst;
dgriffin65 0:77e050d1fb12 33
dgriffin65 0:77e050d1fb12 34 WIZnet_Chip::WIZnet_Chip(PinName mosi, PinName miso, PinName sclk, PinName _cs, PinName _reset):
dgriffin65 0:77e050d1fb12 35 cs(_cs), reset_pin(_reset)
dgriffin65 0:77e050d1fb12 36 {
Bongjun 18:afec30f0922a 37 connected_reset_pin = false;
dgriffin65 0:77e050d1fb12 38 spi = new SPI(mosi, miso, sclk);
Bongjun 8:c71c66d43703 39 DBG("SPI interface init...\n");
Bongjun 18:afec30f0922a 40 spi->format(8, 0);
Bongjun 8:c71c66d43703 41 spi->frequency(MBED_CONF_W5500_SPI_SPEED);
Bongjun 18:afec30f0922a 42
Bongjun 18:afec30f0922a 43 if (_cs != NC) {
Bongjun 18:afec30f0922a 44 cs = 1;
Bongjun 18:afec30f0922a 45 } else {
Bongjun 18:afec30f0922a 46 DBG("CS pin is necessary. So You have to set CS pin name\n");
Bongjun 18:afec30f0922a 47 }
Bongjun 18:afec30f0922a 48
Bongjun 18:afec30f0922a 49 if (_reset != NC) {
Bongjun 18:afec30f0922a 50 reset_pin = 1;
Bongjun 18:afec30f0922a 51 connected_reset_pin = true;
Bongjun 18:afec30f0922a 52 }
Bongjun 18:afec30f0922a 53
dgriffin65 0:77e050d1fb12 54 inst = this;
dgriffin65 0:77e050d1fb12 55 }
dgriffin65 0:77e050d1fb12 56
Bongjun 8:c71c66d43703 57 /*
dgriffin65 0:77e050d1fb12 58 WIZnet_Chip::WIZnet_Chip(SPI* spi, PinName _cs, PinName _reset):
dgriffin65 0:77e050d1fb12 59 cs(_cs), reset_pin(_reset)
dgriffin65 0:77e050d1fb12 60 {
dgriffin65 0:77e050d1fb12 61 this->spi = spi;
dgriffin65 0:77e050d1fb12 62 cs = 1;
dgriffin65 0:77e050d1fb12 63 reset_pin = 1;
dgriffin65 0:77e050d1fb12 64 inst = this;
dgriffin65 0:77e050d1fb12 65 }
Bongjun 8:c71c66d43703 66 */
Bongjun 8:c71c66d43703 67
Bongjun 8:c71c66d43703 68 WIZnet_Chip::~WIZnet_Chip()
Bongjun 8:c71c66d43703 69 {
Bongjun 8:c71c66d43703 70 delete spi;
Bongjun 8:c71c66d43703 71 }
dgriffin65 0:77e050d1fb12 72
dgriffin65 0:77e050d1fb12 73 bool WIZnet_Chip::setmac()
dgriffin65 0:77e050d1fb12 74 {
sgnezdov 2:06b6f9f7c071 75 reg_wr_mac(SHAR, mac);
dgriffin65 0:77e050d1fb12 76 return true;
dgriffin65 0:77e050d1fb12 77 }
dgriffin65 0:77e050d1fb12 78
dgriffin65 0:77e050d1fb12 79 // Set the IP
dgriffin65 0:77e050d1fb12 80 bool WIZnet_Chip::setip()
dgriffin65 0:77e050d1fb12 81 {
dgriffin65 0:77e050d1fb12 82 reg_wr<uint32_t>(SIPR, ip);
dgriffin65 0:77e050d1fb12 83 reg_wr<uint32_t>(GAR, gateway);
dgriffin65 0:77e050d1fb12 84 reg_wr<uint32_t>(SUBR, netmask);
dgriffin65 0:77e050d1fb12 85 return true;
dgriffin65 0:77e050d1fb12 86 }
dgriffin65 0:77e050d1fb12 87
dgriffin65 0:77e050d1fb12 88 bool WIZnet_Chip::setProtocol(int socket, Protocol p)
dgriffin65 0:77e050d1fb12 89 {
dgriffin65 0:77e050d1fb12 90 if (socket < 0) {
dgriffin65 0:77e050d1fb12 91 return false;
dgriffin65 0:77e050d1fb12 92 }
dgriffin65 0:77e050d1fb12 93 sreg<uint8_t>(socket, Sn_MR, p);
dgriffin65 0:77e050d1fb12 94 return true;
dgriffin65 0:77e050d1fb12 95 }
dgriffin65 0:77e050d1fb12 96
Bongjun 6:e2ab76b2be07 97 bool WIZnet_Chip::setLocalPort(int socket, uint16_t port)
Bongjun 6:e2ab76b2be07 98 {
Bongjun 6:e2ab76b2be07 99 if (socket < 0) {
Bongjun 6:e2ab76b2be07 100 return false;
Bongjun 6:e2ab76b2be07 101 }
Bongjun 6:e2ab76b2be07 102 sreg<uint16_t>(socket, Sn_PORT, port);
Bongjun 6:e2ab76b2be07 103 return true;
Bongjun 6:e2ab76b2be07 104 }
Bongjun 6:e2ab76b2be07 105
dgriffin65 0:77e050d1fb12 106 bool WIZnet_Chip::connect(int socket, const char * host, int port, int timeout_ms)
dgriffin65 0:77e050d1fb12 107 {
dgriffin65 0:77e050d1fb12 108 if (socket < 0) {
dgriffin65 0:77e050d1fb12 109 return false;
dgriffin65 0:77e050d1fb12 110 }
dgriffin65 0:77e050d1fb12 111 sreg<uint8_t>(socket, Sn_MR, TCP);
dgriffin65 0:77e050d1fb12 112 scmd(socket, OPEN);
dgriffin65 0:77e050d1fb12 113 sreg_ip(socket, Sn_DIPR, host);
dgriffin65 0:77e050d1fb12 114 sreg<uint16_t>(socket, Sn_DPORT, port);
dgriffin65 0:77e050d1fb12 115 sreg<uint16_t>(socket, Sn_PORT, new_port());
dgriffin65 0:77e050d1fb12 116 scmd(socket, CONNECT);
dgriffin65 0:77e050d1fb12 117 Timer t;
dgriffin65 0:77e050d1fb12 118 t.reset();
dgriffin65 0:77e050d1fb12 119 t.start();
dgriffin65 0:77e050d1fb12 120 while(!is_connected(socket)) {
Bongjun 11:5118c2bff025 121 if ((timeout_ms) && (t.read_ms() > timeout_ms)) {
dgriffin65 0:77e050d1fb12 122 return false;
dgriffin65 0:77e050d1fb12 123 }
dgriffin65 0:77e050d1fb12 124 }
dgriffin65 0:77e050d1fb12 125 return true;
dgriffin65 0:77e050d1fb12 126 }
dgriffin65 0:77e050d1fb12 127
dgriffin65 0:77e050d1fb12 128 bool WIZnet_Chip::disconnect()
dgriffin65 0:77e050d1fb12 129 {
dgriffin65 0:77e050d1fb12 130 return true;
dgriffin65 0:77e050d1fb12 131 }
dgriffin65 0:77e050d1fb12 132
dgriffin65 0:77e050d1fb12 133 bool WIZnet_Chip::is_connected(int socket)
dgriffin65 0:77e050d1fb12 134 {
dgriffin65 0:77e050d1fb12 135 uint8_t tmpSn_SR;
dgriffin65 0:77e050d1fb12 136 tmpSn_SR = sreg<uint8_t>(socket, Sn_SR);
dgriffin65 0:77e050d1fb12 137 // packet sending is possible, when state is SOCK_CLOSE_WAIT.
dgriffin65 0:77e050d1fb12 138 if ((tmpSn_SR == SOCK_ESTABLISHED) || (tmpSn_SR == SOCK_CLOSE_WAIT)) {
dgriffin65 0:77e050d1fb12 139 return true;
dgriffin65 0:77e050d1fb12 140 }
dgriffin65 0:77e050d1fb12 141 return false;
dgriffin65 0:77e050d1fb12 142 }
dgriffin65 0:77e050d1fb12 143
dgriffin65 0:77e050d1fb12 144 // Reset the chip & set the buffer
dgriffin65 0:77e050d1fb12 145 void WIZnet_Chip::reset()
dgriffin65 0:77e050d1fb12 146 {
Bongjun 6:e2ab76b2be07 147 // reset_pin = 1;
Bongjun 18:afec30f0922a 148 if(connected_reset_pin) {
Bongjun 18:afec30f0922a 149 reset_pin = 0;
Bongjun 18:afec30f0922a 150 wait_us(500); // 500us (w5500)
Bongjun 18:afec30f0922a 151 reset_pin = 1;
Bongjun 18:afec30f0922a 152 wait_ms(400); // 400ms (w5500)
Bongjun 18:afec30f0922a 153 }
dgriffin65 0:77e050d1fb12 154
dgriffin65 0:77e050d1fb12 155 #if defined(USE_WIZ550IO_MAC)
dgriffin65 0:77e050d1fb12 156 //reg_rd_mac(SHAR, mac); // read the MAC address inside the module
dgriffin65 0:77e050d1fb12 157 #endif
dgriffin65 0:77e050d1fb12 158 //reg_wr_mac(SHAR, mac);
Bongjun 18:afec30f0922a 159
dgriffin65 0:77e050d1fb12 160 // set RX and TX buffer size
dgriffin65 0:77e050d1fb12 161 for (int socket = 0; socket < MAX_SOCK_NUM; socket++) {
dgriffin65 0:77e050d1fb12 162 sreg<uint8_t>(socket, Sn_RXBUF_SIZE, 2);
dgriffin65 0:77e050d1fb12 163 sreg<uint8_t>(socket, Sn_TXBUF_SIZE, 2);
dgriffin65 0:77e050d1fb12 164 }
Bongjun 18:afec30f0922a 165
sgnezdov 2:06b6f9f7c071 166 reg_rd_mac(SHAR, mac); // read the MAC address inside the module
dgriffin65 0:77e050d1fb12 167 }
dgriffin65 0:77e050d1fb12 168
dgriffin65 0:77e050d1fb12 169
dgriffin65 0:77e050d1fb12 170 bool WIZnet_Chip::close(int socket)
dgriffin65 0:77e050d1fb12 171 {
dgriffin65 0:77e050d1fb12 172 if (socket < 0) {
dgriffin65 0:77e050d1fb12 173 return false;
dgriffin65 0:77e050d1fb12 174 }
dgriffin65 0:77e050d1fb12 175 // if not connected, return
dgriffin65 0:77e050d1fb12 176 if (sreg<uint8_t>(socket, Sn_SR) == SOCK_CLOSED) {
dgriffin65 0:77e050d1fb12 177 return true;
dgriffin65 0:77e050d1fb12 178 }
dgriffin65 0:77e050d1fb12 179 if (sreg<uint8_t>(socket, Sn_MR) == TCP) {
dgriffin65 0:77e050d1fb12 180 scmd(socket, DISCON);
dgriffin65 0:77e050d1fb12 181 }
dgriffin65 0:77e050d1fb12 182 scmd(socket, CLOSE);
dgriffin65 0:77e050d1fb12 183 sreg<uint8_t>(socket, Sn_IR, 0xff);
dgriffin65 0:77e050d1fb12 184 return true;
dgriffin65 0:77e050d1fb12 185 }
dgriffin65 0:77e050d1fb12 186
sgnezdov 4:80e302a610fd 187 bool WIZnet_Chip::is_closed(int socket)
sgnezdov 4:80e302a610fd 188 {
sgnezdov 4:80e302a610fd 189 if (sreg<uint8_t>(socket, Sn_SR) == SOCK_CLOSED) {
sgnezdov 4:80e302a610fd 190 return true;
sgnezdov 4:80e302a610fd 191 }
sgnezdov 4:80e302a610fd 192 return false;
sgnezdov 4:80e302a610fd 193 }
sgnezdov 4:80e302a610fd 194
dgriffin65 0:77e050d1fb12 195 int WIZnet_Chip::wait_readable(int socket, int wait_time_ms, int req_size)
dgriffin65 0:77e050d1fb12 196 {
dgriffin65 0:77e050d1fb12 197 if (socket < 0) {
dgriffin65 0:77e050d1fb12 198 return -1;
dgriffin65 0:77e050d1fb12 199 }
Bongjun 18:afec30f0922a 200
dgriffin65 0:77e050d1fb12 201 Timer t;
dgriffin65 0:77e050d1fb12 202 t.reset();
dgriffin65 0:77e050d1fb12 203 t.start();
dgriffin65 0:77e050d1fb12 204 while(1) {
dgriffin65 0:77e050d1fb12 205 //int size = sreg<uint16_t>(socket, Sn_RX_RSR);
dgriffin65 0:77e050d1fb12 206 int size1, size2;
dgriffin65 0:77e050d1fb12 207 // during the reading Sn_RX_RSR, it has the possible change of this register.
dgriffin65 0:77e050d1fb12 208 // so read twice and get same value then use size information.
dgriffin65 1:2dee44ea52a9 209 while (1) {
dgriffin65 0:77e050d1fb12 210 size1 = sreg<uint16_t>(socket, Sn_RX_RSR);
dgriffin65 0:77e050d1fb12 211 size2 = sreg<uint16_t>(socket, Sn_RX_RSR);
Bongjun 18:afec30f0922a 212
dgriffin65 1:2dee44ea52a9 213 if (size1 == size2) {
dgriffin65 1:2dee44ea52a9 214 break;
dgriffin65 1:2dee44ea52a9 215 }
Bongjun 18:afec30f0922a 216
dgriffin65 0:77e050d1fb12 217 if (wait_time_ms != (-1) && t.read_ms() > wait_time_ms) {
Bongjun 18:afec30f0922a 218 return NSAPI_ERROR_WOULD_BLOCK;
dgriffin65 0:77e050d1fb12 219 }
Bongjun 18:afec30f0922a 220
dgriffin65 1:2dee44ea52a9 221 if (!is_connected(socket)) {
dgriffin65 1:2dee44ea52a9 222 return -1;
dgriffin65 1:2dee44ea52a9 223 }
dgriffin65 1:2dee44ea52a9 224 }
dgriffin65 0:77e050d1fb12 225
dgriffin65 0:77e050d1fb12 226 if (size1 > req_size) {
dgriffin65 0:77e050d1fb12 227 return size1;
dgriffin65 0:77e050d1fb12 228 }
dgriffin65 0:77e050d1fb12 229 if (wait_time_ms != (-1) && t.read_ms() > wait_time_ms) {
dgriffin65 0:77e050d1fb12 230 break;
dgriffin65 0:77e050d1fb12 231 }
dgriffin65 0:77e050d1fb12 232 }
dgriffin65 0:77e050d1fb12 233 return NSAPI_ERROR_WOULD_BLOCK;
dgriffin65 0:77e050d1fb12 234 }
dgriffin65 0:77e050d1fb12 235
dgriffin65 0:77e050d1fb12 236 int WIZnet_Chip::wait_writeable(int socket, int wait_time_ms, int req_size)
dgriffin65 0:77e050d1fb12 237 {
dgriffin65 0:77e050d1fb12 238 if (socket < 0) {
dgriffin65 0:77e050d1fb12 239 return -1;
dgriffin65 0:77e050d1fb12 240 }
dgriffin65 0:77e050d1fb12 241 Timer t;
dgriffin65 0:77e050d1fb12 242 t.reset();
dgriffin65 0:77e050d1fb12 243 t.start();
Bongjun 6:e2ab76b2be07 244 t.start();
Bongjun 18:afec30f0922a 245
dgriffin65 0:77e050d1fb12 246 while(1) {
dgriffin65 0:77e050d1fb12 247 //int size = sreg<uint16_t>(socket, Sn_TX_FSR);
dgriffin65 0:77e050d1fb12 248 int size1, size2;
dgriffin65 0:77e050d1fb12 249 // during the reading Sn_TX_FSR, it has the possible change of this register.
dgriffin65 0:77e050d1fb12 250 // so read twice and get same value then use size information.
dgriffin65 0:77e050d1fb12 251 do {
dgriffin65 0:77e050d1fb12 252 size1 = sreg<uint16_t>(socket, Sn_TX_FSR);
dgriffin65 0:77e050d1fb12 253 size2 = sreg<uint16_t>(socket, Sn_TX_FSR);
Bongjun 6:e2ab76b2be07 254 DBG("The time taken was %d %d %f seconds\n", wait_time_ms, t.read_ms(), t.read());
Bongjun 18:afec30f0922a 255
dgriffin65 0:77e050d1fb12 256 if (wait_time_ms != (-1) && t.read_ms() > wait_time_ms) {
Bongjun 18:afec30f0922a 257
dgriffin65 0:77e050d1fb12 258 return NSAPI_ERROR_WOULD_BLOCK;
Bongjun 18:afec30f0922a 259 }
dgriffin65 0:77e050d1fb12 260 } while (size1 != size2);
dgriffin65 0:77e050d1fb12 261 if (size1 > req_size) {
dgriffin65 0:77e050d1fb12 262 return size1;
dgriffin65 0:77e050d1fb12 263 }
dgriffin65 0:77e050d1fb12 264 if (wait_time_ms != (-1) && t.read_ms() > wait_time_ms) {
dgriffin65 0:77e050d1fb12 265 break;
dgriffin65 0:77e050d1fb12 266 }
dgriffin65 0:77e050d1fb12 267 }
dgriffin65 0:77e050d1fb12 268 return NSAPI_ERROR_WOULD_BLOCK;
dgriffin65 0:77e050d1fb12 269 }
dgriffin65 0:77e050d1fb12 270
dgriffin65 0:77e050d1fb12 271 int WIZnet_Chip::send(int socket, const char * str, int len)
dgriffin65 0:77e050d1fb12 272 {
dgriffin65 0:77e050d1fb12 273 if (socket < 0) {
dgriffin65 0:77e050d1fb12 274 return -1;
dgriffin65 0:77e050d1fb12 275 }
dgriffin65 0:77e050d1fb12 276 uint16_t ptr = sreg<uint16_t>(socket, Sn_TX_WR);
dgriffin65 0:77e050d1fb12 277 uint8_t cntl_byte = (0x14 + (socket << 5));
dgriffin65 0:77e050d1fb12 278 spi_write(ptr, cntl_byte, (uint8_t*)str, len);
dgriffin65 0:77e050d1fb12 279 sreg<uint16_t>(socket, Sn_TX_WR, ptr + len);
dgriffin65 0:77e050d1fb12 280 scmd(socket, SEND);
dgriffin65 0:77e050d1fb12 281 uint8_t tmp_Sn_IR;
dgriffin65 0:77e050d1fb12 282 while (( (tmp_Sn_IR = sreg<uint8_t>(socket, Sn_IR)) & INT_SEND_OK) != INT_SEND_OK) {
dgriffin65 0:77e050d1fb12 283 // @Jul.10, 2014 fix contant name, and udp sendto function.
dgriffin65 0:77e050d1fb12 284 switch (sreg<uint8_t>(socket, Sn_SR)) {
dgriffin65 0:77e050d1fb12 285 case SOCK_CLOSED :
dgriffin65 0:77e050d1fb12 286 close(socket);
dgriffin65 0:77e050d1fb12 287 return 0;
dgriffin65 0:77e050d1fb12 288 //break;
dgriffin65 0:77e050d1fb12 289 case SOCK_UDP :
dgriffin65 0:77e050d1fb12 290 // ARP timeout is possible.
dgriffin65 0:77e050d1fb12 291 if ((tmp_Sn_IR & INT_TIMEOUT) == INT_TIMEOUT) {
dgriffin65 0:77e050d1fb12 292 sreg<uint8_t>(socket, Sn_IR, INT_TIMEOUT);
dgriffin65 0:77e050d1fb12 293 return 0;
dgriffin65 0:77e050d1fb12 294 }
dgriffin65 0:77e050d1fb12 295 break;
dgriffin65 0:77e050d1fb12 296 default :
dgriffin65 0:77e050d1fb12 297 break;
dgriffin65 0:77e050d1fb12 298 }
dgriffin65 0:77e050d1fb12 299 }
dgriffin65 0:77e050d1fb12 300 sreg<uint8_t>(socket, Sn_IR, INT_SEND_OK);
dgriffin65 0:77e050d1fb12 301
dgriffin65 0:77e050d1fb12 302 return len;
dgriffin65 0:77e050d1fb12 303 }
dgriffin65 0:77e050d1fb12 304
dgriffin65 0:77e050d1fb12 305 int WIZnet_Chip::recv(int socket, char* buf, int len)
dgriffin65 0:77e050d1fb12 306 {
dgriffin65 0:77e050d1fb12 307 if (socket < 0) {
dgriffin65 0:77e050d1fb12 308 return -1;
dgriffin65 0:77e050d1fb12 309 }
dgriffin65 0:77e050d1fb12 310 uint16_t ptr = sreg<uint16_t>(socket, Sn_RX_RD);
dgriffin65 0:77e050d1fb12 311 uint8_t cntl_byte = (0x18 + (socket << 5));
dgriffin65 0:77e050d1fb12 312 spi_read(ptr, cntl_byte, (uint8_t*)buf, len);
dgriffin65 0:77e050d1fb12 313 sreg<uint16_t>(socket, Sn_RX_RD, ptr + len);
dgriffin65 0:77e050d1fb12 314 scmd(socket, RECV);
dgriffin65 0:77e050d1fb12 315 return len;
dgriffin65 0:77e050d1fb12 316 }
dgriffin65 0:77e050d1fb12 317
dgriffin65 0:77e050d1fb12 318 int WIZnet_Chip::new_socket()
dgriffin65 0:77e050d1fb12 319 {
dgriffin65 0:77e050d1fb12 320 for(int s = 0; s < MAX_SOCK_NUM; s++) {
dgriffin65 0:77e050d1fb12 321 if (sreg<uint8_t>(s, Sn_SR) == SOCK_CLOSED) {
dgriffin65 0:77e050d1fb12 322 return s;
dgriffin65 0:77e050d1fb12 323 }
dgriffin65 0:77e050d1fb12 324 }
dgriffin65 0:77e050d1fb12 325 return -1;
dgriffin65 0:77e050d1fb12 326 }
dgriffin65 0:77e050d1fb12 327
dgriffin65 0:77e050d1fb12 328 uint16_t WIZnet_Chip::new_port()
dgriffin65 0:77e050d1fb12 329 {
dgriffin65 0:77e050d1fb12 330 uint16_t port = rand();
dgriffin65 0:77e050d1fb12 331 port |= 49152;
dgriffin65 0:77e050d1fb12 332 return port;
dgriffin65 0:77e050d1fb12 333 }
dgriffin65 0:77e050d1fb12 334
dgriffin65 0:77e050d1fb12 335 void WIZnet_Chip::scmd(int socket, Command cmd)
dgriffin65 0:77e050d1fb12 336 {
dgriffin65 0:77e050d1fb12 337 sreg<uint8_t>(socket, Sn_CR, cmd);
dgriffin65 0:77e050d1fb12 338 while(sreg<uint8_t>(socket, Sn_CR));
dgriffin65 0:77e050d1fb12 339 }
dgriffin65 0:77e050d1fb12 340
dgriffin65 0:77e050d1fb12 341 void WIZnet_Chip::spi_write(uint16_t addr, uint8_t cb, const uint8_t *buf, uint16_t len)
dgriffin65 0:77e050d1fb12 342 {
dgriffin65 1:2dee44ea52a9 343 spi->lock();
dgriffin65 0:77e050d1fb12 344 cs = 0;
dgriffin65 0:77e050d1fb12 345 spi->write(addr >> 8);
dgriffin65 0:77e050d1fb12 346 spi->write(addr & 0xff);
dgriffin65 0:77e050d1fb12 347 spi->write(cb);
dgriffin65 0:77e050d1fb12 348 for(int i = 0; i < len; i++) {
dgriffin65 0:77e050d1fb12 349 spi->write(buf[i]);
dgriffin65 0:77e050d1fb12 350 }
dgriffin65 0:77e050d1fb12 351 cs = 1;
dgriffin65 0:77e050d1fb12 352
dgriffin65 0:77e050d1fb12 353 #if DBG_SPI
dgriffin65 0:77e050d1fb12 354 debug("[SPI]W %04x(%02x %d)", addr, cb, len);
dgriffin65 0:77e050d1fb12 355 for(int i = 0; i < len; i++) {
dgriffin65 0:77e050d1fb12 356 debug(" %02x", buf[i]);
sgnezdov 3:61ff27ed8355 357 if (i > 16) {
sgnezdov 3:61ff27ed8355 358 debug(" ...");
sgnezdov 3:61ff27ed8355 359 break;
dgriffin65 0:77e050d1fb12 360 }
dgriffin65 0:77e050d1fb12 361 }
dgriffin65 0:77e050d1fb12 362 debug("\r\n");
dgriffin65 0:77e050d1fb12 363 #endif
dgriffin65 1:2dee44ea52a9 364 spi->unlock();
dgriffin65 1:2dee44ea52a9 365
dgriffin65 0:77e050d1fb12 366 }
dgriffin65 0:77e050d1fb12 367
dgriffin65 0:77e050d1fb12 368 void WIZnet_Chip::spi_read(uint16_t addr, uint8_t cb, uint8_t *buf, uint16_t len)
dgriffin65 0:77e050d1fb12 369 {
dgriffin65 1:2dee44ea52a9 370 spi->lock();
dgriffin65 0:77e050d1fb12 371 cs = 0;
dgriffin65 0:77e050d1fb12 372 spi->write(addr >> 8);
dgriffin65 0:77e050d1fb12 373 spi->write(addr & 0xff);
dgriffin65 0:77e050d1fb12 374 spi->write(cb);
dgriffin65 0:77e050d1fb12 375 for(int i = 0; i < len; i++) {
dgriffin65 0:77e050d1fb12 376 buf[i] = spi->write(0);
dgriffin65 0:77e050d1fb12 377 }
dgriffin65 0:77e050d1fb12 378 cs = 1;
dgriffin65 0:77e050d1fb12 379
dgriffin65 0:77e050d1fb12 380 #if DBG_SPI
dgriffin65 0:77e050d1fb12 381 debug("[SPI]R %04x(%02x %d)", addr, cb, len);
dgriffin65 0:77e050d1fb12 382 for(int i = 0; i < len; i++) {
dgriffin65 0:77e050d1fb12 383 debug(" %02x", buf[i]);
sgnezdov 3:61ff27ed8355 384 if (i > 16) {
sgnezdov 3:61ff27ed8355 385 debug(" ...");
sgnezdov 3:61ff27ed8355 386 break;
dgriffin65 0:77e050d1fb12 387 }
dgriffin65 0:77e050d1fb12 388 }
dgriffin65 0:77e050d1fb12 389 debug("\r\n");
dgriffin65 0:77e050d1fb12 390 if ((addr&0xf0ff)==0x4026 || (addr&0xf0ff)==0x4003) {
dgriffin65 0:77e050d1fb12 391 wait_ms(200);
dgriffin65 0:77e050d1fb12 392 }
dgriffin65 0:77e050d1fb12 393 #endif
dgriffin65 1:2dee44ea52a9 394 spi->unlock();
dgriffin65 0:77e050d1fb12 395 }
Bongjun 17:60f75e78f35d 396 /*
dgriffin65 0:77e050d1fb12 397 void printfBytes(char* str, uint8_t* buf, int len)
dgriffin65 0:77e050d1fb12 398 {
dgriffin65 0:77e050d1fb12 399 printf("%s %d:", str, len);
dgriffin65 0:77e050d1fb12 400 for(int i = 0; i < len; i++) {
dgriffin65 0:77e050d1fb12 401 printf(" %02x", buf[i]);
dgriffin65 0:77e050d1fb12 402 }
dgriffin65 0:77e050d1fb12 403 printf("\n");
dgriffin65 0:77e050d1fb12 404 }
dgriffin65 0:77e050d1fb12 405
dgriffin65 0:77e050d1fb12 406 void printHex(uint8_t* buf, int len)
dgriffin65 0:77e050d1fb12 407 {
dgriffin65 0:77e050d1fb12 408 for(int i = 0; i < len; i++) {
dgriffin65 0:77e050d1fb12 409 if ((i%16) == 0) {
dgriffin65 0:77e050d1fb12 410 printf("%p", buf+i);
dgriffin65 0:77e050d1fb12 411 }
dgriffin65 0:77e050d1fb12 412 printf(" %02x", buf[i]);
dgriffin65 0:77e050d1fb12 413 if ((i%16) == 15) {
dgriffin65 0:77e050d1fb12 414 printf("\n");
dgriffin65 0:77e050d1fb12 415 }
dgriffin65 0:77e050d1fb12 416 }
dgriffin65 0:77e050d1fb12 417 printf("\n");
dgriffin65 0:77e050d1fb12 418 }
dgriffin65 0:77e050d1fb12 419
dgriffin65 0:77e050d1fb12 420 void debug_hex(uint8_t* buf, int len)
dgriffin65 0:77e050d1fb12 421 {
dgriffin65 0:77e050d1fb12 422 for(int i = 0; i < len; i++) {
dgriffin65 0:77e050d1fb12 423 if ((i%16) == 0) {
dgriffin65 0:77e050d1fb12 424 debug("%p", buf+i);
dgriffin65 0:77e050d1fb12 425 }
dgriffin65 0:77e050d1fb12 426 debug(" %02x", buf[i]);
dgriffin65 0:77e050d1fb12 427 if ((i%16) == 15) {
dgriffin65 0:77e050d1fb12 428 debug("\n");
dgriffin65 0:77e050d1fb12 429 }
dgriffin65 0:77e050d1fb12 430 }
dgriffin65 0:77e050d1fb12 431 debug("\n");
dgriffin65 0:77e050d1fb12 432 }
Bongjun 17:60f75e78f35d 433 */
dgriffin65 0:77e050d1fb12 434 #endif