Patrick Bader
A simple library to access the DMA functionality.
SimpleDMA_KL25.h@6:e9ab0bb912c8, 2014-03-18 (annotated)
- Committer:
- BaderP
- Date:
- Tue Mar 18 12:44:46 2014 +0000
- Revision:
- 6:e9ab0bb912c8
- Parent:
- 5:d9f46ef80e20
patched SimpleDMA to include additional 32 kb ram
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Sissors | 0:d77ea45fa625 | 1 | #ifdef TARGET_KL25Z |
| Sissors | 0:d77ea45fa625 | 2 | |
| Sissors | 3:34f5bf8adfa0 | 3 | #define DMA_CHANNELS 4 |
| Sissors | 5:d9f46ef80e20 | 4 | #define DMA_IRQS 4 |
| Sissors | 3:34f5bf8adfa0 | 5 | |
| Sissors | 0:d77ea45fa625 | 6 | enum SimpleDMA_Trigger { |
| Sissors | 0:d77ea45fa625 | 7 | Trigger_ALWAYS = 60, |
| Sissors | 0:d77ea45fa625 | 8 | Trigger_UART0_RX = 2, |
| Sissors | 0:d77ea45fa625 | 9 | Trigger_UART0_TX, |
| Sissors | 0:d77ea45fa625 | 10 | Trigger_UART1_RX, |
| Sissors | 0:d77ea45fa625 | 11 | Trigger_UART1_TX, |
| Sissors | 0:d77ea45fa625 | 12 | Trigger_UART2_RX, |
| Sissors | 0:d77ea45fa625 | 13 | Trigger_UART2_TX, |
| Sissors | 0:d77ea45fa625 | 14 | Trigger_SPI0_RX = 16, |
| Sissors | 0:d77ea45fa625 | 15 | Trigger_SPI0_TX, |
| Sissors | 0:d77ea45fa625 | 16 | Trigger_SPI1_RX, |
| Sissors | 0:d77ea45fa625 | 17 | Trigger_SPI1_TX, |
| Sissors | 0:d77ea45fa625 | 18 | Trigger_I2C0 = 22, |
| Sissors | 0:d77ea45fa625 | 19 | Trigger_I2C1, |
| Sissors | 0:d77ea45fa625 | 20 | Trigger_TPM0_C0, |
| Sissors | 0:d77ea45fa625 | 21 | Trigger_TPM0_C1, |
| Sissors | 0:d77ea45fa625 | 22 | Trigger_TPM0_C2, |
| Sissors | 0:d77ea45fa625 | 23 | Trigger_TPM0_C3, |
| Sissors | 0:d77ea45fa625 | 24 | Trigger_TPM0_C4, |
| Sissors | 0:d77ea45fa625 | 25 | Trigger_TPM0_C5, |
| Sissors | 0:d77ea45fa625 | 26 | Trigger_TPM1_C0 = 32, |
| Sissors | 0:d77ea45fa625 | 27 | Trigger_TPM1_C1, |
| Sissors | 0:d77ea45fa625 | 28 | Trigger_TPM2_C0, |
| Sissors | 0:d77ea45fa625 | 29 | Trigger_TPM2_C1, |
| Sissors | 0:d77ea45fa625 | 30 | Trigger_ADC0 = 40, |
| Sissors | 0:d77ea45fa625 | 31 | Trigger_CMP0 = 42, |
| Sissors | 0:d77ea45fa625 | 32 | Trigger_DAC0 = 45, |
| Sissors | 0:d77ea45fa625 | 33 | Trigger_PORTA = 49, |
| Sissors | 0:d77ea45fa625 | 34 | Trigger_PORTD = 52, |
| Sissors | 0:d77ea45fa625 | 35 | Trigger_TPM0 = 54, |
| Sissors | 0:d77ea45fa625 | 36 | Trigger_TPM1, |
| Sissors | 0:d77ea45fa625 | 37 | Trigger_TPM2, |
| Sissors | 0:d77ea45fa625 | 38 | Trigger_TSI, |
| Sissors | 0:d77ea45fa625 | 39 | Trigger_ALWAYS0 = 60, |
| Sissors | 0:d77ea45fa625 | 40 | Trigger_ALWAYS1, |
| Sissors | 0:d77ea45fa625 | 41 | Trigger_ALWAYS2, |
| Sissors | 0:d77ea45fa625 | 42 | Trigger_ALWAYS3, |
| Sissors | 0:d77ea45fa625 | 43 | }; |
| Sissors | 0:d77ea45fa625 | 44 | |
| Sissors | 0:d77ea45fa625 | 45 | #endif |