Andy A / USBDevice

USB device stack - Added support for the logo/windows key to USB keyboard.

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USBDevice/USBHAL_LPC17.cpp@3:6d85e04fb59f, 2012-10-14 (annotated)

Committer:
samux
Date:
Sun Oct 14 12:38:56 2012 +0000
Revision:
3:6d85e04fb59f
Parent:
1:80ab0d068708
Child:
8:335f2506f422
move EnableIRQ to connect() - add MEDIA_REMOVAL handling

Who changed what in which revision?

UserRevisionLine numberNew contents of line
samux 1:80ab0d068708 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
samux 1:80ab0d068708 2 *
samux 1:80ab0d068708 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
samux 1:80ab0d068708 4 * and associated documentation files (the "Software"), to deal in the Software without
samux 1:80ab0d068708 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
samux 1:80ab0d068708 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
samux 1:80ab0d068708 7 * Software is furnished to do so, subject to the following conditions:
samux 1:80ab0d068708 8 *
samux 1:80ab0d068708 9 * The above copyright notice and this permission notice shall be included in all copies or
samux 1:80ab0d068708 10 * substantial portions of the Software.
samux 1:80ab0d068708 11 *
samux 1:80ab0d068708 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
samux 1:80ab0d068708 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
samux 1:80ab0d068708 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
samux 1:80ab0d068708 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 1:80ab0d068708 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
samux 1:80ab0d068708 17 */
samux 1:80ab0d068708 18
samux 1:80ab0d068708 19 #ifdef TARGET_LPC1768
samux 1:80ab0d068708 20
samux 1:80ab0d068708 21 #include "USBHAL.h"
samux 1:80ab0d068708 22
samux 1:80ab0d068708 23
samux 1:80ab0d068708 24 // Get endpoint direction
samux 1:80ab0d068708 25 #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
samux 1:80ab0d068708 26 #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
samux 1:80ab0d068708 27
samux 1:80ab0d068708 28 // Convert physical endpoint number to register bit
samux 1:80ab0d068708 29 #define EP(endpoint) (1UL<<endpoint)
samux 1:80ab0d068708 30
samux 1:80ab0d068708 31 // Power Control for Peripherals register
samux 1:80ab0d068708 32 #define PCUSB (1UL<<31)
samux 1:80ab0d068708 33
samux 1:80ab0d068708 34 // USB Clock Control register
samux 1:80ab0d068708 35 #define DEV_CLK_EN (1UL<<1)
samux 1:80ab0d068708 36 #define AHB_CLK_EN (1UL<<4)
samux 1:80ab0d068708 37
samux 1:80ab0d068708 38 // USB Clock Status register
samux 1:80ab0d068708 39 #define DEV_CLK_ON (1UL<<1)
samux 1:80ab0d068708 40 #define AHB_CLK_ON (1UL<<4)
samux 1:80ab0d068708 41
samux 1:80ab0d068708 42 // USB Device Interupt registers
samux 1:80ab0d068708 43 #define FRAME (1UL<<0)
samux 1:80ab0d068708 44 #define EP_FAST (1UL<<1)
samux 1:80ab0d068708 45 #define EP_SLOW (1UL<<2)
samux 1:80ab0d068708 46 #define DEV_STAT (1UL<<3)
samux 1:80ab0d068708 47 #define CCEMPTY (1UL<<4)
samux 1:80ab0d068708 48 #define CDFULL (1UL<<5)
samux 1:80ab0d068708 49 #define RxENDPKT (1UL<<6)
samux 1:80ab0d068708 50 #define TxENDPKT (1UL<<7)
samux 1:80ab0d068708 51 #define EP_RLZED (1UL<<8)
samux 1:80ab0d068708 52 #define ERR_INT (1UL<<9)
samux 1:80ab0d068708 53
samux 1:80ab0d068708 54 // USB Control register
samux 1:80ab0d068708 55 #define RD_EN (1<<0)
samux 1:80ab0d068708 56 #define WR_EN (1<<1)
samux 1:80ab0d068708 57 #define LOG_ENDPOINT(endpoint) ((endpoint>>1)<<2)
samux 1:80ab0d068708 58
samux 1:80ab0d068708 59 // USB Receive Packet Length register
samux 1:80ab0d068708 60 #define DV (1UL<<10)
samux 1:80ab0d068708 61 #define PKT_RDY (1UL<<11)
samux 1:80ab0d068708 62 #define PKT_LNGTH_MASK (0x3ff)
samux 1:80ab0d068708 63
samux 1:80ab0d068708 64 // Serial Interface Engine (SIE)
samux 1:80ab0d068708 65 #define SIE_WRITE (0x01)
samux 1:80ab0d068708 66 #define SIE_READ (0x02)
samux 1:80ab0d068708 67 #define SIE_COMMAND (0x05)
samux 1:80ab0d068708 68 #define SIE_CMD_CODE(phase, data) ((phase<<8)|(data<<16))
samux 1:80ab0d068708 69
samux 1:80ab0d068708 70 // SIE Command codes
samux 1:80ab0d068708 71 #define SIE_CMD_SET_ADDRESS (0xD0)
samux 1:80ab0d068708 72 #define SIE_CMD_CONFIGURE_DEVICE (0xD8)
samux 1:80ab0d068708 73 #define SIE_CMD_SET_MODE (0xF3)
samux 1:80ab0d068708 74 #define SIE_CMD_READ_FRAME_NUMBER (0xF5)
samux 1:80ab0d068708 75 #define SIE_CMD_READ_TEST_REGISTER (0xFD)
samux 1:80ab0d068708 76 #define SIE_CMD_SET_DEVICE_STATUS (0xFE)
samux 1:80ab0d068708 77 #define SIE_CMD_GET_DEVICE_STATUS (0xFE)
samux 1:80ab0d068708 78 #define SIE_CMD_GET_ERROR_CODE (0xFF)
samux 1:80ab0d068708 79 #define SIE_CMD_READ_ERROR_STATUS (0xFB)
samux 1:80ab0d068708 80
samux 1:80ab0d068708 81 #define SIE_CMD_SELECT_ENDPOINT(endpoint) (0x00+endpoint)
samux 1:80ab0d068708 82 #define SIE_CMD_SELECT_ENDPOINT_CLEAR_INTERRUPT(endpoint) (0x40+endpoint)
samux 1:80ab0d068708 83 #define SIE_CMD_SET_ENDPOINT_STATUS(endpoint) (0x40+endpoint)
samux 1:80ab0d068708 84
samux 1:80ab0d068708 85 #define SIE_CMD_CLEAR_BUFFER (0xF2)
samux 1:80ab0d068708 86 #define SIE_CMD_VALIDATE_BUFFER (0xFA)
samux 1:80ab0d068708 87
samux 1:80ab0d068708 88 // SIE Device Status register
samux 1:80ab0d068708 89 #define SIE_DS_CON (1<<0)
samux 1:80ab0d068708 90 #define SIE_DS_CON_CH (1<<1)
samux 1:80ab0d068708 91 #define SIE_DS_SUS (1<<2)
samux 1:80ab0d068708 92 #define SIE_DS_SUS_CH (1<<3)
samux 1:80ab0d068708 93 #define SIE_DS_RST (1<<4)
samux 1:80ab0d068708 94
samux 1:80ab0d068708 95 // SIE Device Set Address register
samux 1:80ab0d068708 96 #define SIE_DSA_DEV_EN (1<<7)
samux 1:80ab0d068708 97
samux 1:80ab0d068708 98 // SIE Configue Device register
samux 1:80ab0d068708 99 #define SIE_CONF_DEVICE (1<<0)
samux 1:80ab0d068708 100
samux 1:80ab0d068708 101 // Select Endpoint register
samux 1:80ab0d068708 102 #define SIE_SE_FE (1<<0)
samux 1:80ab0d068708 103 #define SIE_SE_ST (1<<1)
samux 1:80ab0d068708 104 #define SIE_SE_STP (1<<2)
samux 1:80ab0d068708 105 #define SIE_SE_PO (1<<3)
samux 1:80ab0d068708 106 #define SIE_SE_EPN (1<<4)
samux 1:80ab0d068708 107 #define SIE_SE_B_1_FULL (1<<5)
samux 1:80ab0d068708 108 #define SIE_SE_B_2_FULL (1<<6)
samux 1:80ab0d068708 109
samux 1:80ab0d068708 110 // Set Endpoint Status command
samux 1:80ab0d068708 111 #define SIE_SES_ST (1<<0)
samux 1:80ab0d068708 112 #define SIE_SES_DA (1<<5)
samux 1:80ab0d068708 113 #define SIE_SES_RF_MO (1<<6)
samux 1:80ab0d068708 114 #define SIE_SES_CND_ST (1<<7)
samux 1:80ab0d068708 115
samux 1:80ab0d068708 116
samux 1:80ab0d068708 117 USBHAL * USBHAL::instance;
samux 1:80ab0d068708 118
samux 1:80ab0d068708 119 volatile int epComplete;
samux 1:80ab0d068708 120 uint32_t endpointStallState;
samux 1:80ab0d068708 121
samux 1:80ab0d068708 122 static void SIECommand(uint32_t command) {
samux 1:80ab0d068708 123 // The command phase of a SIE transaction
samux 1:80ab0d068708 124 LPC_USB->USBDevIntClr = CCEMPTY;
samux 1:80ab0d068708 125 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_COMMAND, command);
samux 1:80ab0d068708 126 while (!(LPC_USB->USBDevIntSt & CCEMPTY));
samux 1:80ab0d068708 127 }
samux 1:80ab0d068708 128
samux 1:80ab0d068708 129 static void SIEWriteData(uint8_t data) {
samux 1:80ab0d068708 130 // The data write phase of a SIE transaction
samux 1:80ab0d068708 131 LPC_USB->USBDevIntClr = CCEMPTY;
samux 1:80ab0d068708 132 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_WRITE, data);
samux 1:80ab0d068708 133 while (!(LPC_USB->USBDevIntSt & CCEMPTY));
samux 1:80ab0d068708 134 }
samux 1:80ab0d068708 135
samux 1:80ab0d068708 136 static uint8_t SIEReadData(uint32_t command) {
samux 1:80ab0d068708 137 // The data read phase of a SIE transaction
samux 1:80ab0d068708 138 LPC_USB->USBDevIntClr = CDFULL;
samux 1:80ab0d068708 139 LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_READ, command);
samux 1:80ab0d068708 140 while (!(LPC_USB->USBDevIntSt & CDFULL));
samux 1:80ab0d068708 141 return (uint8_t)LPC_USB->USBCmdData;
samux 1:80ab0d068708 142 }
samux 1:80ab0d068708 143
samux 1:80ab0d068708 144 static void SIEsetDeviceStatus(uint8_t status) {
samux 1:80ab0d068708 145 // Write SIE device status register
samux 1:80ab0d068708 146 SIECommand(SIE_CMD_SET_DEVICE_STATUS);
samux 1:80ab0d068708 147 SIEWriteData(status);
samux 1:80ab0d068708 148 }
samux 1:80ab0d068708 149
samux 1:80ab0d068708 150 static uint8_t SIEgetDeviceStatus(void) {
samux 1:80ab0d068708 151 // Read SIE device status register
samux 1:80ab0d068708 152 SIECommand(SIE_CMD_GET_DEVICE_STATUS);
samux 1:80ab0d068708 153 return SIEReadData(SIE_CMD_GET_DEVICE_STATUS);
samux 1:80ab0d068708 154 }
samux 1:80ab0d068708 155
samux 1:80ab0d068708 156 void SIEsetAddress(uint8_t address) {
samux 1:80ab0d068708 157 // Write SIE device address register
samux 1:80ab0d068708 158 SIECommand(SIE_CMD_SET_ADDRESS);
samux 1:80ab0d068708 159 SIEWriteData((address & 0x7f) | SIE_DSA_DEV_EN);
samux 1:80ab0d068708 160 }
samux 1:80ab0d068708 161
samux 1:80ab0d068708 162 static uint8_t SIEselectEndpoint(uint8_t endpoint) {
samux 1:80ab0d068708 163 // SIE select endpoint command
samux 1:80ab0d068708 164 SIECommand(SIE_CMD_SELECT_ENDPOINT(endpoint));
samux 1:80ab0d068708 165 return SIEReadData(SIE_CMD_SELECT_ENDPOINT(endpoint));
samux 1:80ab0d068708 166 }
samux 1:80ab0d068708 167
samux 1:80ab0d068708 168 static uint8_t SIEclearBuffer(void) {
samux 1:80ab0d068708 169 // SIE clear buffer command
samux 1:80ab0d068708 170 SIECommand(SIE_CMD_CLEAR_BUFFER);
samux 1:80ab0d068708 171 return SIEReadData(SIE_CMD_CLEAR_BUFFER);
samux 1:80ab0d068708 172 }
samux 1:80ab0d068708 173
samux 1:80ab0d068708 174 static void SIEvalidateBuffer(void) {
samux 1:80ab0d068708 175 // SIE validate buffer command
samux 1:80ab0d068708 176 SIECommand(SIE_CMD_VALIDATE_BUFFER);
samux 1:80ab0d068708 177 }
samux 1:80ab0d068708 178
samux 1:80ab0d068708 179 static void SIEsetEndpointStatus(uint8_t endpoint, uint8_t status) {
samux 1:80ab0d068708 180 // SIE set endpoint status command
samux 1:80ab0d068708 181 SIECommand(SIE_CMD_SET_ENDPOINT_STATUS(endpoint));
samux 1:80ab0d068708 182 SIEWriteData(status);
samux 1:80ab0d068708 183 }
samux 1:80ab0d068708 184
samux 1:80ab0d068708 185 static uint16_t SIEgetFrameNumber(void) __attribute__ ((unused));
samux 1:80ab0d068708 186 static uint16_t SIEgetFrameNumber(void) {
samux 1:80ab0d068708 187 // Read current frame number
samux 1:80ab0d068708 188 uint16_t lowByte;
samux 1:80ab0d068708 189 uint16_t highByte;
samux 1:80ab0d068708 190
samux 1:80ab0d068708 191 SIECommand(SIE_CMD_READ_FRAME_NUMBER);
samux 1:80ab0d068708 192 lowByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER);
samux 1:80ab0d068708 193 highByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER);
samux 1:80ab0d068708 194
samux 1:80ab0d068708 195 return (highByte << 8) | lowByte;
samux 1:80ab0d068708 196 }
samux 1:80ab0d068708 197
samux 1:80ab0d068708 198 static void SIEconfigureDevice(void) {
samux 1:80ab0d068708 199 // SIE Configure device command
samux 1:80ab0d068708 200 SIECommand(SIE_CMD_CONFIGURE_DEVICE);
samux 1:80ab0d068708 201 SIEWriteData(SIE_CONF_DEVICE);
samux 1:80ab0d068708 202 }
samux 1:80ab0d068708 203
samux 1:80ab0d068708 204 static void SIEunconfigureDevice(void) {
samux 1:80ab0d068708 205 // SIE Configure device command
samux 1:80ab0d068708 206 SIECommand(SIE_CMD_CONFIGURE_DEVICE);
samux 1:80ab0d068708 207 SIEWriteData(0);
samux 1:80ab0d068708 208 }
samux 1:80ab0d068708 209
samux 1:80ab0d068708 210 static void SIEconnect(void) {
samux 1:80ab0d068708 211 // Connect USB device
samux 1:80ab0d068708 212 uint8_t status;
samux 1:80ab0d068708 213
samux 1:80ab0d068708 214 status = SIEgetDeviceStatus();
samux 1:80ab0d068708 215 SIEsetDeviceStatus(status | SIE_DS_CON);
samux 1:80ab0d068708 216 }
samux 1:80ab0d068708 217
samux 1:80ab0d068708 218
samux 1:80ab0d068708 219 static void SIEdisconnect(void) {
samux 1:80ab0d068708 220 // Disconnect USB device
samux 1:80ab0d068708 221 uint8_t status;
samux 1:80ab0d068708 222
samux 1:80ab0d068708 223 status = SIEgetDeviceStatus();
samux 1:80ab0d068708 224 SIEsetDeviceStatus(status & ~SIE_DS_CON);
samux 1:80ab0d068708 225 }
samux 1:80ab0d068708 226
samux 1:80ab0d068708 227
samux 1:80ab0d068708 228 static uint8_t selectEndpointClearInterrupt(uint8_t endpoint) {
samux 1:80ab0d068708 229 // Implemented using using EP_INT_CLR.
samux 1:80ab0d068708 230 LPC_USB->USBEpIntClr = EP(endpoint);
samux 1:80ab0d068708 231 while (!(LPC_USB->USBDevIntSt & CDFULL));
samux 1:80ab0d068708 232 return (uint8_t)LPC_USB->USBCmdData;
samux 1:80ab0d068708 233 }
samux 1:80ab0d068708 234
samux 1:80ab0d068708 235
samux 1:80ab0d068708 236
samux 1:80ab0d068708 237
samux 1:80ab0d068708 238
samux 1:80ab0d068708 239 static void enableEndpointEvent(uint8_t endpoint) {
samux 1:80ab0d068708 240 // Enable an endpoint interrupt
samux 1:80ab0d068708 241 LPC_USB->USBEpIntEn |= EP(endpoint);
samux 1:80ab0d068708 242 }
samux 1:80ab0d068708 243
samux 1:80ab0d068708 244 static void disableEndpointEvent(uint8_t endpoint) __attribute__ ((unused));
samux 1:80ab0d068708 245 static void disableEndpointEvent(uint8_t endpoint) {
samux 1:80ab0d068708 246 // Disable an endpoint interrupt
samux 1:80ab0d068708 247 LPC_USB->USBEpIntEn &= ~EP(endpoint);
samux 1:80ab0d068708 248 }
samux 1:80ab0d068708 249
samux 1:80ab0d068708 250 static volatile uint32_t __attribute__((used)) dummyRead;
samux 1:80ab0d068708 251
samux 1:80ab0d068708 252
samux 1:80ab0d068708 253 uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
samux 1:80ab0d068708 254 // Read from an OUT endpoint
samux 1:80ab0d068708 255 uint32_t size;
samux 1:80ab0d068708 256 uint32_t i;
samux 1:80ab0d068708 257 uint32_t data = 0;
samux 1:80ab0d068708 258 uint8_t offset;
samux 1:80ab0d068708 259
samux 1:80ab0d068708 260 LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | RD_EN;
samux 1:80ab0d068708 261 while (!(LPC_USB->USBRxPLen & PKT_RDY));
samux 1:80ab0d068708 262
samux 1:80ab0d068708 263 size = LPC_USB->USBRxPLen & PKT_LNGTH_MASK;
samux 1:80ab0d068708 264
samux 1:80ab0d068708 265 offset = 0;
samux 1:80ab0d068708 266
samux 1:80ab0d068708 267 if (size > 0) {
samux 1:80ab0d068708 268 for (i=0; i<size; i++) {
samux 1:80ab0d068708 269 if (offset==0) {
samux 1:80ab0d068708 270 // Fetch up to four bytes of data as a word
samux 1:80ab0d068708 271 data = LPC_USB->USBRxData;
samux 1:80ab0d068708 272 }
samux 1:80ab0d068708 273
samux 1:80ab0d068708 274 // extract a byte
samux 1:80ab0d068708 275 *buffer = (data>>offset) & 0xff;
samux 1:80ab0d068708 276 buffer++;
samux 1:80ab0d068708 277
samux 1:80ab0d068708 278 // move on to the next byte
samux 1:80ab0d068708 279 offset = (offset + 8) % 32;
samux 1:80ab0d068708 280 }
samux 1:80ab0d068708 281 } else {
samux 1:80ab0d068708 282 dummyRead = LPC_USB->USBRxData;
samux 1:80ab0d068708 283 }
samux 1:80ab0d068708 284
samux 1:80ab0d068708 285 LPC_USB->USBCtrl = 0;
samux 1:80ab0d068708 286
samux 1:80ab0d068708 287 if ((endpoint >> 1) % 3 || (endpoint >> 1) == 0) {
samux 1:80ab0d068708 288 SIEselectEndpoint(endpoint);
samux 1:80ab0d068708 289 SIEclearBuffer();
samux 1:80ab0d068708 290 }
samux 1:80ab0d068708 291
samux 1:80ab0d068708 292 return size;
samux 1:80ab0d068708 293 }
samux 1:80ab0d068708 294
samux 1:80ab0d068708 295 static void endpointWritecore(uint8_t endpoint, uint8_t *buffer, uint32_t size) {
samux 1:80ab0d068708 296 // Write to an IN endpoint
samux 1:80ab0d068708 297 uint32_t temp, data;
samux 1:80ab0d068708 298 uint8_t offset;
samux 1:80ab0d068708 299
samux 1:80ab0d068708 300 LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | WR_EN;
samux 1:80ab0d068708 301
samux 1:80ab0d068708 302 LPC_USB->USBTxPLen = size;
samux 1:80ab0d068708 303 offset = 0;
samux 1:80ab0d068708 304 data = 0;
samux 1:80ab0d068708 305
samux 1:80ab0d068708 306 if (size>0) {
samux 1:80ab0d068708 307 do {
samux 1:80ab0d068708 308 // Fetch next data byte into a word-sized temporary variable
samux 1:80ab0d068708 309 temp = *buffer++;
samux 1:80ab0d068708 310
samux 1:80ab0d068708 311 // Add to current data word
samux 1:80ab0d068708 312 temp = temp << offset;
samux 1:80ab0d068708 313 data = data | temp;
samux 1:80ab0d068708 314
samux 1:80ab0d068708 315 // move on to the next byte
samux 1:80ab0d068708 316 offset = (offset + 8) % 32;
samux 1:80ab0d068708 317 size--;
samux 1:80ab0d068708 318
samux 1:80ab0d068708 319 if ((offset==0) || (size==0)) {
samux 1:80ab0d068708 320 // Write the word to the endpoint
samux 1:80ab0d068708 321 LPC_USB->USBTxData = data;
samux 1:80ab0d068708 322 data = 0;
samux 1:80ab0d068708 323 }
samux 1:80ab0d068708 324 } while (size>0);
samux 1:80ab0d068708 325 } else {
samux 1:80ab0d068708 326 LPC_USB->USBTxData = 0;
samux 1:80ab0d068708 327 }
samux 1:80ab0d068708 328
samux 1:80ab0d068708 329 // Clear WR_EN to cover zero length packet case
samux 1:80ab0d068708 330 LPC_USB->USBCtrl=0;
samux 1:80ab0d068708 331
samux 1:80ab0d068708 332 SIEselectEndpoint(endpoint);
samux 1:80ab0d068708 333 SIEvalidateBuffer();
samux 1:80ab0d068708 334 }
samux 1:80ab0d068708 335
samux 1:80ab0d068708 336
samux 1:80ab0d068708 337
samux 1:80ab0d068708 338
samux 1:80ab0d068708 339
samux 1:80ab0d068708 340
samux 1:80ab0d068708 341
samux 1:80ab0d068708 342 USBHAL::USBHAL(void) {
samux 1:80ab0d068708 343 // Disable IRQ
samux 1:80ab0d068708 344 NVIC_DisableIRQ(USB_IRQn);
samux 1:80ab0d068708 345
samux 1:80ab0d068708 346 // Enable power to USB device controller
samux 1:80ab0d068708 347 LPC_SC->PCONP |= PCUSB;
samux 1:80ab0d068708 348
samux 1:80ab0d068708 349 // Enable USB clocks
samux 1:80ab0d068708 350 LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN;
samux 1:80ab0d068708 351 while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON));
samux 1:80ab0d068708 352
samux 1:80ab0d068708 353 // Configure pins P0.29 and P0.30 to be USB D+ and USB D-
samux 1:80ab0d068708 354 LPC_PINCON->PINSEL1 &= 0xc3ffffff;
samux 1:80ab0d068708 355 LPC_PINCON->PINSEL1 |= 0x14000000;
samux 1:80ab0d068708 356
samux 1:80ab0d068708 357 // Disconnect USB device
samux 1:80ab0d068708 358 SIEdisconnect();
samux 1:80ab0d068708 359
samux 1:80ab0d068708 360 // Configure pin P2.9 to be Connect
samux 1:80ab0d068708 361 LPC_PINCON->PINSEL4 &= 0xfffcffff;
samux 1:80ab0d068708 362 LPC_PINCON->PINSEL4 |= 0x00040000;
samux 1:80ab0d068708 363
samux 1:80ab0d068708 364 // Connect must be low for at least 2.5uS
samux 1:80ab0d068708 365 wait(0.3);
samux 1:80ab0d068708 366
samux 1:80ab0d068708 367 // Set the maximum packet size for the control endpoints
samux 1:80ab0d068708 368 realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
samux 1:80ab0d068708 369 realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
samux 1:80ab0d068708 370
samux 1:80ab0d068708 371 // Attach IRQ
samux 1:80ab0d068708 372 instance = this;
samux 1:80ab0d068708 373 NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr);
samux 1:80ab0d068708 374
samux 1:80ab0d068708 375 // Enable interrupts for device events and EP0
samux 1:80ab0d068708 376 LPC_USB->USBDevIntEn = EP_SLOW | DEV_STAT | FRAME;
samux 1:80ab0d068708 377 enableEndpointEvent(EP0IN);
samux 1:80ab0d068708 378 enableEndpointEvent(EP0OUT);
samux 1:80ab0d068708 379 }
samux 1:80ab0d068708 380
samux 1:80ab0d068708 381 USBHAL::~USBHAL(void) {
samux 1:80ab0d068708 382 // Ensure device disconnected
samux 1:80ab0d068708 383 SIEdisconnect();
samux 1:80ab0d068708 384
samux 1:80ab0d068708 385 // Disable USB interrupts
samux 1:80ab0d068708 386 NVIC_DisableIRQ(USB_IRQn);
samux 1:80ab0d068708 387 }
samux 1:80ab0d068708 388
samux 1:80ab0d068708 389 void USBHAL::connect(void) {
samux 3:6d85e04fb59f 390 NVIC_EnableIRQ(USB_IRQn);
samux 1:80ab0d068708 391 // Connect USB device
samux 1:80ab0d068708 392 SIEconnect();
samux 1:80ab0d068708 393 }
samux 1:80ab0d068708 394
samux 1:80ab0d068708 395 void USBHAL::disconnect(void) {
samux 3:6d85e04fb59f 396 NVIC_DisableIRQ(USB_IRQn);
samux 1:80ab0d068708 397 // Disconnect USB device
samux 1:80ab0d068708 398 SIEdisconnect();
samux 1:80ab0d068708 399 }
samux 1:80ab0d068708 400
samux 1:80ab0d068708 401 void USBHAL::configureDevice(void) {
samux 1:80ab0d068708 402 SIEconfigureDevice();
samux 1:80ab0d068708 403 }
samux 1:80ab0d068708 404
samux 1:80ab0d068708 405 void USBHAL::unconfigureDevice(void) {
samux 1:80ab0d068708 406 SIEunconfigureDevice();
samux 1:80ab0d068708 407 }
samux 1:80ab0d068708 408
samux 1:80ab0d068708 409 void USBHAL::setAddress(uint8_t address) {
samux 1:80ab0d068708 410 SIEsetAddress(address);
samux 1:80ab0d068708 411 }
samux 1:80ab0d068708 412
samux 1:80ab0d068708 413 void USBHAL::EP0setup(uint8_t *buffer) {
samux 1:80ab0d068708 414 endpointReadcore(EP0OUT, buffer);
samux 1:80ab0d068708 415 }
samux 1:80ab0d068708 416
samux 1:80ab0d068708 417 void USBHAL::EP0read(void) {
samux 1:80ab0d068708 418 // Not required
samux 1:80ab0d068708 419 }
samux 1:80ab0d068708 420
samux 1:80ab0d068708 421 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
samux 1:80ab0d068708 422 return endpointReadcore(EP0OUT, buffer);
samux 1:80ab0d068708 423 }
samux 1:80ab0d068708 424
samux 1:80ab0d068708 425 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
samux 1:80ab0d068708 426 endpointWritecore(EP0IN, buffer, size);
samux 1:80ab0d068708 427 }
samux 1:80ab0d068708 428
samux 1:80ab0d068708 429 void USBHAL::EP0getWriteResult(void) {
samux 1:80ab0d068708 430 // Not required
samux 1:80ab0d068708 431 }
samux 1:80ab0d068708 432
samux 1:80ab0d068708 433 void USBHAL::EP0stall(void) {
samux 1:80ab0d068708 434 // This will stall both control endpoints
samux 1:80ab0d068708 435 stallEndpoint(EP0OUT);
samux 1:80ab0d068708 436 }
samux 1:80ab0d068708 437
samux 1:80ab0d068708 438 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
samux 1:80ab0d068708 439 return EP_PENDING;
samux 1:80ab0d068708 440 }
samux 1:80ab0d068708 441
samux 1:80ab0d068708 442 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
samux 1:80ab0d068708 443
samux 1:80ab0d068708 444 //for isochronous endpoint, we don't wait an interrupt
samux 1:80ab0d068708 445 if ((endpoint >> 1) % 3 || (endpoint >> 1) == 0) {
samux 1:80ab0d068708 446 if (!(epComplete & EP(endpoint)))
samux 1:80ab0d068708 447 return EP_PENDING;
samux 1:80ab0d068708 448 }
samux 1:80ab0d068708 449
samux 1:80ab0d068708 450 *bytesRead = endpointReadcore(endpoint, buffer);
samux 1:80ab0d068708 451 epComplete &= ~EP(endpoint);
samux 1:80ab0d068708 452 return EP_COMPLETED;
samux 1:80ab0d068708 453 }
samux 1:80ab0d068708 454
samux 1:80ab0d068708 455 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
samux 1:80ab0d068708 456 if (getEndpointStallState(endpoint)) {
samux 1:80ab0d068708 457 return EP_STALLED;
samux 1:80ab0d068708 458 }
samux 1:80ab0d068708 459
samux 1:80ab0d068708 460 epComplete &= ~EP(endpoint);
samux 1:80ab0d068708 461
samux 1:80ab0d068708 462 endpointWritecore(endpoint, data, size);
samux 1:80ab0d068708 463 return EP_PENDING;
samux 1:80ab0d068708 464 }
samux 1:80ab0d068708 465
samux 1:80ab0d068708 466 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
samux 1:80ab0d068708 467 if (epComplete & EP(endpoint)) {
samux 1:80ab0d068708 468 epComplete &= ~EP(endpoint);
samux 1:80ab0d068708 469 return EP_COMPLETED;
samux 1:80ab0d068708 470 }
samux 1:80ab0d068708 471
samux 1:80ab0d068708 472 return EP_PENDING;
samux 1:80ab0d068708 473 }
samux 1:80ab0d068708 474
samux 1:80ab0d068708 475 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
samux 1:80ab0d068708 476 // Realise an endpoint
samux 1:80ab0d068708 477 LPC_USB->USBDevIntClr = EP_RLZED;
samux 1:80ab0d068708 478 LPC_USB->USBReEp |= EP(endpoint);
samux 1:80ab0d068708 479 LPC_USB->USBEpInd = endpoint;
samux 1:80ab0d068708 480 LPC_USB->USBMaxPSize = maxPacket;
samux 1:80ab0d068708 481
samux 1:80ab0d068708 482 while (!(LPC_USB->USBDevIntSt & EP_RLZED));
samux 1:80ab0d068708 483 LPC_USB->USBDevIntClr = EP_RLZED;
samux 1:80ab0d068708 484
samux 1:80ab0d068708 485 // Clear stall state
samux 1:80ab0d068708 486 endpointStallState &= ~EP(endpoint);
samux 1:80ab0d068708 487
samux 1:80ab0d068708 488 enableEndpointEvent(endpoint);
samux 1:80ab0d068708 489 return true;
samux 1:80ab0d068708 490 }
samux 1:80ab0d068708 491
samux 1:80ab0d068708 492 void USBHAL::stallEndpoint(uint8_t endpoint) {
samux 1:80ab0d068708 493 // Stall an endpoint
samux 1:80ab0d068708 494 if ( (endpoint==EP0IN) || (endpoint==EP0OUT) ) {
samux 1:80ab0d068708 495 // Conditionally stall both control endpoints
samux 1:80ab0d068708 496 SIEsetEndpointStatus(EP0OUT, SIE_SES_CND_ST);
samux 1:80ab0d068708 497 } else {
samux 1:80ab0d068708 498 SIEsetEndpointStatus(endpoint, SIE_SES_ST);
samux 1:80ab0d068708 499
samux 1:80ab0d068708 500 // Update stall state
samux 1:80ab0d068708 501 endpointStallState |= EP(endpoint);
samux 1:80ab0d068708 502 }
samux 1:80ab0d068708 503 }
samux 1:80ab0d068708 504
samux 1:80ab0d068708 505 void USBHAL::unstallEndpoint(uint8_t endpoint) {
samux 1:80ab0d068708 506 // Unstall an endpoint. The endpoint will also be reinitialised
samux 1:80ab0d068708 507 SIEsetEndpointStatus(endpoint, 0);
samux 1:80ab0d068708 508
samux 1:80ab0d068708 509 // Update stall state
samux 1:80ab0d068708 510 endpointStallState &= ~EP(endpoint);
samux 1:80ab0d068708 511 }
samux 1:80ab0d068708 512
samux 1:80ab0d068708 513 bool USBHAL::getEndpointStallState(uint8_t endpoint) {
samux 1:80ab0d068708 514 // Returns true if endpoint stalled
samux 1:80ab0d068708 515 return endpointStallState & EP(endpoint);
samux 1:80ab0d068708 516 }
samux 1:80ab0d068708 517
samux 1:80ab0d068708 518 void USBHAL::remoteWakeup(void) {
samux 1:80ab0d068708 519 // Remote wakeup
samux 1:80ab0d068708 520 uint8_t status;
samux 1:80ab0d068708 521
samux 1:80ab0d068708 522 // Enable USB clocks
samux 1:80ab0d068708 523 LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN;
samux 1:80ab0d068708 524 while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON));
samux 1:80ab0d068708 525
samux 1:80ab0d068708 526 status = SIEgetDeviceStatus();
samux 1:80ab0d068708 527 SIEsetDeviceStatus(status & ~SIE_DS_SUS);
samux 1:80ab0d068708 528 }
samux 1:80ab0d068708 529
samux 1:80ab0d068708 530
samux 1:80ab0d068708 531
samux 1:80ab0d068708 532
samux 1:80ab0d068708 533
samux 1:80ab0d068708 534 void USBHAL::_usbisr(void) {
samux 1:80ab0d068708 535 instance->usbisr();
samux 1:80ab0d068708 536 }
samux 1:80ab0d068708 537
samux 1:80ab0d068708 538
samux 1:80ab0d068708 539 void USBHAL::usbisr(void) {
samux 1:80ab0d068708 540 uint8_t devStat;
samux 1:80ab0d068708 541
samux 1:80ab0d068708 542 if (LPC_USB->USBDevIntSt & FRAME) {
samux 1:80ab0d068708 543 // Start of frame event
samux 1:80ab0d068708 544 SOF(SIEgetFrameNumber());
samux 1:80ab0d068708 545 // Clear interrupt status flag
samux 1:80ab0d068708 546 LPC_USB->USBDevIntClr = FRAME;
samux 1:80ab0d068708 547 }
samux 1:80ab0d068708 548
samux 1:80ab0d068708 549 if (LPC_USB->USBDevIntSt & DEV_STAT) {
samux 1:80ab0d068708 550 // Device Status interrupt
samux 1:80ab0d068708 551 // Must clear the interrupt status flag before reading the device status from the SIE
samux 1:80ab0d068708 552 LPC_USB->USBDevIntClr = DEV_STAT;
samux 1:80ab0d068708 553
samux 1:80ab0d068708 554 // Read device status from SIE
samux 1:80ab0d068708 555 devStat = SIEgetDeviceStatus();
samux 1:80ab0d068708 556 //printf("devStat: %d\r\n", devStat);
samux 1:80ab0d068708 557
samux 1:80ab0d068708 558 if (devStat & SIE_DS_SUS_CH) {
samux 1:80ab0d068708 559 // Suspend status changed
samux 1:80ab0d068708 560 if((devStat & SIE_DS_SUS) != 0) {
samux 1:80ab0d068708 561 suspendStateChanged(0);
samux 1:80ab0d068708 562 }
samux 1:80ab0d068708 563 }
samux 1:80ab0d068708 564
samux 1:80ab0d068708 565 if (devStat & SIE_DS_RST) {
samux 1:80ab0d068708 566 // Bus reset
samux 1:80ab0d068708 567 if((devStat & SIE_DS_SUS) == 0) {
samux 1:80ab0d068708 568 suspendStateChanged(1);
samux 1:80ab0d068708 569 }
samux 1:80ab0d068708 570 busReset();
samux 1:80ab0d068708 571 }
samux 1:80ab0d068708 572 }
samux 1:80ab0d068708 573
samux 1:80ab0d068708 574 if (LPC_USB->USBDevIntSt & EP_SLOW) {
samux 1:80ab0d068708 575 // (Slow) Endpoint Interrupt
samux 1:80ab0d068708 576
samux 1:80ab0d068708 577 // Process each endpoint interrupt
samux 1:80ab0d068708 578 if (LPC_USB->USBEpIntSt & EP(EP0OUT)) {
samux 1:80ab0d068708 579 if (selectEndpointClearInterrupt(EP0OUT) & SIE_SE_STP) {
samux 1:80ab0d068708 580 // this is a setup packet
samux 1:80ab0d068708 581 EP0setupCallback();
samux 1:80ab0d068708 582 } else {
samux 1:80ab0d068708 583 EP0out();
samux 1:80ab0d068708 584 }
samux 1:80ab0d068708 585 LPC_USB->USBDevIntClr = EP_SLOW;
samux 1:80ab0d068708 586 }
samux 1:80ab0d068708 587
samux 1:80ab0d068708 588 if (LPC_USB->USBEpIntSt & EP(EP0IN)) {
samux 1:80ab0d068708 589 selectEndpointClearInterrupt(EP0IN);
samux 1:80ab0d068708 590 LPC_USB->USBDevIntClr = EP_SLOW;
samux 1:80ab0d068708 591 EP0in();
samux 1:80ab0d068708 592 }
samux 1:80ab0d068708 593
samux 1:80ab0d068708 594 // TODO: This should cover all endpoints, not just EP1,2,3:
samux 1:80ab0d068708 595 if (LPC_USB->USBEpIntSt & EP(EP1IN)) {
samux 1:80ab0d068708 596 selectEndpointClearInterrupt(EP1IN);
samux 1:80ab0d068708 597 epComplete |= EP(EP1IN);
samux 1:80ab0d068708 598 LPC_USB->USBDevIntClr = EP_SLOW;
samux 1:80ab0d068708 599 if (EP1_IN_callback())
samux 1:80ab0d068708 600 epComplete &= ~EP(EP1IN);
samux 1:80ab0d068708 601 }
samux 1:80ab0d068708 602
samux 1:80ab0d068708 603 if (LPC_USB->USBEpIntSt & EP(EP1OUT)) {
samux 1:80ab0d068708 604 selectEndpointClearInterrupt(EP1OUT);
samux 1:80ab0d068708 605 epComplete |= EP(EP1OUT);
samux 1:80ab0d068708 606 LPC_USB->USBDevIntClr = EP_SLOW;
samux 1:80ab0d068708 607 if (EP1_OUT_callback())
samux 1:80ab0d068708 608 epComplete &= ~EP(EP1OUT);
samux 1:80ab0d068708 609 }
samux 1:80ab0d068708 610
samux 1:80ab0d068708 611 if (LPC_USB->USBEpIntSt & EP(EP2IN)) {
samux 1:80ab0d068708 612 selectEndpointClearInterrupt(EP2IN);
samux 1:80ab0d068708 613 epComplete |= EP(EP2IN);
samux 1:80ab0d068708 614 LPC_USB->USBDevIntClr = EP_SLOW;
samux 1:80ab0d068708 615 if (EP2_IN_callback())
samux 1:80ab0d068708 616 epComplete &= ~EP(EP2IN);
samux 1:80ab0d068708 617 }
samux 1:80ab0d068708 618
samux 1:80ab0d068708 619 if (LPC_USB->USBEpIntSt & EP(EP2OUT)) {
samux 1:80ab0d068708 620 selectEndpointClearInterrupt(EP2OUT);
samux 1:80ab0d068708 621 epComplete |= EP(EP2OUT);
samux 1:80ab0d068708 622 LPC_USB->USBDevIntClr = EP_SLOW;
samux 1:80ab0d068708 623 if (EP2_OUT_callback())
samux 1:80ab0d068708 624 epComplete &= ~EP(EP2OUT);
samux 1:80ab0d068708 625 }
samux 1:80ab0d068708 626
samux 1:80ab0d068708 627 if (LPC_USB->USBEpIntSt & EP(EP3IN)) {
samux 1:80ab0d068708 628 selectEndpointClearInterrupt(EP3IN);
samux 1:80ab0d068708 629 epComplete |= EP(EP3IN);
samux 1:80ab0d068708 630 LPC_USB->USBDevIntClr = EP_SLOW;
samux 1:80ab0d068708 631 if (EP3_IN_callback())
samux 1:80ab0d068708 632 epComplete &= ~EP(EP3IN);
samux 1:80ab0d068708 633 }
samux 1:80ab0d068708 634
samux 1:80ab0d068708 635 if (LPC_USB->USBEpIntSt & EP(EP3OUT)) {
samux 1:80ab0d068708 636 selectEndpointClearInterrupt(EP3OUT);
samux 1:80ab0d068708 637 epComplete |= EP(EP3OUT);
samux 1:80ab0d068708 638 LPC_USB->USBDevIntClr = EP_SLOW;
samux 1:80ab0d068708 639 if (EP3_OUT_callback())
samux 1:80ab0d068708 640 epComplete &= ~EP(EP3OUT);
samux 1:80ab0d068708 641 }
samux 1:80ab0d068708 642 }
samux 1:80ab0d068708 643 }
samux 1:80ab0d068708 644
samux 1:80ab0d068708 645 #endif