Andy A / DW1000

DW1000 UWB driver based on work of Matthias Grob & Manuel Stalder - ETH Zürich - 2015

Dependencies:   BurstSPI

DW1000Setup.cpp@18:6c2ce1749d4a, 2017-11-13 (annotated)

Committer:
AndyA
Date:
Mon Nov 13 14:29:41 2017 +0000
Revision:
18:6c2ce1749d4a
Parent:
9:326bf149c8bc 
Auto apply crystal trim on startup

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AndyA 8:0b408e77b701 1
AndyA 8:0b408e77b701 2 #include "DW1000Setup.h"
AndyA 8:0b408e77b701 3
AndyA 8:0b408e77b701 4 DW1000Setup::DW1000Setup(UWBMode modeToUse)
AndyA 8:0b408e77b701 5 {
AndyA 9:326bf149c8bc 6 setGPIO(0x0180);
AndyA 8:0b408e77b701 7 switch (modeToUse) {
AndyA 8:0b408e77b701 8 case user110k: // values from Matthias Grob & Manuel Stalder - ETH Zürich - library
AndyA 8:0b408e77b701 9
AndyA 8:0b408e77b701 10 setChannel(5);
AndyA 8:0b408e77b701 11 setPRF(prf16MHz);
AndyA 8:0b408e77b701 12 setDataRate(kbps110);
AndyA 8:0b408e77b701 13 setSfd(standard);
AndyA 8:0b408e77b701 14 setPreambleLength(pre1024);
AndyA 8:0b408e77b701 15 setPreambleCode(3);
AndyA 8:0b408e77b701 16 setSmartPower(false);
AndyA 9:326bf149c8bc 17 setTxPower(18);
AndyA 8:0b408e77b701 18 break;
AndyA 8:0b408e77b701 19 case tunedDefault: // User Manual "2.5.5 Default Configurations that should be modified" p. 22
AndyA 8:0b408e77b701 20 default:
AndyA 8:0b408e77b701 21 setChannel(5);
AndyA 8:0b408e77b701 22 setPRF(prf16MHz);
AndyA 8:0b408e77b701 23 setDataRate(kbps6800);
AndyA 8:0b408e77b701 24 setSfd(standard);
AndyA 8:0b408e77b701 25 setPreambleLength(pre128);
AndyA 8:0b408e77b701 26 setPreambleCode(3);
AndyA 8:0b408e77b701 27 setSmartPower(false);
AndyA 9:326bf149c8bc 28 setTxPower(18);
AndyA 8:0b408e77b701 29 break;
AndyA 8:0b408e77b701 30 case fastLocationC5:
AndyA 8:0b408e77b701 31 setChannel(5);
AndyA 8:0b408e77b701 32 setPRF(prf64MHz);
AndyA 8:0b408e77b701 33 setDataRate(kbps6800);
AndyA 8:0b408e77b701 34 setSfd(standard);
AndyA 8:0b408e77b701 35 setPreambleLength(pre64);
AndyA 8:0b408e77b701 36 setPreambleCode(10);
AndyA 8:0b408e77b701 37 setSmartPower(true);
AndyA 9:326bf149c8bc 38 setTxPower(18);
AndyA 8:0b408e77b701 39 break;
AndyA 8:0b408e77b701 40 case fastLocationC4:
AndyA 8:0b408e77b701 41 setChannel(4);
AndyA 8:0b408e77b701 42 setPRF(prf64MHz);
AndyA 8:0b408e77b701 43 setDataRate(kbps6800);
AndyA 8:0b408e77b701 44 setSfd(standard);
AndyA 8:0b408e77b701 45 setPreambleLength(pre64);
AndyA 8:0b408e77b701 46 setPreambleCode(18);
AndyA 8:0b408e77b701 47 setSmartPower(true);
AndyA 9:326bf149c8bc 48 setTxPower(18);
AndyA 8:0b408e77b701 49 break;
AndyA 8:0b408e77b701 50 case rangeRateCompromise:
AndyA 8:0b408e77b701 51 setChannel(4);
AndyA 8:0b408e77b701 52 setPRF(prf64MHz);
AndyA 8:0b408e77b701 53 setDataRate(kbps850);
AndyA 8:0b408e77b701 54 setSfd(standard); // for some reason decawave doesn't work.
AndyA 8:0b408e77b701 55 setPreambleLength(pre256);
AndyA 8:0b408e77b701 56 setPreambleCode(18);
AndyA 8:0b408e77b701 57 setSmartPower(false);
AndyA 9:326bf149c8bc 58 setTxPower(18);
AndyA 8:0b408e77b701 59 break;
AndyA 8:0b408e77b701 60 }
AndyA 8:0b408e77b701 61 }
AndyA 8:0b408e77b701 62
AndyA 8:0b408e77b701 63
AndyA 8:0b408e77b701 64 DW1000Setup::DW1000Setup(DW1000Setup *orij) {
AndyA 8:0b408e77b701 65 channel = orij->getChannel();
AndyA 8:0b408e77b701 66 prf = orij->getPRF();
AndyA 8:0b408e77b701 67 dataRate = orij->getDataRate();
AndyA 8:0b408e77b701 68 sfd = orij->getSfd();
AndyA 8:0b408e77b701 69 preamble = orij->getPreambleLength();
AndyA 8:0b408e77b701 70 preambleCode = orij->getPreambleCode();
AndyA 8:0b408e77b701 71 GPIO_Pins = orij->getGPIO(); // 8 = irq, 7 = sync. Others are GPIO
AndyA 8:0b408e77b701 72 enableSmartPower = orij->getSmartPower();
AndyA 8:0b408e77b701 73 memcpy(&powers,orij->getTxPowers(),4*sizeof(float));
AndyA 8:0b408e77b701 74 }
AndyA 8:0b408e77b701 75
AndyA 8:0b408e77b701 76
AndyA 8:0b408e77b701 77 void DW1000Setup::applyConfig(DW1000Setup *orij) {
AndyA 8:0b408e77b701 78 channel = orij->getChannel();
AndyA 8:0b408e77b701 79 prf = orij->getPRF();
AndyA 8:0b408e77b701 80 dataRate = orij->getDataRate();
AndyA 8:0b408e77b701 81 sfd = orij->getSfd();
AndyA 8:0b408e77b701 82 preamble = orij->getPreambleLength();
AndyA 8:0b408e77b701 83 preambleCode = orij->getPreambleCode();
AndyA 8:0b408e77b701 84 GPIO_Pins = orij->getGPIO(); // 8 = irq, 7 = sync. Others are GPIO
AndyA 8:0b408e77b701 85 enableSmartPower = orij->getSmartPower();
AndyA 8:0b408e77b701 86 memcpy(&powers,orij->getTxPowers(),4*sizeof(float));
AndyA 8:0b408e77b701 87 }
AndyA 8:0b408e77b701 88
AndyA 8:0b408e77b701 89
AndyA 8:0b408e77b701 90 bool DW1000Setup::check()
AndyA 8:0b408e77b701 91 {
AndyA 8:0b408e77b701 92 int maxCode = 24;
AndyA 8:0b408e77b701 93 int minCode = 1;
AndyA 8:0b408e77b701 94
AndyA 8:0b408e77b701 95 if (prf == prf16MHz)
AndyA 8:0b408e77b701 96 switch (channel) {
AndyA 8:0b408e77b701 97 case 1:
AndyA 8:0b408e77b701 98 maxCode = 2;
AndyA 8:0b408e77b701 99 minCode = 1;
AndyA 8:0b408e77b701 100 break;
AndyA 8:0b408e77b701 101 case 2:
AndyA 8:0b408e77b701 102 case 5:
AndyA 8:0b408e77b701 103 maxCode = 4;
AndyA 8:0b408e77b701 104 minCode = 3;
AndyA 8:0b408e77b701 105 break;
AndyA 8:0b408e77b701 106 case 3:
AndyA 8:0b408e77b701 107 maxCode = 6;
AndyA 8:0b408e77b701 108 minCode = 5;
AndyA 8:0b408e77b701 109 break;
AndyA 8:0b408e77b701 110 case 4:
AndyA 8:0b408e77b701 111 case 7:
AndyA 8:0b408e77b701 112 maxCode = 8;
AndyA 8:0b408e77b701 113 minCode = 7;
AndyA 8:0b408e77b701 114 break;
AndyA 8:0b408e77b701 115 default:
AndyA 8:0b408e77b701 116 return false; // invalid channel
AndyA 8:0b408e77b701 117 }
AndyA 8:0b408e77b701 118 else
AndyA 8:0b408e77b701 119 switch (channel) {
AndyA 8:0b408e77b701 120 case 1:
AndyA 8:0b408e77b701 121 case 2:
AndyA 8:0b408e77b701 122 case 3:
AndyA 8:0b408e77b701 123 case 5:
AndyA 8:0b408e77b701 124 maxCode = 12;
AndyA 8:0b408e77b701 125 minCode = 9;
AndyA 8:0b408e77b701 126 break;
AndyA 8:0b408e77b701 127 case 4:
AndyA 8:0b408e77b701 128 case 7:
AndyA 8:0b408e77b701 129 maxCode = 20;
AndyA 8:0b408e77b701 130 minCode = 17;
AndyA 8:0b408e77b701 131 break;
AndyA 8:0b408e77b701 132 default:
AndyA 8:0b408e77b701 133 return false; // invalid channel
AndyA 8:0b408e77b701 134 }
AndyA 8:0b408e77b701 135
AndyA 8:0b408e77b701 136 if ((preambleCode > maxCode) || (preambleCode < minCode))
AndyA 8:0b408e77b701 137 return false;
AndyA 8:0b408e77b701 138
AndyA 8:0b408e77b701 139 switch (preamble) {
AndyA 8:0b408e77b701 140 default:
AndyA 8:0b408e77b701 141 return false;
AndyA 8:0b408e77b701 142 case pre64:
AndyA 8:0b408e77b701 143 case pre128:
AndyA 8:0b408e77b701 144 if (dataRate != kbps6800)
AndyA 8:0b408e77b701 145 return false;
AndyA 8:0b408e77b701 146 break;
AndyA 8:0b408e77b701 147 case pre256:
AndyA 8:0b408e77b701 148 if (dataRate == kbps110)
AndyA 8:0b408e77b701 149 return false;
AndyA 8:0b408e77b701 150 break;
AndyA 8:0b408e77b701 151 case pre512:
AndyA 8:0b408e77b701 152 case pre1024:
AndyA 8:0b408e77b701 153 case pre1536:
AndyA 8:0b408e77b701 154 if (dataRate != kbps850)
AndyA 8:0b408e77b701 155 return false;
AndyA 8:0b408e77b701 156 break;
AndyA 8:0b408e77b701 157 case pre2048:
AndyA 8:0b408e77b701 158 if (dataRate == kbps6800)
AndyA 8:0b408e77b701 159 return false;
AndyA 8:0b408e77b701 160 break;
AndyA 8:0b408e77b701 161 case pre4096:
AndyA 8:0b408e77b701 162 if (dataRate != kbps110)
AndyA 8:0b408e77b701 163 return false;
AndyA 8:0b408e77b701 164 break;
AndyA 8:0b408e77b701 165 }
AndyA 8:0b408e77b701 166
AndyA 8:0b408e77b701 167 if (enableSmartPower) {
AndyA 8:0b408e77b701 168 if (dataRate != kbps6800)
AndyA 8:0b408e77b701 169 return false;
AndyA 8:0b408e77b701 170 }
AndyA 8:0b408e77b701 171 return true;
AndyA 8:0b408e77b701 172 }
AndyA 8:0b408e77b701 173
AndyA 8:0b408e77b701 174 void DW1000Setup::getSetupDescription(char *buffer, int len)
AndyA 8:0b408e77b701 175 {
AndyA 8:0b408e77b701 176
AndyA 8:0b408e77b701 177 char dataRateString[10];
AndyA 8:0b408e77b701 178 if (dataRate == kbps6800)
AndyA 8:0b408e77b701 179 strcpy(dataRateString,"6.8 Mbps");
AndyA 8:0b408e77b701 180 else if (dataRate == kbps850)
AndyA 8:0b408e77b701 181 strcpy(dataRateString,"850 kbps");
AndyA 8:0b408e77b701 182 else
AndyA 8:0b408e77b701 183 strcpy(dataRateString,"110 kbps");
AndyA 8:0b408e77b701 184
AndyA 8:0b408e77b701 185 char preambleString[8];
AndyA 8:0b408e77b701 186 switch (preamble) {
AndyA 8:0b408e77b701 187 default:
AndyA 8:0b408e77b701 188 strcpy(preambleString,"error");
AndyA 8:0b408e77b701 189 break;
AndyA 8:0b408e77b701 190 case pre64:
AndyA 8:0b408e77b701 191 strcpy(preambleString,"64");
AndyA 8:0b408e77b701 192 break;
AndyA 8:0b408e77b701 193 case pre128:
AndyA 8:0b408e77b701 194 strcpy(preambleString,"128");
AndyA 8:0b408e77b701 195 break;
AndyA 8:0b408e77b701 196 case pre256:
AndyA 8:0b408e77b701 197 strcpy(preambleString,"256");
AndyA 8:0b408e77b701 198 break;
AndyA 8:0b408e77b701 199 case pre512:
AndyA 8:0b408e77b701 200 strcpy(preambleString,"512");
AndyA 8:0b408e77b701 201 break;
AndyA 8:0b408e77b701 202 case pre1024:
AndyA 8:0b408e77b701 203 strcpy(preambleString,"1024");
AndyA 8:0b408e77b701 204 break;
AndyA 8:0b408e77b701 205 case pre1536:
AndyA 8:0b408e77b701 206 strcpy(preambleString,"1536");
AndyA 8:0b408e77b701 207 break;
AndyA 8:0b408e77b701 208 case pre2048:
AndyA 8:0b408e77b701 209 strcpy(preambleString,"2048");
AndyA 8:0b408e77b701 210 break;
AndyA 8:0b408e77b701 211 case pre4096:
AndyA 8:0b408e77b701 212 strcpy(preambleString,"4096");
AndyA 8:0b408e77b701 213 break;
AndyA 8:0b408e77b701 214 }
AndyA 8:0b408e77b701 215
AndyA 9:326bf149c8bc 216 snprintf(buffer,len,"Channel:\t%u\r\nPRF:\t%s\r\nData Rate:\t%s\r\nPreamble length:\t%s\r\nPreamble code:\t%u\r\nSmart power:\t%s\r\nSFD:\t%s\r\nTx Gain:\t%.1f,%.1f,%.1f,%.1f\r\n",
AndyA 8:0b408e77b701 217 channel,
AndyA 8:0b408e77b701 218 (prf == prf16MHz)?"16 MHz":"64 MHz",
AndyA 8:0b408e77b701 219 dataRateString,
AndyA 8:0b408e77b701 220 preambleString,
AndyA 8:0b408e77b701 221 preambleCode,
AndyA 8:0b408e77b701 222 enableSmartPower?"Enabled":"Disabled",
AndyA 9:326bf149c8bc 223 (sfd == standard)?"Standard":"Non-standard",
AndyA 9:326bf149c8bc 224 powers[0],powers[1],powers[2],powers[3]);
AndyA 8:0b408e77b701 225 }
AndyA 8:0b408e77b701 226
AndyA 8:0b408e77b701 227 bool DW1000Setup::setSmartTxPower(float powerdBm,float power500us,float power250us,float power125us) {
AndyA 8:0b408e77b701 228 if ((powerdBm < 0) || (powerdBm > 33.5))
AndyA 8:0b408e77b701 229 return false;
AndyA 8:0b408e77b701 230
AndyA 8:0b408e77b701 231 powers[0] = powerdBm;
AndyA 8:0b408e77b701 232
AndyA 8:0b408e77b701 233 if ((power500us < powerdBm) || (power500us > 33.5))
AndyA 8:0b408e77b701 234 powers[1] = powers[0];
AndyA 8:0b408e77b701 235 else
AndyA 8:0b408e77b701 236 powers[1] = power500us;
AndyA 8:0b408e77b701 237
AndyA 8:0b408e77b701 238 if ((power250us < power500us) || (power250us > 33.5))
AndyA 8:0b408e77b701 239 powers[2] = powers[1];
AndyA 8:0b408e77b701 240 else
AndyA 8:0b408e77b701 241 powers[2] = power250us;
AndyA 8:0b408e77b701 242
AndyA 8:0b408e77b701 243 if ((power125us < power250us) || (power125us > 33.5))
AndyA 8:0b408e77b701 244 powers[3] = powers[2];
AndyA 8:0b408e77b701 245 else
AndyA 8:0b408e77b701 246 powers[3] = power125us;
AndyA 8:0b408e77b701 247
AndyA 8:0b408e77b701 248 return true;
AndyA 8:0b408e77b701 249 }
AndyA 8:0b408e77b701 250
AndyA 8:0b408e77b701 251 bool DW1000Setup::setTxPower(float powerdBm,float powerPRF) {
AndyA 8:0b408e77b701 252 if ((powerdBm < 0) || (powerdBm > 33.5))
AndyA 8:0b408e77b701 253 return false;
AndyA 8:0b408e77b701 254
AndyA 8:0b408e77b701 255 powers[0] = powerdBm;
AndyA 8:0b408e77b701 256 powers[1] = powerdBm;
AndyA 8:0b408e77b701 257 powers[2] = powerdBm;
AndyA 8:0b408e77b701 258 powers[3] = powerdBm;
AndyA 8:0b408e77b701 259
AndyA 8:0b408e77b701 260 if ((powerPRF > 0) && (powerPRF < 33.5))
AndyA 8:0b408e77b701 261 powers[1] = powerPRF;
AndyA 8:0b408e77b701 262
AndyA 8:0b408e77b701 263 return true;
AndyA 8:0b408e77b701 264 }