Andy A / DW1000

DW1000 UWB driver based on work of Matthias Grob & Manuel Stalder - ETH Zürich - 2015

Dependencies:   BurstSPI

DW1000.h@8:0b408e77b701, 2016-04-18 (annotated)

Committer:
AndyA
Date:
Mon Apr 18 16:58:27 2016 +0000
Revision:
8:0b408e77b701
Parent:
7:b13881dbb09d
Child:
9:326bf149c8bc
f

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AndyA 0:bddb8cd5e7df 1 // by Matthias Grob & Manuel Stalder - ETH Zürich - 2015
AndyA 0:bddb8cd5e7df 2
AndyA 0:bddb8cd5e7df 3 #ifndef DW1000_H
AndyA 0:bddb8cd5e7df 4 #define DW1000_H
AndyA 0:bddb8cd5e7df 5
AndyA 0:bddb8cd5e7df 6 #include "mbed.h"
AndyA 7:b13881dbb09d 7 #include "BurstSPI.h"
AndyA 8:0b408e77b701 8 #include "DW1000Registers.h"
AndyA 8:0b408e77b701 9 #include "DW1000Setup.h"
AndyA 3:1459d2aa6b97 10
AndyA 8:0b408e77b701 11 #define TIMEUNITS_TO_US (1/(128*499.2)) // conversion between the decawave timeunits (ca 15.65ps) to microseconds.
AndyA 8:0b408e77b701 12 #define US_TO_TIMEUNITS ((uint32_t)(128*499.2)) // conversion between microseconds to the decawave timeunits (ca 15.65ps).
AndyA 8:0b408e77b701 13 #define c_mPerS 299792458
AndyA 8:0b408e77b701 14 #define c_mmPerTick (c_mPerS * TIMEUNITS_TO_US / 1000)
AndyA 8:0b408e77b701 15 #define c_mPerTick (c_mmPerTick/1000)
AndyA 4:5f1025df5530 16
AndyA 4:5f1025df5530 17
AndyA 3:1459d2aa6b97 18 typedef enum {minPacketSize, tunedDefault, user110k} UWBMode;
AndyA 0:bddb8cd5e7df 19
AndyA 4:5f1025df5530 20 /** A DW1000 driver
AndyA 4:5f1025df5530 21 */
AndyA 0:bddb8cd5e7df 22 class DW1000
AndyA 0:bddb8cd5e7df 23 {
AndyA 0:bddb8cd5e7df 24 public:
AndyA 0:bddb8cd5e7df 25
AndyA 6:2c77afdf7367 26 /** Constructor.
AndyA 6:2c77afdf7367 27 *
AndyA 6:2c77afdf7367 28 * @param setup The radio mode to configure the unit to use.
AndyA 6:2c77afdf7367 29 *
AndyA 6:2c77afdf7367 30 * Valid setup values are defaultConfig, tunedDefault, user110k
AndyA 6:2c77afdf7367 31 */
AndyA 0:bddb8cd5e7df 32 DW1000(UWBMode setup, PinName MOSI, PinName MISO, PinName SCLK, PinName CS, PinName IRQ); // constructor, uses SPI class
AndyA 6:2c77afdf7367 33
AndyA 6:2c77afdf7367 34 /**
AndyA 6:2c77afdf7367 35 * Sets the callbacks on packet Rx and Tx
AndyA 6:2c77afdf7367 36 * @param callbackRX The function to call on packet Rx complete
AndyA 6:2c77afdf7367 37 * @param callbackTX The function to call on packet Tx complete
AndyA 6:2c77afdf7367 38 *
AndyA 6:2c77afdf7367 39 * set either or both to null to disable the appropriate interupt
AndyA 6:2c77afdf7367 40 */
AndyA 0:bddb8cd5e7df 41 void setCallbacks(void (*callbackRX)(void), void (*callbackTX)(void)); // setter for callback functions, automatically enables interrupt, if NULL is passed the coresponding interrupt gets disabled
AndyA 6:2c77afdf7367 42
AndyA 6:2c77afdf7367 43 /**
AndyA 6:2c77afdf7367 44 * c++ version of setCallbacks()
AndyA 6:2c77afdf7367 45 * @param tptr object for callbacks
AndyA 6:2c77afdf7367 46 * @param mptrRX method to call on packet Rx complete
AndyA 6:2c77afdf7367 47 * @param mptrTX method to call on packet Tx complete
AndyA 6:2c77afdf7367 48 *
AndyA 6:2c77afdf7367 49 */
AndyA 0:bddb8cd5e7df 50 template<typename T>
AndyA 0:bddb8cd5e7df 51 void setCallbacks(T* tptr, void (T::*mptrRX)(void), void (T::*mptrTX)(void)) { // overloaded setter to treat member function pointers of objects
AndyA 0:bddb8cd5e7df 52 callbackRX.attach(tptr, mptrRX); // possible client code: dw.setCallbacks(this, &A::callbackRX, &A::callbackTX);
AndyA 0:bddb8cd5e7df 53 callbackTX.attach(tptr, mptrTX); // concept seen in line 100 of http://developer.mbed.org/users/mbed_official/code/mbed/docs/4fc01daae5a5/InterruptIn_8h_source.html
AndyA 0:bddb8cd5e7df 54 setInterrupt(true,true);
AndyA 0:bddb8cd5e7df 55 }
AndyA 0:bddb8cd5e7df 56
AndyA 0:bddb8cd5e7df 57 // Device API
AndyA 6:2c77afdf7367 58 /** Read the device ID
AndyA 6:2c77afdf7367 59 * @return the device ID (0xDECA0130)
AndyA 6:2c77afdf7367 60 */
AndyA 0:bddb8cd5e7df 61 uint32_t getDeviceID(); // gets the Device ID which should be 0xDECA0130 (good for testing SPI!)
AndyA 6:2c77afdf7367 62
AndyA 6:2c77afdf7367 63 /** Read the Extended Unique ID
AndyA 6:2c77afdf7367 64 * @return The device EUI as stored in the system registers
AndyA 6:2c77afdf7367 65 */
AndyA 6:2c77afdf7367 66 uint64_t getEUI();
AndyA 6:2c77afdf7367 67
AndyA 6:2c77afdf7367 68 /** Set the Extended Unique ID
AndyA 6:2c77afdf7367 69 * @param EUI The EUID to use
AndyA 6:2c77afdf7367 70 *
AndyA 6:2c77afdf7367 71 * Note - ID is only valid until the next power cycle and overrides the value in the OTP memory.
AndyA 6:2c77afdf7367 72 * To set a value that is automatically loaded on startup set OTP memory addresses 0 and 1.
AndyA 6:2c77afdf7367 73 */
AndyA 0:bddb8cd5e7df 74 void setEUI(uint64_t EUI); // sets 64 bit Extended Unique Identifier according to IEEE standard
AndyA 6:2c77afdf7367 75
AndyA 6:2c77afdf7367 76 /** Read voltage input
AndyA 6:2c77afdf7367 77
AndyA 6:2c77afdf7367 78 @return the current device voltage
AndyA 6:2c77afdf7367 79
AndyA 6:2c77afdf7367 80 For accurate ranging the voltage of the device should be taken into account.
AndyA 6:2c77afdf7367 81 User manual give variation as ~5.35cm / V
AndyA 6:2c77afdf7367 82 */
AndyA 0:bddb8cd5e7df 83 float getVoltage(); // gets the current chip voltage measurement form the A/D converter
AndyA 6:2c77afdf7367 84
AndyA 6:2c77afdf7367 85 /** Read on board temperature sensor
AndyA 6:2c77afdf7367 86 @return The temperature in C
AndyA 6:2c77afdf7367 87
AndyA 6:2c77afdf7367 88 For accurate ranging the temperature of the device should be taken into account.
AndyA 6:2c77afdf7367 89 User manual give variation as ~2.15mm / C
AndyA 6:2c77afdf7367 90 */
AndyA 0:bddb8cd5e7df 91 float getTemperature(); // gets the current chip temperature measurement form the A/D converter
AndyA 6:2c77afdf7367 92
AndyA 6:2c77afdf7367 93 /** Get the status register
AndyA 6:2c77afdf7367 94 * @return The system status register
AndyA 6:2c77afdf7367 95 *
AndyA 6:2c77afdf7367 96 * See user manual section 7.2.17 for details
AndyA 6:2c77afdf7367 97 */
AndyA 0:bddb8cd5e7df 98 uint64_t getStatus(); // get the 40 bit device status
AndyA 6:2c77afdf7367 99
AndyA 6:2c77afdf7367 100 /** Get the last packet recieve time
AndyA 6:2c77afdf7367 101 * @return the internal time stamp for the last packet Rx
AndyA 6:2c77afdf7367 102 *
AndyA 6:2c77afdf7367 103 * Time is counted on a clock running at 499.2MHz * 128 (~15.65ps)
AndyA 6:2c77afdf7367 104 * This value is raw time minus user set Rx antenna delay.
AndyA 6:2c77afdf7367 105 */
AndyA 0:bddb8cd5e7df 106 uint64_t getRXTimestamp();
AndyA 6:2c77afdf7367 107
AndyA 6:2c77afdf7367 108 /** Get the last packet transmit time
AndyA 6:2c77afdf7367 109 * @return the internal time stamp for the last packet Tx
AndyA 6:2c77afdf7367 110 *
AndyA 6:2c77afdf7367 111 * Time is counted on a clock running at 499.2MHz * 128 (~15.65ps)
AndyA 6:2c77afdf7367 112 * This value is raw time plus user set Tx antenna delay to give time at the antenna.
AndyA 6:2c77afdf7367 113 */
AndyA 0:bddb8cd5e7df 114 uint64_t getTXTimestamp();
AndyA 0:bddb8cd5e7df 115
AndyA 6:2c77afdf7367 116 /** Send a packet
AndyA 6:2c77afdf7367 117 * @param message A buffer containing the data to send
AndyA 6:2c77afdf7367 118 * @param length The length of the data in bytes.
AndyA 6:2c77afdf7367 119 *
AndyA 6:2c77afdf7367 120 * The supplied packet is transmitted as soon as possible and the reciever re-enabled once transmission is complete.
AndyA 6:2c77afdf7367 121 * Maximum packet size is 125 bytes.
AndyA 6:2c77afdf7367 122 */
AndyA 0:bddb8cd5e7df 123 void sendFrame(uint8_t* message, uint16_t length); // send a raw frame (length in bytes)
AndyA 6:2c77afdf7367 124
AndyA 6:2c77afdf7367 125 /** Send a packet at a certain time
AndyA 6:2c77afdf7367 126 * @param message A buffer containing the data to send
AndyA 6:2c77afdf7367 127 * @param length The length of the data in bytes.
AndyA 6:2c77afdf7367 128 * @param TxTimestamp The timestamp to send the packet.
AndyA 6:2c77afdf7367 129 *
AndyA 6:2c77afdf7367 130 * The supplied packet is transmitted once the internal clock reaches the specified timestamp.
AndyA 6:2c77afdf7367 131 * Maximum packet size is 125 bytes.
AndyA 6:2c77afdf7367 132 * Rx is disabled as soon as this command is issued and re-enabled once transmission is complete.
AndyA 6:2c77afdf7367 133 * Note - 9 LSBs are ignored so timings are only accurate to ~8ns. For more accurate timing check the
AndyA 6:2c77afdf7367 134 * tx timestamp after transmission is complete.
AndyA 6:2c77afdf7367 135 */
AndyA 0:bddb8cd5e7df 136 void sendDelayedFrame(uint8_t* message, uint16_t length, uint64_t TxTimestamp);
AndyA 0:bddb8cd5e7df 137
AndyA 6:2c77afdf7367 138 /** Set up data for a transmit on sync
AndyA 6:2c77afdf7367 139 * @param message A buffer containing the data to send
AndyA 6:2c77afdf7367 140 * @param length The length of the data in bytes.
AndyA 6:2c77afdf7367 141 *
AndyA 6:2c77afdf7367 142 * Data is loaded into the transmit buffer but the transmission is not started.
AndyA 6:2c77afdf7367 143 * Maximum packet size is 125 bytes.
AndyA 6:2c77afdf7367 144 */
AndyA 0:bddb8cd5e7df 145 void setupSyncedFrame(uint8_t* message, uint16_t length);
AndyA 6:2c77afdf7367 146
AndyA 6:2c77afdf7367 147 /** Transmit on the next sync pulse
AndyA 6:2c77afdf7367 148 *
AndyA 6:2c77afdf7367 149 * On the next rising edge of the sync line the transmitter will be activated.
AndyA 6:2c77afdf7367 150 * The packet must have previously been set up using setupSyncedFrame()
AndyA 6:2c77afdf7367 151 *
AndyA 6:2c77afdf7367 152 * Rx is disabled until transmission is complete.
AndyA 6:2c77afdf7367 153 */
AndyA 0:bddb8cd5e7df 154 void armSyncedFrame();
AndyA 0:bddb8cd5e7df 155
AndyA 6:2c77afdf7367 156 /** Enable reciever
AndyA 6:2c77afdf7367 157 *
AndyA 6:2c77afdf7367 158 * This is automatically done after each Tx completes but can also be forced manually
AndyA 6:2c77afdf7367 159 */
AndyA 0:bddb8cd5e7df 160 void startRX(); // start listening for frames
AndyA 6:2c77afdf7367 161
AndyA 6:2c77afdf7367 162 /** Disable radio link
AndyA 6:2c77afdf7367 163 *
AndyA 6:2c77afdf7367 164 * Disables both the recieve and transmit systems.
AndyA 6:2c77afdf7367 165 * Any transmissions waiting for a delayed time or sync pulse will be canceled.
AndyA 6:2c77afdf7367 166 */
AndyA 0:bddb8cd5e7df 167 void stopTRX(); // disable tranceiver go back to idle mode
AndyA 0:bddb8cd5e7df 168
AndyA 6:2c77afdf7367 169 /** Set receive antenna delay
AndyA 6:2c77afdf7367 170 * @param ticks Delay in system clock cycles
AndyA 6:2c77afdf7367 171 */
AndyA 0:bddb8cd5e7df 172 void setRxDelay(uint16_t ticks);
AndyA 6:2c77afdf7367 173 /** Set transmit antenna delay
AndyA 6:2c77afdf7367 174 * @param ticks Delay in system clock cycles
AndyA 6:2c77afdf7367 175 */
AndyA 0:bddb8cd5e7df 176 void setTxDelay(uint16_t ticks);
AndyA 0:bddb8cd5e7df 177
AndyA 8:0b408e77b701 178
AndyA 8:0b408e77b701 179 /** Set receive antenna delay in meters
AndyA 8:0b408e77b701 180 * @param errorDistance Delay in meters at speed of light
AndyA 8:0b408e77b701 181 */
AndyA 8:0b408e77b701 182 void setRxDelayDistance(double errorDistance) {
AndyA 8:0b408e77b701 183 setRxDelay(errorDistance/c_mPerTick);
AndyA 8:0b408e77b701 184 };
AndyA 8:0b408e77b701 185
AndyA 8:0b408e77b701 186 /** Set transmit antenna delay in meters
AndyA 8:0b408e77b701 187 * @param errorDistance Delay in meters at speed of light
AndyA 8:0b408e77b701 188 */
AndyA 8:0b408e77b701 189 void setTxDelayDistance(double errorDistance) {
AndyA 8:0b408e77b701 190 setTxDelay(errorDistance/c_mPerTick);
AndyA 8:0b408e77b701 191 };
AndyA 8:0b408e77b701 192
AndyA 6:2c77afdf7367 193 /** Get last packet size
AndyA 6:2c77afdf7367 194 * @return The length in bytes of the last packet received
AndyA 6:2c77afdf7367 195 */
AndyA 0:bddb8cd5e7df 196 uint16_t getFramelength(); // to get the framelength of the received frame from the PHY header
AndyA 0:bddb8cd5e7df 197
AndyA 6:2c77afdf7367 198 /** Get last recieved packet
AndyA 6:2c77afdf7367 199 * @param buffer The location to put the received data
AndyA 6:2c77afdf7367 200 * @param length The number of bytes to read
AndyA 6:2c77afdf7367 201 */
AndyA 0:bddb8cd5e7df 202 void readRxBuffer( uint8_t *buffer, int length ) {
AndyA 0:bddb8cd5e7df 203 readRegister(DW1000_RX_BUFFER, 0, buffer, length);
AndyA 0:bddb8cd5e7df 204 }
AndyA 0:bddb8cd5e7df 205
AndyA 6:2c77afdf7367 206 /** Read a value from the OTP memory
AndyA 6:2c77afdf7367 207 * @param word_address The OTP memory address to read.
AndyA 6:2c77afdf7367 208 * @return The 32 bit value at that address.
AndyA 6:2c77afdf7367 209 *
AndyA 6:2c77afdf7367 210 * See Section 6.3.1 of the user manual for the memory map.
AndyA 6:2c77afdf7367 211 */
AndyA 1:dcbd071f38d5 212 uint32_t readOTP (uint16_t word_address);
AndyA 6:2c77afdf7367 213
AndyA 6:2c77afdf7367 214 /** Write a value to the OTP memory
AndyA 6:2c77afdf7367 215 * @param word_address The OTP memory address to read.
AndyA 6:2c77afdf7367 216 * @param data The value to write
AndyA 6:2c77afdf7367 217 * @return True if the write was sucessful.
AndyA 6:2c77afdf7367 218 *
AndyA 6:2c77afdf7367 219 * Writes the supplied data to the OTP memory and then reads it back to verify it was sucessfully programmed.
AndyA 6:2c77afdf7367 220 * Note - this is a one time operation for each memory address.
AndyA 6:2c77afdf7367 221 * See Section 6.3.1 of the user manual for the memory map.
AndyA 6:2c77afdf7367 222 * It is recommened that the device is reset or power cycled after programing.
AndyA 6:2c77afdf7367 223 */
AndyA 0:bddb8cd5e7df 224 bool writeOTP(uint16_t word_address,uint32_t data); // program a value in the OTP. It is recommended to reset afterwards.
AndyA 0:bddb8cd5e7df 225
AndyA 8:0b408e77b701 226 /** get the current radio configuration
AndyA 8:0b408e77b701 227 * @return A pointer to a DW1000Setup object of the current setup.
AndyA 4:5f1025df5530 228 *
AndyA 8:0b408e77b701 229 * Note to change the setup you must make a copy of the current setup and then pass that to applySetup().
AndyA 8:0b408e77b701 230 */
AndyA 8:0b408e77b701 231 DW1000Setup *getSetup();
AndyA 8:0b408e77b701 232
AndyA 8:0b408e77b701 233 /** apply a new radio setup to the UWB system
AndyA 8:0b408e77b701 234 * @param setup The new settings to use
AndyA 8:0b408e77b701 235 * @return true if the setup was applied.
AndyA 4:5f1025df5530 236 *
AndyA 8:0b408e77b701 237 * The setup object supplied is copied and can be disposed of after the call.
AndyA 8:0b408e77b701 238 * If the supplied setup fails DW1000Setup::check() then it is ignored and the function returns false.
AndyA 4:5f1025df5530 239 */
AndyA 8:0b408e77b701 240 // bool applySetup(DW1000Setup *setup);
AndyA 8:0b408e77b701 241
AndyA 8:0b408e77b701 242
AndyA 8:0b408e77b701 243 uint32_t readRegister32(uint8_t reg, uint16_t subaddress);
AndyA 8:0b408e77b701 244 void setTxPower(uint16_t normalPowercB, uint16_t boost500 = 0, uint16_t boost250 = 0, uint16_t boost125 = 0);
AndyA 4:5f1025df5530 245
AndyA 0:bddb8cd5e7df 246 protected:
AndyA 6:2c77afdf7367 247 /** Reset the reciever logic
AndyA 6:2c77afdf7367 248 *
AndyA 6:2c77afdf7367 249 * This should be done after any receive errors
AndyA 6:2c77afdf7367 250 */
AndyA 0:bddb8cd5e7df 251 void resetRX(); // soft reset only the tranciever part of DW1000
AndyA 6:2c77afdf7367 252
AndyA 6:2c77afdf7367 253 /** Enable/Disable interrupts
AndyA 6:2c77afdf7367 254 * @param RX true to enable recieve interrupts
AndyA 6:2c77afdf7367 255 * @param TX true to enable transmit interrupts
AndyA 6:2c77afdf7367 256 *
AndyA 6:2c77afdf7367 257 * For c style callbacks simply set the callback to null to disable it.
AndyA 6:2c77afdf7367 258 * When using c++ style callbacks both are enabled as default, this allows a method to disabled one or both.
AndyA 6:2c77afdf7367 259 */
AndyA 0:bddb8cd5e7df 260 void setInterrupt(bool RX, bool TX); // set Interrupt for received a good frame (CRC ok) or transmission done
AndyA 0:bddb8cd5e7df 261
AndyA 3:1459d2aa6b97 262 /** Set Transmit gain
AndyA 3:1459d2aa6b97 263 *
AndyA 3:1459d2aa6b97 264 * @param normalPowercB Normal transmit gain to use.
AndyA 3:1459d2aa6b97 265 * @param boost500 Gain to use for 6.8Mb/s packets of under 500ms.
AndyA 3:1459d2aa6b97 266 * @param boost250 Gain to use for 6.8Mb/s packets of under 250ms.
AndyA 3:1459d2aa6b97 267 * @param boost125 Gain to use for 6.8Mb/s packets of under 125ms.
AndyA 3:1459d2aa6b97 268 *
AndyA 3:1459d2aa6b97 269 * All gains are in cB (dB * 10). Gains can be between 0 and 335 (33.5dB).
AndyA 3:1459d2aa6b97 270 * Boost gains are optional, if not specified boost gains are set to the power for the lower rate (e.g. boost125 is set to the boost250 level).
AndyA 3:1459d2aa6b97 271 */
AndyA 8:0b408e77b701 272 // void setTxPower(uint16_t normalPowercB, uint16_t boost500 = 0, uint16_t boost250 = 0, uint16_t boost125 = 0);
AndyA 3:1459d2aa6b97 273
AndyA 8:0b408e77b701 274
AndyA 0:bddb8cd5e7df 275
AndyA 0:bddb8cd5e7df 276 private:
AndyA 0:bddb8cd5e7df 277 void resetAll(); // soft reset the entire DW1000 (some registers stay as they were see User Manual)
AndyA 3:1459d2aa6b97 278
AndyA 3:1459d2aa6b97 279 void setupRadio();
AndyA 3:1459d2aa6b97 280
AndyA 4:5f1025df5530 281 // system register setup functions
AndyA 3:1459d2aa6b97 282 void setupAGC();
AndyA 3:1459d2aa6b97 283 void setupRxConfig();
AndyA 3:1459d2aa6b97 284 void setupLDE();
AndyA 3:1459d2aa6b97 285 void setupChannel();
AndyA 3:1459d2aa6b97 286 void setupTxFrameCtrl();
AndyA 3:1459d2aa6b97 287 void setupAnalogRF();
AndyA 3:1459d2aa6b97 288 void setupFreqSynth();
AndyA 3:1459d2aa6b97 289 void setupTxCalibration();
AndyA 3:1459d2aa6b97 290 void setupSystemConfig();
AndyA 0:bddb8cd5e7df 291 void loadLDE(); // load the leading edge detection algorithm to RAM, [IMPORTANT because receiving malfunction may occur] see User Manual LDELOAD on p22 & p158
AndyA 0:bddb8cd5e7df 292 void loadLDOTUNE(); // load the LDO tuning as set in the factory
AndyA 0:bddb8cd5e7df 293
AndyA 3:1459d2aa6b97 294 uint8_t powerToRegValue(uint16_t powercB);
AndyA 3:1459d2aa6b97 295
AndyA 4:5f1025df5530 296 DW1000Setup systemConfig;
AndyA 3:1459d2aa6b97 297
AndyA 0:bddb8cd5e7df 298
AndyA 0:bddb8cd5e7df 299
AndyA 0:bddb8cd5e7df 300 // Interrupt
AndyA 0:bddb8cd5e7df 301 InterruptIn irq; // Pin used to handle Events from DW1000 by an Interrupthandler
AndyA 0:bddb8cd5e7df 302 FunctionPointer callbackRX; // function pointer to callback which is called when successfull RX took place
AndyA 0:bddb8cd5e7df 303 FunctionPointer callbackTX; // function pointer to callback which is called when successfull TX took place
AndyA 0:bddb8cd5e7df 304 void ISR(); // interrupt handling method (also calls according callback methods)
AndyA 0:bddb8cd5e7df 305
AndyA 0:bddb8cd5e7df 306 // SPI Inteface
AndyA 7:b13881dbb09d 307 BurstSPI spi; // SPI Bus
AndyA 0:bddb8cd5e7df 308 DigitalOut cs; // Slave selector for SPI-Bus (here explicitly needed to start and end SPI transactions also usable to wake up DW1000)
AndyA 0:bddb8cd5e7df 309
AndyA 0:bddb8cd5e7df 310 uint8_t readRegister8(uint8_t reg, uint16_t subaddress); // expressive methods to read or write the number of bits written in the name
AndyA 0:bddb8cd5e7df 311 uint16_t readRegister16(uint8_t reg, uint16_t subaddress);
AndyA 8:0b408e77b701 312 // uint32_t readRegister32(uint8_t reg, uint16_t subaddress);
AndyA 0:bddb8cd5e7df 313 uint64_t readRegister40(uint8_t reg, uint16_t subaddress);
AndyA 0:bddb8cd5e7df 314 uint64_t readRegister64(uint8_t reg, uint16_t subaddress);
AndyA 0:bddb8cd5e7df 315 void writeRegister8(uint8_t reg, uint16_t subaddress, uint8_t buffer);
AndyA 0:bddb8cd5e7df 316 void writeRegister16(uint8_t reg, uint16_t subaddress, uint16_t buffer);
AndyA 0:bddb8cd5e7df 317 void writeRegister32(uint8_t reg, uint16_t subaddress, uint32_t buffer);
AndyA 0:bddb8cd5e7df 318 void writeRegister40(uint8_t reg, uint16_t subaddress, uint64_t buffer);
AndyA 0:bddb8cd5e7df 319
AndyA 0:bddb8cd5e7df 320 void readRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length); // reads the selected part of a slave register into the buffer memory
AndyA 0:bddb8cd5e7df 321 void writeRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length); // writes the buffer memory to the selected slave register
AndyA 0:bddb8cd5e7df 322 void setupTransaction(uint8_t reg, uint16_t subaddress, bool write); // sets up an SPI read or write transaction with correct register address and offset
AndyA 0:bddb8cd5e7df 323 void select(); // selects the only slave for a transaction
AndyA 0:bddb8cd5e7df 324 void deselect(); // deselects the only slave after transaction
AndyA 0:bddb8cd5e7df 325 };
AndyA 0:bddb8cd5e7df 326
AndyA 0:bddb8cd5e7df 327 #endif