kl25z_clock.cpp

00001 #include <stdint.h>
00002 #include "MKL25Z4.h"
00003 
00004 #include "kl25z_clock.h"
00005 #include "board.h"
00006 
00007 void switchFEItoPEE( void )
00008 {
00009     /* SIM->SCGC5: PORTA=1 */
00010     SIM->SCGC5 |= (uint32_t)0x0200UL;     /* Enable clock gate for ports to enable pin routing */
00011     /* SIM->CLKDIV1: OUTDIV1=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
00012     //SIM->CLKDIV1 = (uint32_t)0x10010000UL; /* Update system prescalers */
00013     /* SIM->CLKDIV1: OUTDIV1=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,OUTDIV4=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
00014     SIM->CLKDIV1 = (uint32_t)0x10010000UL; /* Update system prescalers */
00015     /* PORTA->PCR18: ISF=0,MUX=0 */
00016     PORTA->PCR[18] &= (uint32_t)~0x01000700UL;
00017     /* PORTA->PCR19: ISF=0,MUX=0 */
00018     PORTA->PCR[19] &= (uint32_t)~0x01000700UL;
00019     /* Switch to FBE Mode */
00020     /* OSC0->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=1,SC4P=0,SC8P=0,SC16P=1 */
00021     OSC0->CR = (uint8_t)0x89U;
00022     /* MCG->C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=1,LP=0,IRCS=0 */
00023     MCG->C2 = (uint8_t)0x24U;
00024     /* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
00025     MCG->C1 = (uint8_t)0x9AU;
00026     /* MCG->C4: DMX32=0,DRST_DRS=0 */
00027     MCG->C4 &= (uint8_t)~(uint8_t)0xE0U;
00028     /* MCG->C5: ??=0,PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=1 */
00029     MCG->C5 = (uint8_t)0x01U;
00030     /* MCG->C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */
00031     MCG->C6 = (uint8_t)0x00U;
00032     while((MCG->S & MCG_S_IREFST_MASK) != 0x00U) { /* Check that the source of the FLL reference clock is the external reference clock. */
00033     }
00034     while((MCG->S & 0x0CU) != 0x08U) {    /* Wait until external reference clock is selected as MCG output */
00035     }
00036     /* Switch to PBE Mode */
00037     /* MCG->C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=0 */
00038     MCG->C6 = (uint8_t)0x40U;
00039     while((MCG->S & 0x0CU) != 0x08U) {    /* Wait until external reference clock is selected as MCG output */
00040     }
00041     while((MCG->S & MCG_S_LOCK0_MASK) == 0x00U) { /* Wait until locked */
00042     }
00043     /* Switch to PEE Mode */
00044     /* MCG->C1: CLKS=0,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
00045     MCG->C1 = (uint8_t)0x1AU;
00046     while((MCG->S & 0x0CU) != 0x0CU) {    /* Wait until output of the PLL is selected */
00047     }
00048     
00049     /* Run this to get the new system frequency */
00050     //SIM->CLKDIV1 = (uint32_t)0x20000000UL; /* Update system prescalers */
00051     SystemCoreClockUpdate();
00052     
00053 }
00054  
00055 void switchPEEtoBLPI( void )
00056 {
00057     
00058     
00059     // Move to PBE
00060     MCG->C1 = (uint8_t)0x90U;                       /* Switch the system clock source to the external reference clock */
00061     while((MCG->S & MCG_S_CLKST_MASK) != 0x2U<<MCG_S_CLKST_SHIFT) {   /* Wait until external reference clock is selected as MCG output */
00062     }
00063     
00064     
00065     // Move to FBE
00066     MCG->C6 = (uint8_t)0x00U;                       /* Select FLL */
00067     while((MCG->S & MCG_S_PLLST_MASK) != 0x00U) {   /* Wait until the current source for the PLLS clock is the FLL */
00068     }
00069     
00070     // Ok till here
00071     
00072     // Move to FBI
00073     MCG->C1 = (uint8_t)0x54U;                       /* Switch the system clock to the internal reference clock */
00074     while((MCG->S & MCG_S_IREFST_MASK) != 0x00U) {   /* Wait until the current source for the PLLS clock is the FLL */
00075     }
00076     while((MCG->S & MCG_S_CLKST_MASK) != 0x1U << MCG_S_CLKST_SHIFT) {   /* Wait until the the internal reference clock is selected to feed MCGOUTCLK */
00077     }
00078     
00079     // Move to BLPI
00080     MCG->C2 = (uint8_t)0x02;                     /* LP is 1 */
00081     MCG->C1 |= MCG_C1_IRCLKEN_MASK;              /* Clock is always active */
00082     
00083     /* Run this to get the new system frequency */
00084     //SystemCoreClockUpdate();
00085     
00086 }
00087 
00088 void switchBLPItoFEI( void )
00089 {
00090     // Move to FBI
00091     /* LP is 0 */
00092     MCG->C2 = (uint8_t) 0x00;                     
00093     
00094     // Move to FEI
00095     /* Update system prescalers */
00096     SIM->CLKDIV1 = (uint32_t)0x00020000UL;          
00097     /* MCG->C1: CLKS=0,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
00098     MCG->C1 = (uint8_t)0x06U;
00099     /* MCG_C2: LOCRE0=0,??=0,RANGE0=0,HGO0=0,EREFS0=0,LP=0,IRCS=0 */
00100     MCG->C2 = (uint8_t)0x00U;
00101     /* MCG->C4: DMX32=0,DRST_DRS=1 */
00102     MCG->C4 = (uint8_t)((MCG->C4 & (uint8_t)~(uint8_t)0xC0U) | (uint8_t)0x20U);
00103     /* OSC0->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
00104     OSC0->CR = (uint8_t)0x80U;
00105     /* MCG->C5: ??=0,PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */
00106     MCG->C5 = (uint8_t)0x00U;
00107     /* MCG->C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */
00108     MCG->C6 = (uint8_t)0x00U;
00109     while((MCG->S & MCG_S_IREFST_MASK) == 0x00U) { /* Check that the source of the FLL reference clock is the internal reference clock. */
00110     }
00111     while((MCG->S & 0x0CU) != 0x00U) {    /* Wait until output of the FLL is selected */
00112     } 
00113     
00114     /* Run this to get the new system frequency */
00115     SystemCoreClockUpdate();
00116 }