Akinori Hashimoto / MCP4922

MCP4922 Lib

Fork of MCP4922 by Akinori Hashimoto

MCP4922.h@0:be25d2147046, 2017-09-25 (annotated)

Committer:
AkinoriHashimoto
Date:
Mon Sep 25 05:48:38 2017 +0000
Revision:
0:be25d2147046
MCP4922 Lib.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AkinoriHashimoto 0:be25d2147046 1 /**
AkinoriHashimoto 0:be25d2147046 2 *
AkinoriHashimoto 0:be25d2147046 3 * 12bit Resolution. Dual-channel and Rail-to-Rail Output.
AkinoriHashimoto 0:be25d2147046 4 * SPI Interface with 20MHz. Latching Dual output with LDAC.
AkinoriHashimoto 0:be25d2147046 5 * Seting time of 4.5us. Selectable 1x or 2x Gain.
AkinoriHashimoto 0:be25d2147046 6 * Vdd supplied 2.7 to 5.5V, Vref < Vdd.
AkinoriHashimoto 0:be25d2147046 7 * LDAC setup time: 40ns, pulse: 100ns.
AkinoriHashimoto 0:be25d2147046 8 */
AkinoriHashimoto 0:be25d2147046 9
AkinoriHashimoto 0:be25d2147046 10 /** @code
AkinoriHashimoto 0:be25d2147046 11
AkinoriHashimoto 0:be25d2147046 12 * @endcode
AkinoriHashimoto 0:be25d2147046 13 */
AkinoriHashimoto 0:be25d2147046 14
AkinoriHashimoto 0:be25d2147046 15 #pragma once
AkinoriHashimoto 0:be25d2147046 16
AkinoriHashimoto 0:be25d2147046 17 #include "mbed.h"
AkinoriHashimoto 0:be25d2147046 18
AkinoriHashimoto 0:be25d2147046 19 class MCP4922{
AkinoriHashimoto 0:be25d2147046 20 public:
AkinoriHashimoto 0:be25d2147046 21 // With LatchPin
AkinoriHashimoto 0:be25d2147046 22 /** Constructor;
AkinoriHashimoto 0:be25d2147046 23 * @param mosi, sck, cs, latch
AkinoriHashimoto 0:be25d2147046 24 */
AkinoriHashimoto 0:be25d2147046 25 MCP4922(PinName mosi, PinName sck, PinName _cs, PinName _latch);
AkinoriHashimoto 0:be25d2147046 26 /** Constructor;
AkinoriHashimoto 0:be25d2147046 27 * @param spi's ptr, cs, latch
AkinoriHashimoto 0:be25d2147046 28 */
AkinoriHashimoto 0:be25d2147046 29 MCP4922(SPI &_spi, PinName _cs, PinName _latch);
AkinoriHashimoto 0:be25d2147046 30
AkinoriHashimoto 0:be25d2147046 31 // W/O LatchPin
AkinoriHashimoto 0:be25d2147046 32 /** Constructor;
AkinoriHashimoto 0:be25d2147046 33 * @param mosi, sck, cs
AkinoriHashimoto 0:be25d2147046 34 */
AkinoriHashimoto 0:be25d2147046 35 MCP4922(PinName mosi, PinName sck, PinName _cs);
AkinoriHashimoto 0:be25d2147046 36 /** Constructor;
AkinoriHashimoto 0:be25d2147046 37 * @param spi's ptr, cs
AkinoriHashimoto 0:be25d2147046 38 */
AkinoriHashimoto 0:be25d2147046 39 MCP4922(SPI &_spi, PinName _cs);
AkinoriHashimoto 0:be25d2147046 40 ~MCP4922();
AkinoriHashimoto 0:be25d2147046 41 // ******************** enable printf() future of C-language. ****************
AkinoriHashimoto 0:be25d2147046 42
AkinoriHashimoto 0:be25d2147046 43 enum ERR{
AkinoriHashimoto 0:be25d2147046 44 SUCCESS, ERR_HZ, ERR_GAIN, ERR_VAL
AkinoriHashimoto 0:be25d2147046 45 };
AkinoriHashimoto 0:be25d2147046 46 enum CH{
AkinoriHashimoto 0:be25d2147046 47 chA, chB
AkinoriHashimoto 0:be25d2147046 48 };
AkinoriHashimoto 0:be25d2147046 49
AkinoriHashimoto 0:be25d2147046 50 /** ESENTIAL FUNC.; Initialize Configlation.
AkinoriHashimoto 0:be25d2147046 51 *
AkinoriHashimoto 0:be25d2147046 52 * @param hz; freq. of SPI.
AkinoriHashimoto 0:be25d2147046 53 * @param gainA/B; output gain select 1x|2x. Vref*gain.
AkinoriHashimoto 0:be25d2147046 54 * @param bufA/B; Normally off(false); Buffered= true;
AkinoriHashimoto 0:be25d2147046 55 */
AkinoriHashimoto 0:be25d2147046 56 MCP4922::ERR init(int hz= 20000000, int gainA= 1, int gainB= 1,
AkinoriHashimoto 0:be25d2147046 57 bool bufA= false, bool bufB= false);
AkinoriHashimoto 0:be25d2147046 58
AkinoriHashimoto 0:be25d2147046 59 /** Set Value
AkinoriHashimoto 0:be25d2147046 60 * @param A, B; 0-4095 (12bit)
AkinoriHashimoto 0:be25d2147046 61 */
AkinoriHashimoto 0:be25d2147046 62 void setVal(int valA, int valB);
AkinoriHashimoto 0:be25d2147046 63
AkinoriHashimoto 0:be25d2147046 64 /** Set Value
AkinoriHashimoto 0:be25d2147046 65 * @param A, B; 0.0f-1.0f (12bit)
AkinoriHashimoto 0:be25d2147046 66 */
AkinoriHashimoto 0:be25d2147046 67 void setVal(float valA, float valB);
AkinoriHashimoto 0:be25d2147046 68
AkinoriHashimoto 0:be25d2147046 69 /** Set Value
AkinoriHashimoto 0:be25d2147046 70 * @param val; 0-4095 (12bit)
AkinoriHashimoto 0:be25d2147046 71 */
AkinoriHashimoto 0:be25d2147046 72 void setVal(CH ch, int val);
AkinoriHashimoto 0:be25d2147046 73
AkinoriHashimoto 0:be25d2147046 74 /** Set Value
AkinoriHashimoto 0:be25d2147046 75 * @param val; 0.0f-1.0f (12bit)
AkinoriHashimoto 0:be25d2147046 76 */
AkinoriHashimoto 0:be25d2147046 77 void setVal(CH ch, float val);
AkinoriHashimoto 0:be25d2147046 78
AkinoriHashimoto 0:be25d2147046 79 /** Write ALL with update-output(latch off).
AkinoriHashimoto 0:be25d2147046 80 */
AkinoriHashimoto 0:be25d2147046 81 void write();
AkinoriHashimoto 0:be25d2147046 82
AkinoriHashimoto 0:be25d2147046 83 /** Write
AkinoriHashimoto 0:be25d2147046 84 */
AkinoriHashimoto 0:be25d2147046 85 void write(CH ch, bool latch= true);
AkinoriHashimoto 0:be25d2147046 86
AkinoriHashimoto 0:be25d2147046 87 /** Update
AkinoriHashimoto 0:be25d2147046 88 */
AkinoriHashimoto 0:be25d2147046 89 void update();
AkinoriHashimoto 0:be25d2147046 90
AkinoriHashimoto 0:be25d2147046 91 private:
AkinoriHashimoto 0:be25d2147046 92 // using i2c
AkinoriHashimoto 0:be25d2147046 93 SPI *p_spi;
AkinoriHashimoto 0:be25d2147046 94 SPI &spi;
AkinoriHashimoto 0:be25d2147046 95 DigitalOut cs;
AkinoriHashimoto 0:be25d2147046 96 DigitalOut latch;
AkinoriHashimoto 0:be25d2147046 97
AkinoriHashimoto 0:be25d2147046 98 bool _bufA, _bufB, _gainA, _gainB;
AkinoriHashimoto 0:be25d2147046 99
AkinoriHashimoto 0:be25d2147046 100 uint16_t valA, valB;
AkinoriHashimoto 0:be25d2147046 101 // bitset<16> valA(0); // 16bit 2Byte.
AkinoriHashimoto 0:be25d2147046 102 // bitset<16> valB(0); // 16bit 2Byte.
AkinoriHashimoto 0:be25d2147046 103
AkinoriHashimoto 0:be25d2147046 104 void _write(uint16_t val);
AkinoriHashimoto 0:be25d2147046 105
AkinoriHashimoto 0:be25d2147046 106 bool useLPin;
AkinoriHashimoto 0:be25d2147046 107 };
AkinoriHashimoto 0:be25d2147046 108
AkinoriHashimoto 0:be25d2147046 109 // EOF