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Dependents:   Nucleo_L432KC_Quadrature_Decoder_with_ADC_and_DAC

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targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/system_MK66F18.h@161:bd0311f1ad86, 2017-05-27 (annotated)

Committer:
tonnyleonard
Date:
Sat May 27 01:26:18 2017 +0000
Revision:
161:bd0311f1ad86
Parent:
154:37f96f9d4de2 
Testing ADC with shunt

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /*
<> 154:37f96f9d4de2 2 ** ###################################################################
<> 154:37f96f9d4de2 3 ** Processors: MK66FN2M0VLQ18
<> 154:37f96f9d4de2 4 ** MK66FN2M0VMD18
<> 154:37f96f9d4de2 5 ** MK66FX1M0VLQ18
<> 154:37f96f9d4de2 6 ** MK66FX1M0VMD18
<> 154:37f96f9d4de2 7 **
<> 154:37f96f9d4de2 8 ** Compilers: Keil ARM C/C++ Compiler
<> 154:37f96f9d4de2 9 ** Freescale C/C++ for Embedded ARM
<> 154:37f96f9d4de2 10 ** GNU C Compiler
<> 154:37f96f9d4de2 11 ** IAR ANSI C/C++ Compiler for ARM
<> 154:37f96f9d4de2 12 **
<> 154:37f96f9d4de2 13 ** Reference manual: K66P144M180SF5RMV2, Rev. 1, Mar 2015
<> 154:37f96f9d4de2 14 ** Version: rev. 3.0, 2015-03-25
<> 154:37f96f9d4de2 15 ** Build: b151216
<> 154:37f96f9d4de2 16 **
<> 154:37f96f9d4de2 17 ** Abstract:
<> 154:37f96f9d4de2 18 ** Provides a system configuration function and a global variable that
<> 154:37f96f9d4de2 19 ** contains the system frequency. It configures the device and initializes
<> 154:37f96f9d4de2 20 ** the oscillator (PLL) that is part of the microcontroller device.
<> 154:37f96f9d4de2 21 **
<> 154:37f96f9d4de2 22 ** Copyright (c) 2015 Freescale Semiconductor, Inc.
<> 154:37f96f9d4de2 23 ** All rights reserved.
<> 154:37f96f9d4de2 24 **
<> 154:37f96f9d4de2 25 ** Redistribution and use in source and binary forms, with or without modification,
<> 154:37f96f9d4de2 26 ** are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 27 **
<> 154:37f96f9d4de2 28 ** o Redistributions of source code must retain the above copyright notice, this list
<> 154:37f96f9d4de2 29 ** of conditions and the following disclaimer.
<> 154:37f96f9d4de2 30 **
<> 154:37f96f9d4de2 31 ** o Redistributions in binary form must reproduce the above copyright notice, this
<> 154:37f96f9d4de2 32 ** list of conditions and the following disclaimer in the documentation and/or
<> 154:37f96f9d4de2 33 ** other materials provided with the distribution.
<> 154:37f96f9d4de2 34 **
<> 154:37f96f9d4de2 35 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 154:37f96f9d4de2 36 ** contributors may be used to endorse or promote products derived from this
<> 154:37f96f9d4de2 37 ** software without specific prior written permission.
<> 154:37f96f9d4de2 38 **
<> 154:37f96f9d4de2 39 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 154:37f96f9d4de2 40 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 154:37f96f9d4de2 41 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 42 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 154:37f96f9d4de2 43 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 154:37f96f9d4de2 44 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 154:37f96f9d4de2 45 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 154:37f96f9d4de2 46 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 154:37f96f9d4de2 47 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 154:37f96f9d4de2 48 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 49 **
<> 154:37f96f9d4de2 50 ** http: www.freescale.com
<> 154:37f96f9d4de2 51 ** mail: support@freescale.com
<> 154:37f96f9d4de2 52 **
<> 154:37f96f9d4de2 53 ** Revisions:
<> 154:37f96f9d4de2 54 ** - rev. 1.0 (2013-09-02)
<> 154:37f96f9d4de2 55 ** Initial version.
<> 154:37f96f9d4de2 56 ** - rev. 2.0 (2014-02-17)
<> 154:37f96f9d4de2 57 ** Register accessor macros added to the memory map.
<> 154:37f96f9d4de2 58 ** Symbols for Processor Expert memory map compatibility added to the memory map.
<> 154:37f96f9d4de2 59 ** Startup file for gcc has been updated according to CMSIS 3.2.
<> 154:37f96f9d4de2 60 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
<> 154:37f96f9d4de2 61 ** Update according to reference manual rev. 2
<> 154:37f96f9d4de2 62 ** - rev. 2.1 (2014-04-16)
<> 154:37f96f9d4de2 63 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
<> 154:37f96f9d4de2 64 ** - rev. 2.2 (2014-10-14)
<> 154:37f96f9d4de2 65 ** Interrupt INT_LPTimer renamed to INT_LPTMR0, interrupt INT_Watchdog renamed to INT_WDOG_EWM.
<> 154:37f96f9d4de2 66 ** - rev. 2.3 (2014-11-20)
<> 154:37f96f9d4de2 67 ** Update according to reverence manual K65P169M180SF5RMV2_NDA, Rev. 0 Draft A, October 2014.
<> 154:37f96f9d4de2 68 ** Update of SystemInit() to use 16MHz external crystal.
<> 154:37f96f9d4de2 69 ** - rev. 2.4 (2015-02-19)
<> 154:37f96f9d4de2 70 ** Renamed interrupt vector LLW to LLWU.
<> 154:37f96f9d4de2 71 ** - rev. 3.0 (2015-03-25)
<> 154:37f96f9d4de2 72 ** Registers updated according to the reference manual revision 1, March 2015
<> 154:37f96f9d4de2 73 **
<> 154:37f96f9d4de2 74 ** ###################################################################
<> 154:37f96f9d4de2 75 */
<> 154:37f96f9d4de2 76
<> 154:37f96f9d4de2 77 /*!
<> 154:37f96f9d4de2 78 * @file MK66F18
<> 154:37f96f9d4de2 79 * @version 3.0
<> 154:37f96f9d4de2 80 * @date 2015-03-25
<> 154:37f96f9d4de2 81 * @brief Device specific configuration file for MK66F18 (header file)
<> 154:37f96f9d4de2 82 *
<> 154:37f96f9d4de2 83 * Provides a system configuration function and a global variable that contains
<> 154:37f96f9d4de2 84 * the system frequency. It configures the device and initializes the oscillator
<> 154:37f96f9d4de2 85 * (PLL) that is part of the microcontroller device.
<> 154:37f96f9d4de2 86 */
<> 154:37f96f9d4de2 87
<> 154:37f96f9d4de2 88 #ifndef _SYSTEM_MK66F18_H_
<> 154:37f96f9d4de2 89 #define _SYSTEM_MK66F18_H_ /**< Symbol preventing repeated inclusion */
<> 154:37f96f9d4de2 90
<> 154:37f96f9d4de2 91 #ifdef __cplusplus
<> 154:37f96f9d4de2 92 extern "C" {
<> 154:37f96f9d4de2 93 #endif
<> 154:37f96f9d4de2 94
<> 154:37f96f9d4de2 95 #include <stdint.h>
<> 154:37f96f9d4de2 96
<> 154:37f96f9d4de2 97
<> 154:37f96f9d4de2 98 #ifndef DISABLE_WDOG
<> 154:37f96f9d4de2 99 #define DISABLE_WDOG 1
<> 154:37f96f9d4de2 100 #endif
<> 154:37f96f9d4de2 101
<> 154:37f96f9d4de2 102 /* Define clock source values */
<> 154:37f96f9d4de2 103
<> 154:37f96f9d4de2 104 #define CPU_XTAL_CLK_HZ 16000000U /* Value of the external crystal or oscillator clock frequency of the system oscillator (OSC) in Hz */
<> 154:37f96f9d4de2 105 #define CPU_XTAL32k_CLK_HZ 32768U /* Value of the external 32k crystal or oscillator clock frequency of the RTC in Hz */
<> 154:37f96f9d4de2 106 #define CPU_INT_SLOW_CLK_HZ 32768U /* Value of the slow internal oscillator clock frequency in Hz */
<> 154:37f96f9d4de2 107 #define CPU_INT_FAST_CLK_HZ 4000000U /* Value of the fast internal oscillator clock frequency in Hz */
<> 154:37f96f9d4de2 108 #define CPU_INT_IRC_CLK_HZ 48000000U /* Value of the 48M internal oscillator clock frequency in Hz */
<> 154:37f96f9d4de2 109
<> 154:37f96f9d4de2 110 /* RTC oscillator setting */
<> 154:37f96f9d4de2 111 /* RTC_CR: SC2P=0,SC4P=0,SC8P=0,SC16P=0,CLKO=1,OSCE=1,WPS=0,UM=0,SUP=0,WPE=0,SWR=0 */
<> 154:37f96f9d4de2 112 #define SYSTEM_RTC_CR_VALUE 0x0300U /* RTC_CR */
<> 154:37f96f9d4de2 113
<> 154:37f96f9d4de2 114 /* Low power mode enable */
<> 154:37f96f9d4de2 115 /* SMC_PMPROT: AHSRUN=1,AVLP=1,ALLS=1,AVLLS=1 */
<> 154:37f96f9d4de2 116 #define SYSTEM_SMC_PMPROT_VALUE 0xAAU /* SMC_PMPROT */
<> 154:37f96f9d4de2 117
<> 154:37f96f9d4de2 118 #define DEFAULT_SYSTEM_CLOCK 20971520u
<> 154:37f96f9d4de2 119
<> 154:37f96f9d4de2 120
<> 154:37f96f9d4de2 121 /**
<> 154:37f96f9d4de2 122 * @brief System clock frequency (core clock)
<> 154:37f96f9d4de2 123 *
<> 154:37f96f9d4de2 124 * The system clock frequency supplied to the SysTick timer and the processor
<> 154:37f96f9d4de2 125 * core clock. This variable can be used by the user application to setup the
<> 154:37f96f9d4de2 126 * SysTick timer or configure other parameters. It may also be used by debugger to
<> 154:37f96f9d4de2 127 * query the frequency of the debug timer or configure the trace clock speed
<> 154:37f96f9d4de2 128 * SystemCoreClock is initialized with a correct predefined value.
<> 154:37f96f9d4de2 129 */
<> 154:37f96f9d4de2 130 extern uint32_t SystemCoreClock;
<> 154:37f96f9d4de2 131
<> 154:37f96f9d4de2 132 /**
<> 154:37f96f9d4de2 133 * @brief Setup the microcontroller system.
<> 154:37f96f9d4de2 134 *
<> 154:37f96f9d4de2 135 * Typically this function configures the oscillator (PLL) that is part of the
<> 154:37f96f9d4de2 136 * microcontroller device. For systems with variable clock speed it also updates
<> 154:37f96f9d4de2 137 * the variable SystemCoreClock. SystemInit is called from startup_device file.
<> 154:37f96f9d4de2 138 */
<> 154:37f96f9d4de2 139 void SystemInit (void);
<> 154:37f96f9d4de2 140
<> 154:37f96f9d4de2 141 /**
<> 154:37f96f9d4de2 142 * @brief Updates the SystemCoreClock variable.
<> 154:37f96f9d4de2 143 *
<> 154:37f96f9d4de2 144 * It must be called whenever the core clock is changed during program
<> 154:37f96f9d4de2 145 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
<> 154:37f96f9d4de2 146 * the current core clock.
<> 154:37f96f9d4de2 147 */
<> 154:37f96f9d4de2 148 void SystemCoreClockUpdate (void);
<> 154:37f96f9d4de2 149
<> 154:37f96f9d4de2 150 #ifdef __cplusplus
<> 154:37f96f9d4de2 151 }
<> 154:37f96f9d4de2 152 #endif
<> 154:37f96f9d4de2 153
<> 154:37f96f9d4de2 154 #endif /* _SYSTEM_MK66F18_H_ */