ON Semiconductor / mbed-os

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #ifndef MBED_PERIPHERALNAMES_H
group-onsemi 0:098463de4c5d 17 #define MBED_PERIPHERALNAMES_H
group-onsemi 0:098463de4c5d 18
group-onsemi 0:098463de4c5d 19 #include "cmsis.h"
group-onsemi 0:098463de4c5d 20
group-onsemi 0:098463de4c5d 21 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 22 extern "C" {
group-onsemi 0:098463de4c5d 23 #endif
group-onsemi 0:098463de4c5d 24
group-onsemi 0:098463de4c5d 25 typedef enum {
group-onsemi 0:098463de4c5d 26 OSC32KCLK = 0,
group-onsemi 0:098463de4c5d 27 RTC_CLKIN = 2
group-onsemi 0:098463de4c5d 28 } RTCName;
group-onsemi 0:098463de4c5d 29
group-onsemi 0:098463de4c5d 30 typedef enum {
group-onsemi 0:098463de4c5d 31 UART_0 = (int)UART0_BASE
group-onsemi 0:098463de4c5d 32 } UARTName;
group-onsemi 0:098463de4c5d 33
group-onsemi 0:098463de4c5d 34 #define STDIO_UART_TX USBTX
group-onsemi 0:098463de4c5d 35 #define STDIO_UART_RX USBRX
group-onsemi 0:098463de4c5d 36 #define STDIO_UART UART_0
group-onsemi 0:098463de4c5d 37
group-onsemi 0:098463de4c5d 38 typedef enum {
group-onsemi 0:098463de4c5d 39 I2C_0 = (int)I2C0_BASE,
group-onsemi 0:098463de4c5d 40 I2C_1 = -1
group-onsemi 0:098463de4c5d 41 } I2CName;
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 typedef enum {
group-onsemi 0:098463de4c5d 44 ADC0_SE0 = 0,
group-onsemi 0:098463de4c5d 45 ADC0_SE1 = 1,
group-onsemi 0:098463de4c5d 46 ADC0_SE2 = 2,
group-onsemi 0:098463de4c5d 47 ADC0_SE3 = 3,
group-onsemi 0:098463de4c5d 48 ADC0_SE4 = 4,
group-onsemi 0:098463de4c5d 49 ADC0_SE5 = 5,
group-onsemi 0:098463de4c5d 50 ADC0_SE6 = 6,
group-onsemi 0:098463de4c5d 51 ADC0_SE7 = 7,
group-onsemi 0:098463de4c5d 52 ADC0_SE8 = 8,
group-onsemi 0:098463de4c5d 53 ADC0_SE9 = 9,
group-onsemi 0:098463de4c5d 54 ADC0_SE10 = 10,
group-onsemi 0:098463de4c5d 55 ADC0_SE11 = 11,
group-onsemi 0:098463de4c5d 56 ADC0_SE12 = 12,
group-onsemi 0:098463de4c5d 57 ADC0_SE13 = 13
group-onsemi 0:098463de4c5d 58 } ADCName;
group-onsemi 0:098463de4c5d 59
group-onsemi 0:098463de4c5d 60 typedef enum {
group-onsemi 0:098463de4c5d 61 DAC_0 = 0
group-onsemi 0:098463de4c5d 62 } DACName;
group-onsemi 0:098463de4c5d 63
group-onsemi 0:098463de4c5d 64 typedef enum {
group-onsemi 0:098463de4c5d 65 SPI_0 = (int)SPI0_BASE
group-onsemi 0:098463de4c5d 66 } SPIName;
group-onsemi 0:098463de4c5d 67
group-onsemi 0:098463de4c5d 68 #define TPM_SHIFT 8
group-onsemi 0:098463de4c5d 69 typedef enum {
group-onsemi 0:098463de4c5d 70 PWM_1 = (0 << TPM_SHIFT) | (0), // TPM0 CH0
group-onsemi 0:098463de4c5d 71 PWM_2 = (0 << TPM_SHIFT) | (1), // TPM0 CH1
group-onsemi 0:098463de4c5d 72 PWM_3 = (0 << TPM_SHIFT) | (2), // TPM0 CH2
group-onsemi 0:098463de4c5d 73 PWM_4 = (0 << TPM_SHIFT) | (3), // TPM0 CH3
group-onsemi 0:098463de4c5d 74 PWM_5 = (0 << TPM_SHIFT) | (4), // TPM0 CH4
group-onsemi 0:098463de4c5d 75 PWM_6 = (0 << TPM_SHIFT) | (5), // TPM0 CH5
group-onsemi 0:098463de4c5d 76
group-onsemi 0:098463de4c5d 77 PWM_7 = (1 << TPM_SHIFT) | (0), // TPM1 CH0
group-onsemi 0:098463de4c5d 78 PWM_8 = (1 << TPM_SHIFT) | (1), // TPM1 CH1
group-onsemi 0:098463de4c5d 79 } PWMName;
group-onsemi 0:098463de4c5d 80
group-onsemi 0:098463de4c5d 81 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 82 }
group-onsemi 0:098463de4c5d 83 #endif
group-onsemi 0:098463de4c5d 84
group-onsemi 0:098463de4c5d 85 #endif