5.2.1 - Updated I2C files
Dependents: mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510
targets/TARGET_NXP/TARGET_LPC82X/gpio_api.c@0:098463de4c5d, 2017-01-25 (annotated)
- Committer:
- group-onsemi
- Date:
- Wed Jan 25 20:34:15 2017 +0000
- Revision:
- 0:098463de4c5d
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
group-onsemi | 0:098463de4c5d | 1 | /* mbed Microcontroller Library |
group-onsemi | 0:098463de4c5d | 2 | * Copyright (c) 2006-2013 ARM Limited |
group-onsemi | 0:098463de4c5d | 3 | * |
group-onsemi | 0:098463de4c5d | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
group-onsemi | 0:098463de4c5d | 5 | * you may not use this file except in compliance with the License. |
group-onsemi | 0:098463de4c5d | 6 | * You may obtain a copy of the License at |
group-onsemi | 0:098463de4c5d | 7 | * |
group-onsemi | 0:098463de4c5d | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
group-onsemi | 0:098463de4c5d | 9 | * |
group-onsemi | 0:098463de4c5d | 10 | * Unless required by applicable law or agreed to in writing, software |
group-onsemi | 0:098463de4c5d | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
group-onsemi | 0:098463de4c5d | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
group-onsemi | 0:098463de4c5d | 13 | * See the License for the specific language governing permissions and |
group-onsemi | 0:098463de4c5d | 14 | * limitations under the License. |
group-onsemi | 0:098463de4c5d | 15 | */ |
group-onsemi | 0:098463de4c5d | 16 | #include "mbed_assert.h" |
group-onsemi | 0:098463de4c5d | 17 | #include "gpio_api.h" |
group-onsemi | 0:098463de4c5d | 18 | #include "pinmap.h" |
group-onsemi | 0:098463de4c5d | 19 | |
group-onsemi | 0:098463de4c5d | 20 | static int gpio_enabled = 0; |
group-onsemi | 0:098463de4c5d | 21 | |
group-onsemi | 0:098463de4c5d | 22 | static void gpio_enable(void) |
group-onsemi | 0:098463de4c5d | 23 | { |
group-onsemi | 0:098463de4c5d | 24 | gpio_enabled = 1; |
group-onsemi | 0:098463de4c5d | 25 | |
group-onsemi | 0:098463de4c5d | 26 | /* Enable AHB clock to the GPIO domain. */ |
group-onsemi | 0:098463de4c5d | 27 | LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 6); |
group-onsemi | 0:098463de4c5d | 28 | |
group-onsemi | 0:098463de4c5d | 29 | /* Peripheral reset control to GPIO and GPIO INT, a "1" bring it out of reset. */ |
group-onsemi | 0:098463de4c5d | 30 | LPC_SYSCON->PRESETCTRL &= ~(1 << 10); |
group-onsemi | 0:098463de4c5d | 31 | LPC_SYSCON->PRESETCTRL |= (1 << 10); |
group-onsemi | 0:098463de4c5d | 32 | } |
group-onsemi | 0:098463de4c5d | 33 | |
group-onsemi | 0:098463de4c5d | 34 | uint32_t gpio_set(PinName pin) |
group-onsemi | 0:098463de4c5d | 35 | { |
group-onsemi | 0:098463de4c5d | 36 | if (!gpio_enabled) |
group-onsemi | 0:098463de4c5d | 37 | gpio_enable(); |
group-onsemi | 0:098463de4c5d | 38 | |
group-onsemi | 0:098463de4c5d | 39 | return (1 << ((int)pin >> PIN_SHIFT)); |
group-onsemi | 0:098463de4c5d | 40 | } |
group-onsemi | 0:098463de4c5d | 41 | |
group-onsemi | 0:098463de4c5d | 42 | void gpio_init(gpio_t *obj, PinName pin) |
group-onsemi | 0:098463de4c5d | 43 | { |
group-onsemi | 0:098463de4c5d | 44 | obj->pin = pin; |
group-onsemi | 0:098463de4c5d | 45 | if (pin == (PinName)NC) |
group-onsemi | 0:098463de4c5d | 46 | return; |
group-onsemi | 0:098463de4c5d | 47 | |
group-onsemi | 0:098463de4c5d | 48 | obj->mask = gpio_set(pin); |
group-onsemi | 0:098463de4c5d | 49 | |
group-onsemi | 0:098463de4c5d | 50 | obj->reg_set = &LPC_GPIO_PORT->SET0; |
group-onsemi | 0:098463de4c5d | 51 | obj->reg_clr = &LPC_GPIO_PORT->CLR0; |
group-onsemi | 0:098463de4c5d | 52 | obj->reg_in = &LPC_GPIO_PORT->PIN0; |
group-onsemi | 0:098463de4c5d | 53 | obj->reg_dir = &LPC_GPIO_PORT->DIR0; |
group-onsemi | 0:098463de4c5d | 54 | } |
group-onsemi | 0:098463de4c5d | 55 | |
group-onsemi | 0:098463de4c5d | 56 | void gpio_mode(gpio_t *obj, PinMode mode) |
group-onsemi | 0:098463de4c5d | 57 | { |
group-onsemi | 0:098463de4c5d | 58 | pin_mode(obj->pin, mode); |
group-onsemi | 0:098463de4c5d | 59 | } |
group-onsemi | 0:098463de4c5d | 60 | |
group-onsemi | 0:098463de4c5d | 61 | void gpio_dir(gpio_t *obj, PinDirection direction) |
group-onsemi | 0:098463de4c5d | 62 | { |
group-onsemi | 0:098463de4c5d | 63 | MBED_ASSERT(obj->pin != (PinName)NC); |
group-onsemi | 0:098463de4c5d | 64 | switch (direction) { |
group-onsemi | 0:098463de4c5d | 65 | case PIN_INPUT : |
group-onsemi | 0:098463de4c5d | 66 | *obj->reg_dir &= ~obj->mask; |
group-onsemi | 0:098463de4c5d | 67 | break; |
group-onsemi | 0:098463de4c5d | 68 | case PIN_OUTPUT: |
group-onsemi | 0:098463de4c5d | 69 | *obj->reg_dir |= obj->mask; |
group-onsemi | 0:098463de4c5d | 70 | break; |
group-onsemi | 0:098463de4c5d | 71 | } |
group-onsemi | 0:098463de4c5d | 72 | } |