ON Semiconductor / mbed-os

5.2.1 - Updated I2C files

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_NXP/TARGET_LPC82X/analogin_api.c@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 17 #include "analogin_api.h"
group-onsemi 0:098463de4c5d 18 #include "cmsis.h"
group-onsemi 0:098463de4c5d 19 #include "pinmap.h"
group-onsemi 0:098463de4c5d 20 #include "PeripheralNames.h"
group-onsemi 0:098463de4c5d 21
group-onsemi 0:098463de4c5d 22 #if DEVICE_ANALOGIN
group-onsemi 0:098463de4c5d 23
group-onsemi 0:098463de4c5d 24 #define ANALOGIN_MEDIAN_FILTER 1
group-onsemi 0:098463de4c5d 25
group-onsemi 0:098463de4c5d 26 #define ADC_RANGE 0xFFF
group-onsemi 0:098463de4c5d 27
group-onsemi 0:098463de4c5d 28 static const PinMap PinMap_ADC[] = {
group-onsemi 0:098463de4c5d 29 {P0_7 , ADC_0, 0},
group-onsemi 0:098463de4c5d 30 {P0_6 , ADC_1, 0},
group-onsemi 0:098463de4c5d 31 {P0_14, ADC_2, 0},
group-onsemi 0:098463de4c5d 32 {P0_23, ADC_3, 0},
group-onsemi 0:098463de4c5d 33 {P0_22, ADC_4, 0},
group-onsemi 0:098463de4c5d 34 {P0_21, ADC_5, 0},
group-onsemi 0:098463de4c5d 35 {P0_20, ADC_6, 0},
group-onsemi 0:098463de4c5d 36 {P0_19, ADC_7, 0},
group-onsemi 0:098463de4c5d 37 {P0_18, ADC_8, 0},
group-onsemi 0:098463de4c5d 38 {P0_17, ADC_9, 0},
group-onsemi 0:098463de4c5d 39 {P0_13, ADC_10,0},
group-onsemi 0:098463de4c5d 40 {P0_4 , ADC_11,0},
group-onsemi 0:098463de4c5d 41 };
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 void analogin_init(analogin_t *obj, PinName pin)
group-onsemi 0:098463de4c5d 44 {
group-onsemi 0:098463de4c5d 45 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
group-onsemi 0:098463de4c5d 46 MBED_ASSERT(obj->adc != (ADCName)NC);
group-onsemi 0:098463de4c5d 47
group-onsemi 0:098463de4c5d 48 LPC_SYSCON->SYSAHBCLKCTRL |= (1UL << 6);
group-onsemi 0:098463de4c5d 49 // pin enable
group-onsemi 0:098463de4c5d 50 LPC_SWM->PINENABLE0 &= ~(1UL << (13 + obj->adc));
group-onsemi 0:098463de4c5d 51 // configure GPIO as input
group-onsemi 0:098463de4c5d 52 LPC_GPIO_PORT->DIR0 &= ~(1UL << (pin >> PIN_SHIFT));
group-onsemi 0:098463de4c5d 53
group-onsemi 0:098463de4c5d 54 LPC_SYSCON->PDRUNCFG &= ~(1 << 4);
group-onsemi 0:098463de4c5d 55 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 24);
group-onsemi 0:098463de4c5d 56
group-onsemi 0:098463de4c5d 57 __IO LPC_ADC_Type *adc_reg = LPC_ADC;
group-onsemi 0:098463de4c5d 58
group-onsemi 0:098463de4c5d 59 // determine the system clock divider for a 500kHz ADC clock during calibration
group-onsemi 0:098463de4c5d 60 uint32_t clkdiv = (SystemCoreClock / 500000) - 1;
group-onsemi 0:098463de4c5d 61
group-onsemi 0:098463de4c5d 62 // perform a self-calibration
group-onsemi 0:098463de4c5d 63 adc_reg->CTRL = (1UL << 30) | (clkdiv & 0xFF);
group-onsemi 0:098463de4c5d 64 while ((adc_reg->CTRL & (1UL << 30)) != 0);
group-onsemi 0:098463de4c5d 65 }
group-onsemi 0:098463de4c5d 66
group-onsemi 0:098463de4c5d 67 static inline uint32_t adc_read(analogin_t *obj)
group-onsemi 0:098463de4c5d 68 {
group-onsemi 0:098463de4c5d 69 uint32_t channels;
group-onsemi 0:098463de4c5d 70 __IO LPC_ADC_Type *adc_reg = LPC_ADC;
group-onsemi 0:098463de4c5d 71
group-onsemi 0:098463de4c5d 72 channels = (obj->adc & 0x1F);
group-onsemi 0:098463de4c5d 73
group-onsemi 0:098463de4c5d 74 // select channel
group-onsemi 0:098463de4c5d 75 adc_reg->SEQA_CTRL &= ~(0xFFF);
group-onsemi 0:098463de4c5d 76 adc_reg->SEQA_CTRL |= (1UL << channels);
group-onsemi 0:098463de4c5d 77
group-onsemi 0:098463de4c5d 78 // start conversion and sequence enable
group-onsemi 0:098463de4c5d 79 adc_reg->SEQA_CTRL |= ((1UL << 26) | (1UL << 31));
group-onsemi 0:098463de4c5d 80
group-onsemi 0:098463de4c5d 81 // Repeatedly get the sample data until DONE bit
group-onsemi 0:098463de4c5d 82 volatile uint32_t data;
group-onsemi 0:098463de4c5d 83 do {
group-onsemi 0:098463de4c5d 84 data = adc_reg->SEQA_GDAT;
group-onsemi 0:098463de4c5d 85 } while ((data & (1UL << 31)) == 0);
group-onsemi 0:098463de4c5d 86
group-onsemi 0:098463de4c5d 87 // Stop conversion
group-onsemi 0:098463de4c5d 88 adc_reg->SEQA_CTRL &= ~(1UL << 31);
group-onsemi 0:098463de4c5d 89
group-onsemi 0:098463de4c5d 90 return ((data >> 4) & ADC_RANGE);
group-onsemi 0:098463de4c5d 91 }
group-onsemi 0:098463de4c5d 92
group-onsemi 0:098463de4c5d 93 static inline void order(uint32_t *a, uint32_t *b)
group-onsemi 0:098463de4c5d 94 {
group-onsemi 0:098463de4c5d 95 if (*a > *b) {
group-onsemi 0:098463de4c5d 96 uint32_t t = *a;
group-onsemi 0:098463de4c5d 97 *a = *b;
group-onsemi 0:098463de4c5d 98 *b = t;
group-onsemi 0:098463de4c5d 99 }
group-onsemi 0:098463de4c5d 100 }
group-onsemi 0:098463de4c5d 101
group-onsemi 0:098463de4c5d 102 static inline uint32_t adc_read_u32(analogin_t *obj)
group-onsemi 0:098463de4c5d 103 {
group-onsemi 0:098463de4c5d 104 uint32_t value;
group-onsemi 0:098463de4c5d 105 #if ANALOGIN_MEDIAN_FILTER
group-onsemi 0:098463de4c5d 106 uint32_t v1 = adc_read(obj);
group-onsemi 0:098463de4c5d 107 uint32_t v2 = adc_read(obj);
group-onsemi 0:098463de4c5d 108 uint32_t v3 = adc_read(obj);
group-onsemi 0:098463de4c5d 109 order(&v1, &v2);
group-onsemi 0:098463de4c5d 110 order(&v2, &v3);
group-onsemi 0:098463de4c5d 111 order(&v1, &v2);
group-onsemi 0:098463de4c5d 112 value = v2;
group-onsemi 0:098463de4c5d 113 #else
group-onsemi 0:098463de4c5d 114 value = adc_read(obj);
group-onsemi 0:098463de4c5d 115 #endif
group-onsemi 0:098463de4c5d 116 return value;
group-onsemi 0:098463de4c5d 117 }
group-onsemi 0:098463de4c5d 118
group-onsemi 0:098463de4c5d 119 uint16_t analogin_read_u16(analogin_t *obj)
group-onsemi 0:098463de4c5d 120 {
group-onsemi 0:098463de4c5d 121 uint32_t value = adc_read_u32(obj);
group-onsemi 0:098463de4c5d 122 return (value << 4) | ((value >> 8) & 0x000F); // 12 bit
group-onsemi 0:098463de4c5d 123 }
group-onsemi 0:098463de4c5d 124
group-onsemi 0:098463de4c5d 125 float analogin_read(analogin_t *obj)
group-onsemi 0:098463de4c5d 126 {
group-onsemi 0:098463de4c5d 127 uint32_t value = adc_read_u32(obj);
group-onsemi 0:098463de4c5d 128 return (float)value * (1.0f / (float)ADC_RANGE);
group-onsemi 0:098463de4c5d 129 }
group-onsemi 0:098463de4c5d 130
group-onsemi 0:098463de4c5d 131 #endif