ON Semiconductor / mbed-os

5.2.1 - Updated I2C files

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_NXP/TARGET_LPC11XX_11CXX/sleep.c@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #include "sleep_api.h"
group-onsemi 0:098463de4c5d 17 #include "cmsis.h"
group-onsemi 0:098463de4c5d 18 #include "mbed_interface.h"
group-onsemi 0:098463de4c5d 19
group-onsemi 0:098463de4c5d 20 void sleep(void) {
group-onsemi 0:098463de4c5d 21
group-onsemi 0:098463de4c5d 22 // PCON[DPDEN] set to sleep
group-onsemi 0:098463de4c5d 23 LPC_PMU->PCON = 0x0;
group-onsemi 0:098463de4c5d 24
group-onsemi 0:098463de4c5d 25 // SRC[SLEEPDEEP] set to 0 = sleep
group-onsemi 0:098463de4c5d 26 SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
group-onsemi 0:098463de4c5d 27
group-onsemi 0:098463de4c5d 28 // wait for interrupt
group-onsemi 0:098463de4c5d 29 __WFI();
group-onsemi 0:098463de4c5d 30 }
group-onsemi 0:098463de4c5d 31
group-onsemi 0:098463de4c5d 32 void deepsleep(void) {
group-onsemi 0:098463de4c5d 33
group-onsemi 0:098463de4c5d 34 // PCON[DPDEN] set to deepsleep
group-onsemi 0:098463de4c5d 35 LPC_PMU->PCON = 0;
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37 // SRC[SLEEPDEEP] set to 1 = deep sleep
group-onsemi 0:098463de4c5d 38 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
group-onsemi 0:098463de4c5d 39
group-onsemi 0:098463de4c5d 40 //According to user manual it is kinda picky about reserved bits, so we follow that nicely
group-onsemi 0:098463de4c5d 41 //Keep WDOSC and BOD in same state as they are now during deepsleep
group-onsemi 0:098463de4c5d 42 LPC_SYSCON->PDSLEEPCFG = 0x000018B7 | (LPC_SYSCON->PDRUNCFG & (PDRUNCFG_WDTOSC_PD | PDRUNCFG_BOD_PD));
group-onsemi 0:098463de4c5d 43
group-onsemi 0:098463de4c5d 44 // Power up same as before powerdown
group-onsemi 0:098463de4c5d 45 LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG;
group-onsemi 0:098463de4c5d 46
group-onsemi 0:098463de4c5d 47 // wait for interrupt
group-onsemi 0:098463de4c5d 48 __WFI();
group-onsemi 0:098463de4c5d 49 }