ON Semiconductor / mbed-os

5.2.1 - Updated I2C files

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_NXP/TARGET_LPC11UXX/spi_api.c@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 17 #include <math.h>
group-onsemi 0:098463de4c5d 18 #include "spi_api.h"
group-onsemi 0:098463de4c5d 19 #include "cmsis.h"
group-onsemi 0:098463de4c5d 20 #include "pinmap.h"
group-onsemi 0:098463de4c5d 21 #include "mbed_error.h"
group-onsemi 0:098463de4c5d 22 #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform
group-onsemi 0:098463de4c5d 23
group-onsemi 0:098463de4c5d 24 static inline int ssp_disable(spi_t *obj);
group-onsemi 0:098463de4c5d 25 static inline int ssp_enable(spi_t *obj);
group-onsemi 0:098463de4c5d 26
group-onsemi 0:098463de4c5d 27 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
group-onsemi 0:098463de4c5d 28 // determine the SPI to use
group-onsemi 0:098463de4c5d 29 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
group-onsemi 0:098463de4c5d 30 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
group-onsemi 0:098463de4c5d 31 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
group-onsemi 0:098463de4c5d 32 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
group-onsemi 0:098463de4c5d 33 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
group-onsemi 0:098463de4c5d 34 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
group-onsemi 0:098463de4c5d 35
group-onsemi 0:098463de4c5d 36 obj->spi = (LPC_SSPx_Type*)pinmap_merge(spi_data, spi_cntl);
group-onsemi 0:098463de4c5d 37 MBED_ASSERT((int)obj->spi != NC);
group-onsemi 0:098463de4c5d 38
group-onsemi 0:098463de4c5d 39 // enable power and clocking
group-onsemi 0:098463de4c5d 40 switch ((int)obj->spi) {
group-onsemi 0:098463de4c5d 41 case SPI_0:
group-onsemi 0:098463de4c5d 42 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 11;
group-onsemi 0:098463de4c5d 43 LPC_SYSCON->SSP0CLKDIV = 0x01;
group-onsemi 0:098463de4c5d 44 LPC_SYSCON->PRESETCTRL |= 1 << 0;
group-onsemi 0:098463de4c5d 45 break;
group-onsemi 0:098463de4c5d 46 case SPI_1:
group-onsemi 0:098463de4c5d 47 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 18;
group-onsemi 0:098463de4c5d 48 LPC_SYSCON->SSP1CLKDIV = 0x01;
group-onsemi 0:098463de4c5d 49 LPC_SYSCON->PRESETCTRL |= 1 << 2;
group-onsemi 0:098463de4c5d 50 break;
group-onsemi 0:098463de4c5d 51 }
group-onsemi 0:098463de4c5d 52
group-onsemi 0:098463de4c5d 53 // pin out the spi pins
group-onsemi 0:098463de4c5d 54 pinmap_pinout(mosi, PinMap_SPI_MOSI);
group-onsemi 0:098463de4c5d 55 pinmap_pinout(miso, PinMap_SPI_MISO);
group-onsemi 0:098463de4c5d 56 pinmap_pinout(sclk, PinMap_SPI_SCLK);
group-onsemi 0:098463de4c5d 57 if (ssel != NC) {
group-onsemi 0:098463de4c5d 58 pinmap_pinout(ssel, PinMap_SPI_SSEL);
group-onsemi 0:098463de4c5d 59 }
group-onsemi 0:098463de4c5d 60 }
group-onsemi 0:098463de4c5d 61
group-onsemi 0:098463de4c5d 62 void spi_free(spi_t *obj) {}
group-onsemi 0:098463de4c5d 63
group-onsemi 0:098463de4c5d 64 void spi_format(spi_t *obj, int bits, int mode, int slave) {
group-onsemi 0:098463de4c5d 65 MBED_ASSERT((bits >= 4 && bits <= 16) || (mode >= 0 && mode <= 3));
group-onsemi 0:098463de4c5d 66
group-onsemi 0:098463de4c5d 67 ssp_disable(obj);
group-onsemi 0:098463de4c5d 68
group-onsemi 0:098463de4c5d 69 int polarity = (mode & 0x2) ? 1 : 0;
group-onsemi 0:098463de4c5d 70 int phase = (mode & 0x1) ? 1 : 0;
group-onsemi 0:098463de4c5d 71
group-onsemi 0:098463de4c5d 72 // set it up
group-onsemi 0:098463de4c5d 73 int DSS = bits - 1; // DSS (data select size)
group-onsemi 0:098463de4c5d 74 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
group-onsemi 0:098463de4c5d 75 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
group-onsemi 0:098463de4c5d 76
group-onsemi 0:098463de4c5d 77 int FRF = 0; // FRF (frame format) = SPI
group-onsemi 0:098463de4c5d 78 uint32_t tmp = obj->spi->CR0;
group-onsemi 0:098463de4c5d 79 tmp &= ~(0xFFFF);
group-onsemi 0:098463de4c5d 80 tmp |= DSS << 0
group-onsemi 0:098463de4c5d 81 | FRF << 4
group-onsemi 0:098463de4c5d 82 | SPO << 6
group-onsemi 0:098463de4c5d 83 | SPH << 7;
group-onsemi 0:098463de4c5d 84 obj->spi->CR0 = tmp;
group-onsemi 0:098463de4c5d 85
group-onsemi 0:098463de4c5d 86 tmp = obj->spi->CR1;
group-onsemi 0:098463de4c5d 87 tmp &= ~(0xD);
group-onsemi 0:098463de4c5d 88 tmp |= 0 << 0 // LBM - loop back mode - off
group-onsemi 0:098463de4c5d 89 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
group-onsemi 0:098463de4c5d 90 | 0 << 3; // SOD - slave output disable - na
group-onsemi 0:098463de4c5d 91 obj->spi->CR1 = tmp;
group-onsemi 0:098463de4c5d 92
group-onsemi 0:098463de4c5d 93 ssp_enable(obj);
group-onsemi 0:098463de4c5d 94 }
group-onsemi 0:098463de4c5d 95
group-onsemi 0:098463de4c5d 96 void spi_frequency(spi_t *obj, int hz) {
group-onsemi 0:098463de4c5d 97 ssp_disable(obj);
group-onsemi 0:098463de4c5d 98
group-onsemi 0:098463de4c5d 99 uint32_t PCLK = SystemCoreClock;
group-onsemi 0:098463de4c5d 100
group-onsemi 0:098463de4c5d 101 int prescaler;
group-onsemi 0:098463de4c5d 102
group-onsemi 0:098463de4c5d 103 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
group-onsemi 0:098463de4c5d 104 int prescale_hz = PCLK / prescaler;
group-onsemi 0:098463de4c5d 105
group-onsemi 0:098463de4c5d 106 // calculate the divider
group-onsemi 0:098463de4c5d 107 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
group-onsemi 0:098463de4c5d 108
group-onsemi 0:098463de4c5d 109 // check we can support the divider
group-onsemi 0:098463de4c5d 110 if (divider < 256) {
group-onsemi 0:098463de4c5d 111 // prescaler
group-onsemi 0:098463de4c5d 112 obj->spi->CPSR = prescaler;
group-onsemi 0:098463de4c5d 113
group-onsemi 0:098463de4c5d 114 // divider
group-onsemi 0:098463de4c5d 115 obj->spi->CR0 &= ~(0xFFFF << 8);
group-onsemi 0:098463de4c5d 116 obj->spi->CR0 |= (divider - 1) << 8;
group-onsemi 0:098463de4c5d 117 ssp_enable(obj);
group-onsemi 0:098463de4c5d 118 return;
group-onsemi 0:098463de4c5d 119 }
group-onsemi 0:098463de4c5d 120 }
group-onsemi 0:098463de4c5d 121 error("Couldn't setup requested SPI frequency");
group-onsemi 0:098463de4c5d 122 }
group-onsemi 0:098463de4c5d 123
group-onsemi 0:098463de4c5d 124 static inline int ssp_disable(spi_t *obj) {
group-onsemi 0:098463de4c5d 125 return obj->spi->CR1 &= ~(1 << 1);
group-onsemi 0:098463de4c5d 126 }
group-onsemi 0:098463de4c5d 127
group-onsemi 0:098463de4c5d 128 static inline int ssp_enable(spi_t *obj) {
group-onsemi 0:098463de4c5d 129 return obj->spi->CR1 |= (1 << 1);
group-onsemi 0:098463de4c5d 130 }
group-onsemi 0:098463de4c5d 131
group-onsemi 0:098463de4c5d 132 static inline int ssp_readable(spi_t *obj) {
group-onsemi 0:098463de4c5d 133 return obj->spi->SR & (1 << 2);
group-onsemi 0:098463de4c5d 134 }
group-onsemi 0:098463de4c5d 135
group-onsemi 0:098463de4c5d 136 static inline int ssp_writeable(spi_t *obj) {
group-onsemi 0:098463de4c5d 137 return obj->spi->SR & (1 << 1);
group-onsemi 0:098463de4c5d 138 }
group-onsemi 0:098463de4c5d 139
group-onsemi 0:098463de4c5d 140 static inline void ssp_write(spi_t *obj, int value) {
group-onsemi 0:098463de4c5d 141 while (!ssp_writeable(obj));
group-onsemi 0:098463de4c5d 142 obj->spi->DR = value;
group-onsemi 0:098463de4c5d 143 }
group-onsemi 0:098463de4c5d 144
group-onsemi 0:098463de4c5d 145 static inline int ssp_read(spi_t *obj) {
group-onsemi 0:098463de4c5d 146 while (!ssp_readable(obj));
group-onsemi 0:098463de4c5d 147 return obj->spi->DR;
group-onsemi 0:098463de4c5d 148 }
group-onsemi 0:098463de4c5d 149
group-onsemi 0:098463de4c5d 150 static inline int ssp_busy(spi_t *obj) {
group-onsemi 0:098463de4c5d 151 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
group-onsemi 0:098463de4c5d 152 }
group-onsemi 0:098463de4c5d 153
group-onsemi 0:098463de4c5d 154 int spi_master_write(spi_t *obj, int value) {
group-onsemi 0:098463de4c5d 155 ssp_write(obj, value);
group-onsemi 0:098463de4c5d 156 return ssp_read(obj);
group-onsemi 0:098463de4c5d 157 }
group-onsemi 0:098463de4c5d 158
group-onsemi 0:098463de4c5d 159 int spi_slave_receive(spi_t *obj) {
group-onsemi 0:098463de4c5d 160 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
group-onsemi 0:098463de4c5d 161 }
group-onsemi 0:098463de4c5d 162
group-onsemi 0:098463de4c5d 163 int spi_slave_read(spi_t *obj) {
group-onsemi 0:098463de4c5d 164 return obj->spi->DR;
group-onsemi 0:098463de4c5d 165 }
group-onsemi 0:098463de4c5d 166
group-onsemi 0:098463de4c5d 167 void spi_slave_write(spi_t *obj, int value) {
group-onsemi 0:098463de4c5d 168 while (ssp_writeable(obj) == 0) ;
group-onsemi 0:098463de4c5d 169 obj->spi->DR = value;
group-onsemi 0:098463de4c5d 170 }
group-onsemi 0:098463de4c5d 171
group-onsemi 0:098463de4c5d 172 int spi_busy(spi_t *obj) {
group-onsemi 0:098463de4c5d 173 return ssp_busy(obj);
group-onsemi 0:098463de4c5d 174 }