ON Semiconductor / mbed-os

5.2.1 - Updated I2C files

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_NXP/TARGET_LPC11UXX/serial_api.c@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 // math.h required for floating point operations for baud rate calculation
group-onsemi 0:098463de4c5d 17 #include <math.h>
group-onsemi 0:098463de4c5d 18 #include <string.h>
group-onsemi 0:098463de4c5d 19 #include <stdlib.h>
group-onsemi 0:098463de4c5d 20
group-onsemi 0:098463de4c5d 21 #include "serial_api.h"
group-onsemi 0:098463de4c5d 22 #include "cmsis.h"
group-onsemi 0:098463de4c5d 23 #include "pinmap.h"
group-onsemi 0:098463de4c5d 24 #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform
group-onsemi 0:098463de4c5d 25
group-onsemi 0:098463de4c5d 26 /******************************************************************************
group-onsemi 0:098463de4c5d 27 * INITIALIZATION
group-onsemi 0:098463de4c5d 28 ******************************************************************************/
group-onsemi 0:098463de4c5d 29 #define UART_NUM 1
group-onsemi 0:098463de4c5d 30
group-onsemi 0:098463de4c5d 31 static uint32_t serial_irq_ids[UART_NUM] = {0};
group-onsemi 0:098463de4c5d 32 static uart_irq_handler irq_handler;
group-onsemi 0:098463de4c5d 33
group-onsemi 0:098463de4c5d 34 int stdio_uart_inited = 0;
group-onsemi 0:098463de4c5d 35 serial_t stdio_uart;
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37 void serial_init(serial_t *obj, PinName tx, PinName rx) {
group-onsemi 0:098463de4c5d 38 int is_stdio_uart = 0;
group-onsemi 0:098463de4c5d 39
group-onsemi 0:098463de4c5d 40 // determine the UART to use
group-onsemi 0:098463de4c5d 41 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
group-onsemi 0:098463de4c5d 42 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
group-onsemi 0:098463de4c5d 43 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
group-onsemi 0:098463de4c5d 44 MBED_ASSERT((int)uart != NC);
group-onsemi 0:098463de4c5d 45
group-onsemi 0:098463de4c5d 46 obj->uart = (LPC_USART_Type *)uart;
group-onsemi 0:098463de4c5d 47 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
group-onsemi 0:098463de4c5d 48
group-onsemi 0:098463de4c5d 49 // [TODO] Consider more elegant approach
group-onsemi 0:098463de4c5d 50 // disconnect USBTX/RX mapping mux, for case when switching ports
group-onsemi 0:098463de4c5d 51 #ifdef USBTX
group-onsemi 0:098463de4c5d 52 pin_function(USBTX, 0);
group-onsemi 0:098463de4c5d 53 pin_function(USBRX, 0);
group-onsemi 0:098463de4c5d 54 #endif
group-onsemi 0:098463de4c5d 55
group-onsemi 0:098463de4c5d 56 // enable fifos and default rx trigger level
group-onsemi 0:098463de4c5d 57 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
group-onsemi 0:098463de4c5d 58 | 0 << 1 // Rx Fifo Reset
group-onsemi 0:098463de4c5d 59 | 0 << 2 // Tx Fifo Reset
group-onsemi 0:098463de4c5d 60 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
group-onsemi 0:098463de4c5d 61
group-onsemi 0:098463de4c5d 62 // disable irqs
group-onsemi 0:098463de4c5d 63 obj->uart->IER = 0 << 0 // Rx Data available irq enable
group-onsemi 0:098463de4c5d 64 | 0 << 1 // Tx Fifo empty irq enable
group-onsemi 0:098463de4c5d 65 | 0 << 2; // Rx Line Status irq enable
group-onsemi 0:098463de4c5d 66
group-onsemi 0:098463de4c5d 67 // set default baud rate and format
group-onsemi 0:098463de4c5d 68 serial_baud (obj, 9600);
group-onsemi 0:098463de4c5d 69 serial_format(obj, 8, ParityNone, 1);
group-onsemi 0:098463de4c5d 70
group-onsemi 0:098463de4c5d 71 // pinout the chosen uart
group-onsemi 0:098463de4c5d 72 pinmap_pinout(tx, PinMap_UART_TX);
group-onsemi 0:098463de4c5d 73 pinmap_pinout(rx, PinMap_UART_RX);
group-onsemi 0:098463de4c5d 74
group-onsemi 0:098463de4c5d 75 // set rx/tx pins in PullUp mode
group-onsemi 0:098463de4c5d 76 if (tx != NC) {
group-onsemi 0:098463de4c5d 77 pin_mode(tx, PullUp);
group-onsemi 0:098463de4c5d 78 }
group-onsemi 0:098463de4c5d 79 if (rx != NC) {
group-onsemi 0:098463de4c5d 80 pin_mode(rx, PullUp);
group-onsemi 0:098463de4c5d 81 }
group-onsemi 0:098463de4c5d 82
group-onsemi 0:098463de4c5d 83 switch (uart) {
group-onsemi 0:098463de4c5d 84 case UART_0: obj->index = 0; break;
group-onsemi 0:098463de4c5d 85 }
group-onsemi 0:098463de4c5d 86
group-onsemi 0:098463de4c5d 87 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
group-onsemi 0:098463de4c5d 88
group-onsemi 0:098463de4c5d 89 if (is_stdio_uart) {
group-onsemi 0:098463de4c5d 90 stdio_uart_inited = 1;
group-onsemi 0:098463de4c5d 91 memcpy(&stdio_uart, obj, sizeof(serial_t));
group-onsemi 0:098463de4c5d 92 }
group-onsemi 0:098463de4c5d 93 }
group-onsemi 0:098463de4c5d 94
group-onsemi 0:098463de4c5d 95 void serial_free(serial_t *obj) {
group-onsemi 0:098463de4c5d 96 serial_irq_ids[obj->index] = 0;
group-onsemi 0:098463de4c5d 97 }
group-onsemi 0:098463de4c5d 98
group-onsemi 0:098463de4c5d 99 // serial_baud
group-onsemi 0:098463de4c5d 100 // set the baud rate, taking in to account the current SystemFrequency
group-onsemi 0:098463de4c5d 101 void serial_baud(serial_t *obj, int baudrate) {
group-onsemi 0:098463de4c5d 102 LPC_SYSCON->UARTCLKDIV = 0x1;
group-onsemi 0:098463de4c5d 103 uint32_t PCLK = SystemCoreClock;
group-onsemi 0:098463de4c5d 104 // First we check to see if the basic divide with no DivAddVal/MulVal
group-onsemi 0:098463de4c5d 105 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
group-onsemi 0:098463de4c5d 106 // MulVal = 1. Otherwise, we search the valid ratio value range to find
group-onsemi 0:098463de4c5d 107 // the closest match. This could be more elegant, using search methods
group-onsemi 0:098463de4c5d 108 // and/or lookup tables, but the brute force method is not that much
group-onsemi 0:098463de4c5d 109 // slower, and is more maintainable.
group-onsemi 0:098463de4c5d 110 uint16_t DL = PCLK / (16 * baudrate);
group-onsemi 0:098463de4c5d 111
group-onsemi 0:098463de4c5d 112 uint8_t DivAddVal = 0;
group-onsemi 0:098463de4c5d 113 uint8_t MulVal = 1;
group-onsemi 0:098463de4c5d 114 int hit = 0;
group-onsemi 0:098463de4c5d 115 uint16_t dlv;
group-onsemi 0:098463de4c5d 116 uint8_t mv, dav;
group-onsemi 0:098463de4c5d 117 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
group-onsemi 0:098463de4c5d 118 int err_best = baudrate, b;
group-onsemi 0:098463de4c5d 119 for (mv = 1; mv < 16 && !hit; mv++)
group-onsemi 0:098463de4c5d 120 {
group-onsemi 0:098463de4c5d 121 for (dav = 0; dav < mv; dav++)
group-onsemi 0:098463de4c5d 122 {
group-onsemi 0:098463de4c5d 123 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
group-onsemi 0:098463de4c5d 124 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
group-onsemi 0:098463de4c5d 125 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
group-onsemi 0:098463de4c5d 126 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
group-onsemi 0:098463de4c5d 127 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
group-onsemi 0:098463de4c5d 128
group-onsemi 0:098463de4c5d 129 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
group-onsemi 0:098463de4c5d 130 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
group-onsemi 0:098463de4c5d 131 else // 2 bits headroom, use more precision
group-onsemi 0:098463de4c5d 132 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
group-onsemi 0:098463de4c5d 133
group-onsemi 0:098463de4c5d 134 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
group-onsemi 0:098463de4c5d 135 if (dlv == 0)
group-onsemi 0:098463de4c5d 136 dlv = 1;
group-onsemi 0:098463de4c5d 137
group-onsemi 0:098463de4c5d 138 // datasheet says if dav > 0 then DL must be >= 2
group-onsemi 0:098463de4c5d 139 if ((dav > 0) && (dlv < 2))
group-onsemi 0:098463de4c5d 140 dlv = 2;
group-onsemi 0:098463de4c5d 141
group-onsemi 0:098463de4c5d 142 // integer rearrangement of the baudrate equation (with rounding)
group-onsemi 0:098463de4c5d 143 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
group-onsemi 0:098463de4c5d 144
group-onsemi 0:098463de4c5d 145 // check to see how we went
group-onsemi 0:098463de4c5d 146 b = abs(b - baudrate);
group-onsemi 0:098463de4c5d 147 if (b < err_best)
group-onsemi 0:098463de4c5d 148 {
group-onsemi 0:098463de4c5d 149 err_best = b;
group-onsemi 0:098463de4c5d 150
group-onsemi 0:098463de4c5d 151 DL = dlv;
group-onsemi 0:098463de4c5d 152 MulVal = mv;
group-onsemi 0:098463de4c5d 153 DivAddVal = dav;
group-onsemi 0:098463de4c5d 154
group-onsemi 0:098463de4c5d 155 if (b == baudrate)
group-onsemi 0:098463de4c5d 156 {
group-onsemi 0:098463de4c5d 157 hit = 1;
group-onsemi 0:098463de4c5d 158 break;
group-onsemi 0:098463de4c5d 159 }
group-onsemi 0:098463de4c5d 160 }
group-onsemi 0:098463de4c5d 161 }
group-onsemi 0:098463de4c5d 162 }
group-onsemi 0:098463de4c5d 163 }
group-onsemi 0:098463de4c5d 164
group-onsemi 0:098463de4c5d 165 // set LCR[DLAB] to enable writing to divider registers
group-onsemi 0:098463de4c5d 166 obj->uart->LCR |= (1 << 7);
group-onsemi 0:098463de4c5d 167
group-onsemi 0:098463de4c5d 168 // set divider values
group-onsemi 0:098463de4c5d 169 obj->uart->DLM = (DL >> 8) & 0xFF;
group-onsemi 0:098463de4c5d 170 obj->uart->DLL = (DL >> 0) & 0xFF;
group-onsemi 0:098463de4c5d 171 obj->uart->FDR = (uint32_t) DivAddVal << 0
group-onsemi 0:098463de4c5d 172 | (uint32_t) MulVal << 4;
group-onsemi 0:098463de4c5d 173
group-onsemi 0:098463de4c5d 174 // clear LCR[DLAB]
group-onsemi 0:098463de4c5d 175 obj->uart->LCR &= ~(1 << 7);
group-onsemi 0:098463de4c5d 176 }
group-onsemi 0:098463de4c5d 177
group-onsemi 0:098463de4c5d 178 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
group-onsemi 0:098463de4c5d 179 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
group-onsemi 0:098463de4c5d 180 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
group-onsemi 0:098463de4c5d 181 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
group-onsemi 0:098463de4c5d 182 (parity == ParityForced1) || (parity == ParityForced0));
group-onsemi 0:098463de4c5d 183
group-onsemi 0:098463de4c5d 184 stop_bits -= 1;
group-onsemi 0:098463de4c5d 185 data_bits -= 5;
group-onsemi 0:098463de4c5d 186
group-onsemi 0:098463de4c5d 187 int parity_enable = 0, parity_select = 0;
group-onsemi 0:098463de4c5d 188 switch (parity) {
group-onsemi 0:098463de4c5d 189 case ParityNone: parity_enable = 0; parity_select = 0; break;
group-onsemi 0:098463de4c5d 190 case ParityOdd : parity_enable = 1; parity_select = 0; break;
group-onsemi 0:098463de4c5d 191 case ParityEven: parity_enable = 1; parity_select = 1; break;
group-onsemi 0:098463de4c5d 192 case ParityForced1: parity_enable = 1; parity_select = 2; break;
group-onsemi 0:098463de4c5d 193 case ParityForced0: parity_enable = 1; parity_select = 3; break;
group-onsemi 0:098463de4c5d 194 default:
group-onsemi 0:098463de4c5d 195 break;
group-onsemi 0:098463de4c5d 196 }
group-onsemi 0:098463de4c5d 197
group-onsemi 0:098463de4c5d 198 obj->uart->LCR = data_bits << 0
group-onsemi 0:098463de4c5d 199 | stop_bits << 2
group-onsemi 0:098463de4c5d 200 | parity_enable << 3
group-onsemi 0:098463de4c5d 201 | parity_select << 4;
group-onsemi 0:098463de4c5d 202 }
group-onsemi 0:098463de4c5d 203
group-onsemi 0:098463de4c5d 204 /******************************************************************************
group-onsemi 0:098463de4c5d 205 * INTERRUPTS HANDLING
group-onsemi 0:098463de4c5d 206 ******************************************************************************/
group-onsemi 0:098463de4c5d 207 static inline void uart_irq(uint32_t iir, uint32_t index) {
group-onsemi 0:098463de4c5d 208 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
group-onsemi 0:098463de4c5d 209 SerialIrq irq_type;
group-onsemi 0:098463de4c5d 210 switch (iir) {
group-onsemi 0:098463de4c5d 211 case 1: irq_type = TxIrq; break;
group-onsemi 0:098463de4c5d 212 case 2: irq_type = RxIrq; break;
group-onsemi 0:098463de4c5d 213 default: return;
group-onsemi 0:098463de4c5d 214 }
group-onsemi 0:098463de4c5d 215
group-onsemi 0:098463de4c5d 216 if (serial_irq_ids[index] != 0)
group-onsemi 0:098463de4c5d 217 irq_handler(serial_irq_ids[index], irq_type);
group-onsemi 0:098463de4c5d 218 }
group-onsemi 0:098463de4c5d 219
group-onsemi 0:098463de4c5d 220 void uart0_irq() {uart_irq((LPC_USART->IIR >> 1) & 0x7, 0);}
group-onsemi 0:098463de4c5d 221
group-onsemi 0:098463de4c5d 222 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
group-onsemi 0:098463de4c5d 223 irq_handler = handler;
group-onsemi 0:098463de4c5d 224 serial_irq_ids[obj->index] = id;
group-onsemi 0:098463de4c5d 225 }
group-onsemi 0:098463de4c5d 226
group-onsemi 0:098463de4c5d 227 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
group-onsemi 0:098463de4c5d 228 IRQn_Type irq_n = (IRQn_Type)0;
group-onsemi 0:098463de4c5d 229 uint32_t vector = 0;
group-onsemi 0:098463de4c5d 230 switch ((int)obj->uart) {
group-onsemi 0:098463de4c5d 231 case UART_0: irq_n=UART_IRQn ; vector = (uint32_t)&uart0_irq; break;
group-onsemi 0:098463de4c5d 232 }
group-onsemi 0:098463de4c5d 233
group-onsemi 0:098463de4c5d 234 if (enable) {
group-onsemi 0:098463de4c5d 235 obj->uart->IER |= 1 << irq;
group-onsemi 0:098463de4c5d 236 NVIC_SetVector(irq_n, vector);
group-onsemi 0:098463de4c5d 237 NVIC_EnableIRQ(irq_n);
group-onsemi 0:098463de4c5d 238 } else { // disable
group-onsemi 0:098463de4c5d 239 int all_disabled = 0;
group-onsemi 0:098463de4c5d 240 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
group-onsemi 0:098463de4c5d 241
group-onsemi 0:098463de4c5d 242 obj->uart->IER &= ~(1 << irq);
group-onsemi 0:098463de4c5d 243 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
group-onsemi 0:098463de4c5d 244
group-onsemi 0:098463de4c5d 245 if (all_disabled)
group-onsemi 0:098463de4c5d 246 NVIC_DisableIRQ(irq_n);
group-onsemi 0:098463de4c5d 247 }
group-onsemi 0:098463de4c5d 248 }
group-onsemi 0:098463de4c5d 249
group-onsemi 0:098463de4c5d 250 /******************************************************************************
group-onsemi 0:098463de4c5d 251 * READ/WRITE
group-onsemi 0:098463de4c5d 252 ******************************************************************************/
group-onsemi 0:098463de4c5d 253 int serial_getc(serial_t *obj) {
group-onsemi 0:098463de4c5d 254 while (!serial_readable(obj));
group-onsemi 0:098463de4c5d 255 return obj->uart->RBR;
group-onsemi 0:098463de4c5d 256 }
group-onsemi 0:098463de4c5d 257
group-onsemi 0:098463de4c5d 258 void serial_putc(serial_t *obj, int c) {
group-onsemi 0:098463de4c5d 259 while (!serial_writable(obj));
group-onsemi 0:098463de4c5d 260 obj->uart->THR = c;
group-onsemi 0:098463de4c5d 261 }
group-onsemi 0:098463de4c5d 262
group-onsemi 0:098463de4c5d 263 int serial_readable(serial_t *obj) {
group-onsemi 0:098463de4c5d 264 return obj->uart->LSR & 0x01;
group-onsemi 0:098463de4c5d 265 }
group-onsemi 0:098463de4c5d 266
group-onsemi 0:098463de4c5d 267 int serial_writable(serial_t *obj) {
group-onsemi 0:098463de4c5d 268 return obj->uart->LSR & 0x20;
group-onsemi 0:098463de4c5d 269 }
group-onsemi 0:098463de4c5d 270
group-onsemi 0:098463de4c5d 271 void serial_clear(serial_t *obj) {
group-onsemi 0:098463de4c5d 272 obj->uart->FCR = 1 << 1 // rx FIFO reset
group-onsemi 0:098463de4c5d 273 | 1 << 2 // tx FIFO reset
group-onsemi 0:098463de4c5d 274 | 0 << 6; // interrupt depth
group-onsemi 0:098463de4c5d 275 }
group-onsemi 0:098463de4c5d 276
group-onsemi 0:098463de4c5d 277 void serial_pinout_tx(PinName tx) {
group-onsemi 0:098463de4c5d 278 pinmap_pinout(tx, PinMap_UART_TX);
group-onsemi 0:098463de4c5d 279 }
group-onsemi 0:098463de4c5d 280
group-onsemi 0:098463de4c5d 281 void serial_break_set(serial_t *obj) {
group-onsemi 0:098463de4c5d 282 obj->uart->LCR |= (1 << 6);
group-onsemi 0:098463de4c5d 283 }
group-onsemi 0:098463de4c5d 284
group-onsemi 0:098463de4c5d 285 void serial_break_clear(serial_t *obj) {
group-onsemi 0:098463de4c5d 286 obj->uart->LCR &= ~(1 << 6);
group-onsemi 0:098463de4c5d 287 }
group-onsemi 0:098463de4c5d 288