ON Semiconductor / mbed-os

5.2.1 - Updated I2C files

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_NXP/TARGET_LPC11UXX/i2c_api.c@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 17 #include "i2c_api.h"
group-onsemi 0:098463de4c5d 18 #include "cmsis.h"
group-onsemi 0:098463de4c5d 19 #include "pinmap.h"
group-onsemi 0:098463de4c5d 20 #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform
group-onsemi 0:098463de4c5d 21
group-onsemi 0:098463de4c5d 22 #define I2C_CONSET(x) (x->i2c->CONSET)
group-onsemi 0:098463de4c5d 23 #define I2C_CONCLR(x) (x->i2c->CONCLR)
group-onsemi 0:098463de4c5d 24 #define I2C_STAT(x) (x->i2c->STAT)
group-onsemi 0:098463de4c5d 25 #define I2C_DAT(x) (x->i2c->DAT)
group-onsemi 0:098463de4c5d 26 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
group-onsemi 0:098463de4c5d 27 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
group-onsemi 0:098463de4c5d 28
group-onsemi 0:098463de4c5d 29 static const uint32_t I2C_addr_offset[2][4] = {
group-onsemi 0:098463de4c5d 30 {0x0C, 0x20, 0x24, 0x28},
group-onsemi 0:098463de4c5d 31 {0x30, 0x34, 0x38, 0x3C}
group-onsemi 0:098463de4c5d 32 };
group-onsemi 0:098463de4c5d 33
group-onsemi 0:098463de4c5d 34 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
group-onsemi 0:098463de4c5d 35 I2C_CONCLR(obj) = (start << 5)
group-onsemi 0:098463de4c5d 36 | (stop << 4)
group-onsemi 0:098463de4c5d 37 | (interrupt << 3)
group-onsemi 0:098463de4c5d 38 | (acknowledge << 2);
group-onsemi 0:098463de4c5d 39 }
group-onsemi 0:098463de4c5d 40
group-onsemi 0:098463de4c5d 41 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
group-onsemi 0:098463de4c5d 42 I2C_CONSET(obj) = (start << 5)
group-onsemi 0:098463de4c5d 43 | (stop << 4)
group-onsemi 0:098463de4c5d 44 | (interrupt << 3)
group-onsemi 0:098463de4c5d 45 | (acknowledge << 2);
group-onsemi 0:098463de4c5d 46 }
group-onsemi 0:098463de4c5d 47
group-onsemi 0:098463de4c5d 48 // Clear the Serial Interrupt (SI)
group-onsemi 0:098463de4c5d 49 static inline void i2c_clear_SI(i2c_t *obj) {
group-onsemi 0:098463de4c5d 50 i2c_conclr(obj, 0, 0, 1, 0);
group-onsemi 0:098463de4c5d 51 }
group-onsemi 0:098463de4c5d 52
group-onsemi 0:098463de4c5d 53 static inline int i2c_status(i2c_t *obj) {
group-onsemi 0:098463de4c5d 54 return I2C_STAT(obj);
group-onsemi 0:098463de4c5d 55 }
group-onsemi 0:098463de4c5d 56
group-onsemi 0:098463de4c5d 57 // Wait until the Serial Interrupt (SI) is set
group-onsemi 0:098463de4c5d 58 static int i2c_wait_SI(i2c_t *obj) {
group-onsemi 0:098463de4c5d 59 int timeout = 0;
group-onsemi 0:098463de4c5d 60 while (!(I2C_CONSET(obj) & (1 << 3))) {
group-onsemi 0:098463de4c5d 61 timeout++;
group-onsemi 0:098463de4c5d 62 if (timeout > 100000) return -1;
group-onsemi 0:098463de4c5d 63 }
group-onsemi 0:098463de4c5d 64 return 0;
group-onsemi 0:098463de4c5d 65 }
group-onsemi 0:098463de4c5d 66
group-onsemi 0:098463de4c5d 67 static inline void i2c_interface_enable(i2c_t *obj) {
group-onsemi 0:098463de4c5d 68 I2C_CONSET(obj) = 0x40;
group-onsemi 0:098463de4c5d 69 }
group-onsemi 0:098463de4c5d 70
group-onsemi 0:098463de4c5d 71 static inline void i2c_power_enable(i2c_t *obj) {
group-onsemi 0:098463de4c5d 72 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 5);
group-onsemi 0:098463de4c5d 73 LPC_SYSCON->PRESETCTRL |= 1 << 1;
group-onsemi 0:098463de4c5d 74 }
group-onsemi 0:098463de4c5d 75
group-onsemi 0:098463de4c5d 76 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
group-onsemi 0:098463de4c5d 77 // determine the SPI to use
group-onsemi 0:098463de4c5d 78 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
group-onsemi 0:098463de4c5d 79 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
group-onsemi 0:098463de4c5d 80 obj->i2c = (LPC_I2C_Type *)pinmap_merge(i2c_sda, i2c_scl);
group-onsemi 0:098463de4c5d 81 MBED_ASSERT((int)obj->i2c != NC);
group-onsemi 0:098463de4c5d 82
group-onsemi 0:098463de4c5d 83 // enable power
group-onsemi 0:098463de4c5d 84 i2c_power_enable(obj);
group-onsemi 0:098463de4c5d 85
group-onsemi 0:098463de4c5d 86 // set default frequency at 100k
group-onsemi 0:098463de4c5d 87 i2c_frequency(obj, 100000);
group-onsemi 0:098463de4c5d 88 i2c_conclr(obj, 1, 1, 1, 1);
group-onsemi 0:098463de4c5d 89 i2c_interface_enable(obj);
group-onsemi 0:098463de4c5d 90
group-onsemi 0:098463de4c5d 91 pinmap_pinout(sda, PinMap_I2C_SDA);
group-onsemi 0:098463de4c5d 92 pinmap_pinout(scl, PinMap_I2C_SCL);
group-onsemi 0:098463de4c5d 93 }
group-onsemi 0:098463de4c5d 94
group-onsemi 0:098463de4c5d 95 inline int i2c_start(i2c_t *obj) {
group-onsemi 0:098463de4c5d 96 int status = 0;
group-onsemi 0:098463de4c5d 97 int isInterrupted = I2C_CONSET(obj) & (1 << 3);
group-onsemi 0:098463de4c5d 98
group-onsemi 0:098463de4c5d 99 // 8.1 Before master mode can be entered, I2CON must be initialised to:
group-onsemi 0:098463de4c5d 100 // - I2EN STA STO SI AA - -
group-onsemi 0:098463de4c5d 101 // - 1 0 0 x x - -
group-onsemi 0:098463de4c5d 102 // if AA = 0, it can't enter slave mode
group-onsemi 0:098463de4c5d 103 i2c_conclr(obj, 1, 1, 0, 1);
group-onsemi 0:098463de4c5d 104
group-onsemi 0:098463de4c5d 105 // The master mode may now be entered by setting the STA bit
group-onsemi 0:098463de4c5d 106 // this will generate a start condition when the bus becomes free
group-onsemi 0:098463de4c5d 107 i2c_conset(obj, 1, 0, 0, 1);
group-onsemi 0:098463de4c5d 108 // Clearing SI bit when it wasn't set on entry can jump past state
group-onsemi 0:098463de4c5d 109 // 0x10 or 0x08 and erroneously send uninitialized slave address.
group-onsemi 0:098463de4c5d 110 if (isInterrupted)
group-onsemi 0:098463de4c5d 111 i2c_clear_SI(obj);
group-onsemi 0:098463de4c5d 112
group-onsemi 0:098463de4c5d 113 i2c_wait_SI(obj);
group-onsemi 0:098463de4c5d 114 status = i2c_status(obj);
group-onsemi 0:098463de4c5d 115
group-onsemi 0:098463de4c5d 116 // Clear start bit now that it's transmitted
group-onsemi 0:098463de4c5d 117 i2c_conclr(obj, 1, 0, 0, 0);
group-onsemi 0:098463de4c5d 118 return status;
group-onsemi 0:098463de4c5d 119 }
group-onsemi 0:098463de4c5d 120
group-onsemi 0:098463de4c5d 121 inline int i2c_stop(i2c_t *obj) {
group-onsemi 0:098463de4c5d 122 int timeout = 0;
group-onsemi 0:098463de4c5d 123
group-onsemi 0:098463de4c5d 124 // write the stop bit
group-onsemi 0:098463de4c5d 125 i2c_conset(obj, 0, 1, 0, 0);
group-onsemi 0:098463de4c5d 126 i2c_clear_SI(obj);
group-onsemi 0:098463de4c5d 127
group-onsemi 0:098463de4c5d 128 // wait for STO bit to reset
group-onsemi 0:098463de4c5d 129 while(I2C_CONSET(obj) & (1 << 4)) {
group-onsemi 0:098463de4c5d 130 timeout ++;
group-onsemi 0:098463de4c5d 131 if (timeout > 100000) return 1;
group-onsemi 0:098463de4c5d 132 }
group-onsemi 0:098463de4c5d 133
group-onsemi 0:098463de4c5d 134 return 0;
group-onsemi 0:098463de4c5d 135 }
group-onsemi 0:098463de4c5d 136
group-onsemi 0:098463de4c5d 137
group-onsemi 0:098463de4c5d 138 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
group-onsemi 0:098463de4c5d 139 // write the data
group-onsemi 0:098463de4c5d 140 I2C_DAT(obj) = value;
group-onsemi 0:098463de4c5d 141
group-onsemi 0:098463de4c5d 142 // clear SI to init a send
group-onsemi 0:098463de4c5d 143 i2c_clear_SI(obj);
group-onsemi 0:098463de4c5d 144
group-onsemi 0:098463de4c5d 145 // wait and return status
group-onsemi 0:098463de4c5d 146 i2c_wait_SI(obj);
group-onsemi 0:098463de4c5d 147 return i2c_status(obj);
group-onsemi 0:098463de4c5d 148 }
group-onsemi 0:098463de4c5d 149
group-onsemi 0:098463de4c5d 150 static inline int i2c_do_read(i2c_t *obj, int last) {
group-onsemi 0:098463de4c5d 151 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
group-onsemi 0:098463de4c5d 152 if (last) {
group-onsemi 0:098463de4c5d 153 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
group-onsemi 0:098463de4c5d 154 } else {
group-onsemi 0:098463de4c5d 155 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
group-onsemi 0:098463de4c5d 156 }
group-onsemi 0:098463de4c5d 157
group-onsemi 0:098463de4c5d 158 // accept byte
group-onsemi 0:098463de4c5d 159 i2c_clear_SI(obj);
group-onsemi 0:098463de4c5d 160
group-onsemi 0:098463de4c5d 161 // wait for it to arrive
group-onsemi 0:098463de4c5d 162 i2c_wait_SI(obj);
group-onsemi 0:098463de4c5d 163
group-onsemi 0:098463de4c5d 164 // return the data
group-onsemi 0:098463de4c5d 165 return (I2C_DAT(obj) & 0xFF);
group-onsemi 0:098463de4c5d 166 }
group-onsemi 0:098463de4c5d 167
group-onsemi 0:098463de4c5d 168 void i2c_frequency(i2c_t *obj, int hz) {
group-onsemi 0:098463de4c5d 169 // No peripheral clock divider on the M0
group-onsemi 0:098463de4c5d 170 uint32_t PCLK = SystemCoreClock;
group-onsemi 0:098463de4c5d 171
group-onsemi 0:098463de4c5d 172 uint32_t pulse = PCLK / (hz * 2);
group-onsemi 0:098463de4c5d 173
group-onsemi 0:098463de4c5d 174 // I2C Rate
group-onsemi 0:098463de4c5d 175 I2C_SCLL(obj, pulse);
group-onsemi 0:098463de4c5d 176 I2C_SCLH(obj, pulse);
group-onsemi 0:098463de4c5d 177 }
group-onsemi 0:098463de4c5d 178
group-onsemi 0:098463de4c5d 179 // The I2C does a read or a write as a whole operation
group-onsemi 0:098463de4c5d 180 // There are two types of error conditions it can encounter
group-onsemi 0:098463de4c5d 181 // 1) it can not obtain the bus
group-onsemi 0:098463de4c5d 182 // 2) it gets error responses at part of the transmission
group-onsemi 0:098463de4c5d 183 //
group-onsemi 0:098463de4c5d 184 // We tackle them as follows:
group-onsemi 0:098463de4c5d 185 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
group-onsemi 0:098463de4c5d 186 // which basically turns it in to a 2)
group-onsemi 0:098463de4c5d 187 // 2) on error, we use the standard error mechanisms to report/debug
group-onsemi 0:098463de4c5d 188 //
group-onsemi 0:098463de4c5d 189 // Therefore an I2C transaction should always complete. If it doesn't it is usually
group-onsemi 0:098463de4c5d 190 // because something is setup wrong (e.g. wiring), and we don't need to programatically
group-onsemi 0:098463de4c5d 191 // check for that
group-onsemi 0:098463de4c5d 192
group-onsemi 0:098463de4c5d 193 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
group-onsemi 0:098463de4c5d 194 int count, status;
group-onsemi 0:098463de4c5d 195
group-onsemi 0:098463de4c5d 196 status = i2c_start(obj);
group-onsemi 0:098463de4c5d 197
group-onsemi 0:098463de4c5d 198 if ((status != 0x10) && (status != 0x08)) {
group-onsemi 0:098463de4c5d 199 i2c_stop(obj);
group-onsemi 0:098463de4c5d 200 return I2C_ERROR_BUS_BUSY;
group-onsemi 0:098463de4c5d 201 }
group-onsemi 0:098463de4c5d 202
group-onsemi 0:098463de4c5d 203 status = i2c_do_write(obj, (address | 0x01), 1);
group-onsemi 0:098463de4c5d 204 if (status != 0x40) {
group-onsemi 0:098463de4c5d 205 i2c_stop(obj);
group-onsemi 0:098463de4c5d 206 return I2C_ERROR_NO_SLAVE;
group-onsemi 0:098463de4c5d 207 }
group-onsemi 0:098463de4c5d 208
group-onsemi 0:098463de4c5d 209 // Read in all except last byte
group-onsemi 0:098463de4c5d 210 for (count = 0; count < (length - 1); count++) {
group-onsemi 0:098463de4c5d 211 int value = i2c_do_read(obj, 0);
group-onsemi 0:098463de4c5d 212 status = i2c_status(obj);
group-onsemi 0:098463de4c5d 213 if (status != 0x50) {
group-onsemi 0:098463de4c5d 214 i2c_stop(obj);
group-onsemi 0:098463de4c5d 215 return count;
group-onsemi 0:098463de4c5d 216 }
group-onsemi 0:098463de4c5d 217 data[count] = (char) value;
group-onsemi 0:098463de4c5d 218 }
group-onsemi 0:098463de4c5d 219
group-onsemi 0:098463de4c5d 220 // read in last byte
group-onsemi 0:098463de4c5d 221 int value = i2c_do_read(obj, 1);
group-onsemi 0:098463de4c5d 222 status = i2c_status(obj);
group-onsemi 0:098463de4c5d 223 if (status != 0x58) {
group-onsemi 0:098463de4c5d 224 i2c_stop(obj);
group-onsemi 0:098463de4c5d 225 return length - 1;
group-onsemi 0:098463de4c5d 226 }
group-onsemi 0:098463de4c5d 227
group-onsemi 0:098463de4c5d 228 data[count] = (char) value;
group-onsemi 0:098463de4c5d 229
group-onsemi 0:098463de4c5d 230 // If not repeated start, send stop.
group-onsemi 0:098463de4c5d 231 if (stop) {
group-onsemi 0:098463de4c5d 232 i2c_stop(obj);
group-onsemi 0:098463de4c5d 233 }
group-onsemi 0:098463de4c5d 234
group-onsemi 0:098463de4c5d 235 return length;
group-onsemi 0:098463de4c5d 236 }
group-onsemi 0:098463de4c5d 237
group-onsemi 0:098463de4c5d 238 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
group-onsemi 0:098463de4c5d 239 int i, status;
group-onsemi 0:098463de4c5d 240
group-onsemi 0:098463de4c5d 241 status = i2c_start(obj);
group-onsemi 0:098463de4c5d 242
group-onsemi 0:098463de4c5d 243 if ((status != 0x10) && (status != 0x08)) {
group-onsemi 0:098463de4c5d 244 i2c_stop(obj);
group-onsemi 0:098463de4c5d 245 return I2C_ERROR_BUS_BUSY;
group-onsemi 0:098463de4c5d 246 }
group-onsemi 0:098463de4c5d 247
group-onsemi 0:098463de4c5d 248 status = i2c_do_write(obj, (address & 0xFE), 1);
group-onsemi 0:098463de4c5d 249 if (status != 0x18) {
group-onsemi 0:098463de4c5d 250 i2c_stop(obj);
group-onsemi 0:098463de4c5d 251 return I2C_ERROR_NO_SLAVE;
group-onsemi 0:098463de4c5d 252 }
group-onsemi 0:098463de4c5d 253
group-onsemi 0:098463de4c5d 254 for (i=0; i<length; i++) {
group-onsemi 0:098463de4c5d 255 status = i2c_do_write(obj, data[i], 0);
group-onsemi 0:098463de4c5d 256 if(status != 0x28) {
group-onsemi 0:098463de4c5d 257 i2c_stop(obj);
group-onsemi 0:098463de4c5d 258 return i;
group-onsemi 0:098463de4c5d 259 }
group-onsemi 0:098463de4c5d 260 }
group-onsemi 0:098463de4c5d 261
group-onsemi 0:098463de4c5d 262 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
group-onsemi 0:098463de4c5d 263 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
group-onsemi 0:098463de4c5d 264 // i2c_clear_SI(obj);
group-onsemi 0:098463de4c5d 265
group-onsemi 0:098463de4c5d 266 // If not repeated start, send stop.
group-onsemi 0:098463de4c5d 267 if (stop) {
group-onsemi 0:098463de4c5d 268 i2c_stop(obj);
group-onsemi 0:098463de4c5d 269 }
group-onsemi 0:098463de4c5d 270
group-onsemi 0:098463de4c5d 271 return length;
group-onsemi 0:098463de4c5d 272 }
group-onsemi 0:098463de4c5d 273
group-onsemi 0:098463de4c5d 274 void i2c_reset(i2c_t *obj) {
group-onsemi 0:098463de4c5d 275 i2c_stop(obj);
group-onsemi 0:098463de4c5d 276 }
group-onsemi 0:098463de4c5d 277
group-onsemi 0:098463de4c5d 278 int i2c_byte_read(i2c_t *obj, int last) {
group-onsemi 0:098463de4c5d 279 return (i2c_do_read(obj, last) & 0xFF);
group-onsemi 0:098463de4c5d 280 }
group-onsemi 0:098463de4c5d 281
group-onsemi 0:098463de4c5d 282 int i2c_byte_write(i2c_t *obj, int data) {
group-onsemi 0:098463de4c5d 283 int ack;
group-onsemi 0:098463de4c5d 284 int status = i2c_do_write(obj, (data & 0xFF), 0);
group-onsemi 0:098463de4c5d 285
group-onsemi 0:098463de4c5d 286 switch(status) {
group-onsemi 0:098463de4c5d 287 case 0x18: case 0x28: // Master transmit ACKs
group-onsemi 0:098463de4c5d 288 ack = 1;
group-onsemi 0:098463de4c5d 289 break;
group-onsemi 0:098463de4c5d 290 case 0x40: // Master receive address transmitted ACK
group-onsemi 0:098463de4c5d 291 ack = 1;
group-onsemi 0:098463de4c5d 292 break;
group-onsemi 0:098463de4c5d 293 case 0xB8: // Slave transmit ACK
group-onsemi 0:098463de4c5d 294 ack = 1;
group-onsemi 0:098463de4c5d 295 break;
group-onsemi 0:098463de4c5d 296 default:
group-onsemi 0:098463de4c5d 297 ack = 0;
group-onsemi 0:098463de4c5d 298 break;
group-onsemi 0:098463de4c5d 299 }
group-onsemi 0:098463de4c5d 300
group-onsemi 0:098463de4c5d 301 return ack;
group-onsemi 0:098463de4c5d 302 }
group-onsemi 0:098463de4c5d 303
group-onsemi 0:098463de4c5d 304 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
group-onsemi 0:098463de4c5d 305 if (enable_slave != 0) {
group-onsemi 0:098463de4c5d 306 i2c_conclr(obj, 1, 1, 1, 0);
group-onsemi 0:098463de4c5d 307 i2c_conset(obj, 0, 0, 0, 1);
group-onsemi 0:098463de4c5d 308 } else {
group-onsemi 0:098463de4c5d 309 i2c_conclr(obj, 1, 1, 1, 1);
group-onsemi 0:098463de4c5d 310 }
group-onsemi 0:098463de4c5d 311 }
group-onsemi 0:098463de4c5d 312
group-onsemi 0:098463de4c5d 313 int i2c_slave_receive(i2c_t *obj) {
group-onsemi 0:098463de4c5d 314 int status;
group-onsemi 0:098463de4c5d 315 int retval;
group-onsemi 0:098463de4c5d 316
group-onsemi 0:098463de4c5d 317 status = i2c_status(obj);
group-onsemi 0:098463de4c5d 318 switch(status) {
group-onsemi 0:098463de4c5d 319 case 0x60: retval = 3; break;
group-onsemi 0:098463de4c5d 320 case 0x70: retval = 2; break;
group-onsemi 0:098463de4c5d 321 case 0xA8: retval = 1; break;
group-onsemi 0:098463de4c5d 322 default : retval = 0; break;
group-onsemi 0:098463de4c5d 323 }
group-onsemi 0:098463de4c5d 324
group-onsemi 0:098463de4c5d 325 return(retval);
group-onsemi 0:098463de4c5d 326 }
group-onsemi 0:098463de4c5d 327
group-onsemi 0:098463de4c5d 328 int i2c_slave_read(i2c_t *obj, char *data, int length) {
group-onsemi 0:098463de4c5d 329 int count = 0;
group-onsemi 0:098463de4c5d 330 int status;
group-onsemi 0:098463de4c5d 331
group-onsemi 0:098463de4c5d 332 do {
group-onsemi 0:098463de4c5d 333 i2c_clear_SI(obj);
group-onsemi 0:098463de4c5d 334 i2c_wait_SI(obj);
group-onsemi 0:098463de4c5d 335 status = i2c_status(obj);
group-onsemi 0:098463de4c5d 336 if((status == 0x80) || (status == 0x90)) {
group-onsemi 0:098463de4c5d 337 data[count] = I2C_DAT(obj) & 0xFF;
group-onsemi 0:098463de4c5d 338 }
group-onsemi 0:098463de4c5d 339 count++;
group-onsemi 0:098463de4c5d 340 } while (((status == 0x80) || (status == 0x90) ||
group-onsemi 0:098463de4c5d 341 (status == 0x060) || (status == 0x70)) && (count < length));
group-onsemi 0:098463de4c5d 342
group-onsemi 0:098463de4c5d 343 if(status != 0xA0) {
group-onsemi 0:098463de4c5d 344 i2c_stop(obj);
group-onsemi 0:098463de4c5d 345 }
group-onsemi 0:098463de4c5d 346
group-onsemi 0:098463de4c5d 347 i2c_clear_SI(obj);
group-onsemi 0:098463de4c5d 348
group-onsemi 0:098463de4c5d 349 return count;
group-onsemi 0:098463de4c5d 350 }
group-onsemi 0:098463de4c5d 351
group-onsemi 0:098463de4c5d 352 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
group-onsemi 0:098463de4c5d 353 int count = 0;
group-onsemi 0:098463de4c5d 354 int status;
group-onsemi 0:098463de4c5d 355
group-onsemi 0:098463de4c5d 356 if(length <= 0) {
group-onsemi 0:098463de4c5d 357 return(0);
group-onsemi 0:098463de4c5d 358 }
group-onsemi 0:098463de4c5d 359
group-onsemi 0:098463de4c5d 360 do {
group-onsemi 0:098463de4c5d 361 status = i2c_do_write(obj, data[count], 0);
group-onsemi 0:098463de4c5d 362 count++;
group-onsemi 0:098463de4c5d 363 } while ((count < length) && (status == 0xB8));
group-onsemi 0:098463de4c5d 364
group-onsemi 0:098463de4c5d 365 if((status != 0xC0) && (status != 0xC8)) {
group-onsemi 0:098463de4c5d 366 i2c_stop(obj);
group-onsemi 0:098463de4c5d 367 }
group-onsemi 0:098463de4c5d 368
group-onsemi 0:098463de4c5d 369 i2c_clear_SI(obj);
group-onsemi 0:098463de4c5d 370
group-onsemi 0:098463de4c5d 371 return(count);
group-onsemi 0:098463de4c5d 372 }
group-onsemi 0:098463de4c5d 373
group-onsemi 0:098463de4c5d 374 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
group-onsemi 0:098463de4c5d 375 uint32_t addr;
group-onsemi 0:098463de4c5d 376
group-onsemi 0:098463de4c5d 377 if ((idx >= 0) && (idx <= 3)) {
group-onsemi 0:098463de4c5d 378 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
group-onsemi 0:098463de4c5d 379 *((uint32_t *) addr) = address & 0xFF;
group-onsemi 0:098463de4c5d 380 }
group-onsemi 0:098463de4c5d 381 }