5.2.1 - Updated I2C files
Dependents: mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510
targets/TARGET_Maxim/TARGET_MAX32620/us_ticker.c@1:f30bdcd2b33b, 2017-02-27 (annotated)
- Committer:
- jacobjohnson
- Date:
- Mon Feb 27 17:45:05 2017 +0000
- Revision:
- 1:f30bdcd2b33b
- Parent:
- 0:098463de4c5d
changed the inputscale from 1 to 7 in analogin_api.c. This will need to be changed later, and accessed from the main level, but for now this allows the adc to read a value from 0 to 3.7V, instead of just up to 1V.;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
group-onsemi | 0:098463de4c5d | 1 | /******************************************************************************* |
group-onsemi | 0:098463de4c5d | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
group-onsemi | 0:098463de4c5d | 3 | * |
group-onsemi | 0:098463de4c5d | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
group-onsemi | 0:098463de4c5d | 5 | * copy of this software and associated documentation files (the "Software"), |
group-onsemi | 0:098463de4c5d | 6 | * to deal in the Software without restriction, including without limitation |
group-onsemi | 0:098463de4c5d | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
group-onsemi | 0:098463de4c5d | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
group-onsemi | 0:098463de4c5d | 9 | * Software is furnished to do so, subject to the following conditions: |
group-onsemi | 0:098463de4c5d | 10 | * |
group-onsemi | 0:098463de4c5d | 11 | * The above copyright notice and this permission notice shall be included |
group-onsemi | 0:098463de4c5d | 12 | * in all copies or substantial portions of the Software. |
group-onsemi | 0:098463de4c5d | 13 | * |
group-onsemi | 0:098463de4c5d | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
group-onsemi | 0:098463de4c5d | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
group-onsemi | 0:098463de4c5d | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
group-onsemi | 0:098463de4c5d | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
group-onsemi | 0:098463de4c5d | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
group-onsemi | 0:098463de4c5d | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
group-onsemi | 0:098463de4c5d | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
group-onsemi | 0:098463de4c5d | 21 | * |
group-onsemi | 0:098463de4c5d | 22 | * Except as contained in this notice, the name of Maxim Integrated |
group-onsemi | 0:098463de4c5d | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
group-onsemi | 0:098463de4c5d | 24 | * Products, Inc. Branding Policy. |
group-onsemi | 0:098463de4c5d | 25 | * |
group-onsemi | 0:098463de4c5d | 26 | * The mere transfer of this software does not imply any licenses |
group-onsemi | 0:098463de4c5d | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
group-onsemi | 0:098463de4c5d | 28 | * trademarks, maskwork rights, or any other form of intellectual |
group-onsemi | 0:098463de4c5d | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
group-onsemi | 0:098463de4c5d | 30 | * ownership rights. |
group-onsemi | 0:098463de4c5d | 31 | ******************************************************************************* |
group-onsemi | 0:098463de4c5d | 32 | */ |
group-onsemi | 0:098463de4c5d | 33 | |
group-onsemi | 0:098463de4c5d | 34 | #include "mbed_error.h" |
group-onsemi | 0:098463de4c5d | 35 | #include "us_ticker_api.h" |
group-onsemi | 0:098463de4c5d | 36 | #include "PeripheralNames.h" |
group-onsemi | 0:098463de4c5d | 37 | #include "tmr_regs.h" |
group-onsemi | 0:098463de4c5d | 38 | #include "clkman_regs.h" |
group-onsemi | 0:098463de4c5d | 39 | |
group-onsemi | 0:098463de4c5d | 40 | #define US_TIMER MXC_TMR0 |
group-onsemi | 0:098463de4c5d | 41 | #define US_TIMER_IRQn TMR0_0_IRQn |
group-onsemi | 0:098463de4c5d | 42 | |
group-onsemi | 0:098463de4c5d | 43 | /** |
group-onsemi | 0:098463de4c5d | 44 | * Defines timer modes for 16 and 32-bit timers |
group-onsemi | 0:098463de4c5d | 45 | */ |
group-onsemi | 0:098463de4c5d | 46 | typedef enum { |
group-onsemi | 0:098463de4c5d | 47 | /** 32-bit or 16-bit timer one-shot mode */ |
group-onsemi | 0:098463de4c5d | 48 | MXC_E_TMR_MODE_ONE_SHOT = 0, |
group-onsemi | 0:098463de4c5d | 49 | /** 32-bit or 16-bit timer one-shot mode */ |
group-onsemi | 0:098463de4c5d | 50 | MXC_E_TMR_MODE_CONTINUOUS, |
group-onsemi | 0:098463de4c5d | 51 | /** 32-bit timer counter mode */ |
group-onsemi | 0:098463de4c5d | 52 | MXC_E_TMR_MODE_COUNTER, |
group-onsemi | 0:098463de4c5d | 53 | /** 32-bit timer pulse width modulation mode */ |
group-onsemi | 0:098463de4c5d | 54 | MXC_E_TMR_MODE_PWM, |
group-onsemi | 0:098463de4c5d | 55 | /** 32-bit timer capture mode */ |
group-onsemi | 0:098463de4c5d | 56 | MXC_E_TMR_MODE_CAPTURE, |
group-onsemi | 0:098463de4c5d | 57 | /** 32-bit timer compare mode */ |
group-onsemi | 0:098463de4c5d | 58 | MXC_E_TMR_MODE_COMPARE, |
group-onsemi | 0:098463de4c5d | 59 | /** 32-bit timer gated mode */ |
group-onsemi | 0:098463de4c5d | 60 | MXC_E_TMR_MODE_GATED, |
group-onsemi | 0:098463de4c5d | 61 | /** 32-bit timer measure mode */ |
group-onsemi | 0:098463de4c5d | 62 | MXC_E_TMR_MODE_MEASURE |
group-onsemi | 0:098463de4c5d | 63 | } mxc_tmr_mode_t; |
group-onsemi | 0:098463de4c5d | 64 | |
group-onsemi | 0:098463de4c5d | 65 | static int us_ticker_inited = 0; |
group-onsemi | 0:098463de4c5d | 66 | static uint32_t ticks_per_us; |
group-onsemi | 0:098463de4c5d | 67 | static uint32_t tick_win; |
group-onsemi | 0:098463de4c5d | 68 | static volatile uint64_t current_cnt; // Hold the current ticks |
group-onsemi | 0:098463de4c5d | 69 | static volatile uint64_t event_cnt; // Holds the value of the next event |
group-onsemi | 0:098463de4c5d | 70 | |
group-onsemi | 0:098463de4c5d | 71 | #define ticks_to_us(ticks) ((ticks) / ticks_per_us); |
group-onsemi | 0:098463de4c5d | 72 | #define MAX_TICK_VAL ((uint64_t)0xFFFFFFFF * ticks_per_us) |
group-onsemi | 0:098463de4c5d | 73 | |
group-onsemi | 0:098463de4c5d | 74 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 75 | static inline void inc_current_cnt(uint32_t inc) |
group-onsemi | 0:098463de4c5d | 76 | { |
group-onsemi | 0:098463de4c5d | 77 | |
group-onsemi | 0:098463de4c5d | 78 | // Overflow the ticker when the us ticker overflows |
group-onsemi | 0:098463de4c5d | 79 | current_cnt += inc; |
group-onsemi | 0:098463de4c5d | 80 | if (current_cnt > MAX_TICK_VAL) { |
group-onsemi | 0:098463de4c5d | 81 | current_cnt -= (MAX_TICK_VAL + 1); |
group-onsemi | 0:098463de4c5d | 82 | } |
group-onsemi | 0:098463de4c5d | 83 | } |
group-onsemi | 0:098463de4c5d | 84 | |
group-onsemi | 0:098463de4c5d | 85 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 86 | static inline int event_passed(uint64_t current, uint64_t event) |
group-onsemi | 0:098463de4c5d | 87 | { |
group-onsemi | 0:098463de4c5d | 88 | |
group-onsemi | 0:098463de4c5d | 89 | // Determine if the event has already happened. |
group-onsemi | 0:098463de4c5d | 90 | // If the event is behind the current ticker, within a window, |
group-onsemi | 0:098463de4c5d | 91 | // then the event has already happened. |
group-onsemi | 0:098463de4c5d | 92 | if (((current < tick_win) && ((event < current) || |
group-onsemi | 0:098463de4c5d | 93 | (event > (MAX_TICK_VAL - (tick_win - current))))) || |
group-onsemi | 0:098463de4c5d | 94 | ((event < current) && (event > (current - tick_win)))) { |
group-onsemi | 0:098463de4c5d | 95 | return 1; |
group-onsemi | 0:098463de4c5d | 96 | } |
group-onsemi | 0:098463de4c5d | 97 | |
group-onsemi | 0:098463de4c5d | 98 | return 0; |
group-onsemi | 0:098463de4c5d | 99 | } |
group-onsemi | 0:098463de4c5d | 100 | |
group-onsemi | 0:098463de4c5d | 101 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 102 | static inline uint64_t event_diff(uint64_t current, uint64_t event) |
group-onsemi | 0:098463de4c5d | 103 | { |
group-onsemi | 0:098463de4c5d | 104 | |
group-onsemi | 0:098463de4c5d | 105 | // Check to see if the ticker will overflow before the event |
group-onsemi | 0:098463de4c5d | 106 | if(current <= event) { |
group-onsemi | 0:098463de4c5d | 107 | return (event - current); |
group-onsemi | 0:098463de4c5d | 108 | } |
group-onsemi | 0:098463de4c5d | 109 | |
group-onsemi | 0:098463de4c5d | 110 | return ((MAX_TICK_VAL - current) + event); |
group-onsemi | 0:098463de4c5d | 111 | } |
group-onsemi | 0:098463de4c5d | 112 | |
group-onsemi | 0:098463de4c5d | 113 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 114 | static void tmr_handler(void) |
group-onsemi | 0:098463de4c5d | 115 | { |
group-onsemi | 0:098463de4c5d | 116 | uint32_t term_cnt32 = US_TIMER->term_cnt32; |
group-onsemi | 0:098463de4c5d | 117 | US_TIMER->term_cnt32 = 0xFFFFFFFF; // reset to max value to prevent further interrupts |
group-onsemi | 0:098463de4c5d | 118 | US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupt |
group-onsemi | 0:098463de4c5d | 119 | NVIC_ClearPendingIRQ(US_TIMER_IRQn); |
group-onsemi | 0:098463de4c5d | 120 | |
group-onsemi | 0:098463de4c5d | 121 | inc_current_cnt(term_cnt32); |
group-onsemi | 0:098463de4c5d | 122 | |
group-onsemi | 0:098463de4c5d | 123 | if (event_passed(current_cnt + US_TIMER->count32, event_cnt )) { |
group-onsemi | 0:098463de4c5d | 124 | // the timestamp has expired |
group-onsemi | 0:098463de4c5d | 125 | event_cnt = 0xFFFFFFFFFFFFFFFFULL; // reset to max value |
group-onsemi | 0:098463de4c5d | 126 | us_ticker_irq_handler(); |
group-onsemi | 0:098463de4c5d | 127 | } else { |
group-onsemi | 0:098463de4c5d | 128 | |
group-onsemi | 0:098463de4c5d | 129 | uint64_t diff = event_diff(current_cnt, event_cnt); |
group-onsemi | 0:098463de4c5d | 130 | if (diff < (uint64_t)0xFFFFFFFF) { |
group-onsemi | 0:098463de4c5d | 131 | // the event occurs before the next overflow |
group-onsemi | 0:098463de4c5d | 132 | US_TIMER->term_cnt32 = diff; |
group-onsemi | 0:098463de4c5d | 133 | |
group-onsemi | 0:098463de4c5d | 134 | // Since the timer keeps counting after the terminal value is reached, it is possible that the new |
group-onsemi | 0:098463de4c5d | 135 | // terminal value is in the past. |
group-onsemi | 0:098463de4c5d | 136 | if (US_TIMER->term_cnt32 < US_TIMER->count32) { |
group-onsemi | 0:098463de4c5d | 137 | // the timestamp has expired |
group-onsemi | 0:098463de4c5d | 138 | US_TIMER->term_cnt32 = 0xFFFFFFFF; // reset to max value to prevent further interrupts |
group-onsemi | 0:098463de4c5d | 139 | US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupt |
group-onsemi | 0:098463de4c5d | 140 | NVIC_ClearPendingIRQ(US_TIMER_IRQn); |
group-onsemi | 0:098463de4c5d | 141 | event_cnt = 0xFFFFFFFFFFFFFFFFULL; // reset to max value |
group-onsemi | 0:098463de4c5d | 142 | us_ticker_irq_handler(); |
group-onsemi | 0:098463de4c5d | 143 | } |
group-onsemi | 0:098463de4c5d | 144 | } |
group-onsemi | 0:098463de4c5d | 145 | } |
group-onsemi | 0:098463de4c5d | 146 | } |
group-onsemi | 0:098463de4c5d | 147 | |
group-onsemi | 0:098463de4c5d | 148 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 149 | void us_ticker_init(void) |
group-onsemi | 0:098463de4c5d | 150 | { |
group-onsemi | 0:098463de4c5d | 151 | if (us_ticker_inited) |
group-onsemi | 0:098463de4c5d | 152 | return; |
group-onsemi | 0:098463de4c5d | 153 | us_ticker_inited = 1; |
group-onsemi | 0:098463de4c5d | 154 | |
group-onsemi | 0:098463de4c5d | 155 | /* Ensure that the TIMER0 clock is enabled */ |
group-onsemi | 0:098463de4c5d | 156 | if (!(MXC_CLKMAN->clk_gate_ctrl1 & MXC_F_CLKMAN_CLK_GATE_CTRL1_TIMER0_CLK_GATER)) { |
group-onsemi | 0:098463de4c5d | 157 | MXC_CLKMAN->clk_gate_ctrl1 |= (2 << MXC_F_CLKMAN_CLK_GATE_CTRL1_TIMER0_CLK_GATER_POS); |
group-onsemi | 0:098463de4c5d | 158 | } |
group-onsemi | 0:098463de4c5d | 159 | |
group-onsemi | 0:098463de4c5d | 160 | current_cnt = 0; |
group-onsemi | 0:098463de4c5d | 161 | event_cnt = 0xFFFFFFFFFFFFFFFFULL; // reset to max value |
group-onsemi | 0:098463de4c5d | 162 | |
group-onsemi | 0:098463de4c5d | 163 | if (SystemCoreClock <= 1000000) { |
group-onsemi | 0:098463de4c5d | 164 | error("us_ticker cannot operate at this SystemCoreClock"); |
group-onsemi | 0:098463de4c5d | 165 | return; |
group-onsemi | 0:098463de4c5d | 166 | } |
group-onsemi | 0:098463de4c5d | 167 | |
group-onsemi | 0:098463de4c5d | 168 | // Configure timer for 32-bit continuous mode with /1 prescaler |
group-onsemi | 0:098463de4c5d | 169 | US_TIMER->ctrl = MXC_E_TMR_MODE_CONTINUOUS << MXC_F_TMR_CTRL_MODE_POS | (0 << MXC_F_TMR_CTRL_PRESCALE_POS); |
group-onsemi | 0:098463de4c5d | 170 | ticks_per_us = SystemCoreClock / 1000000; |
group-onsemi | 0:098463de4c5d | 171 | |
group-onsemi | 0:098463de4c5d | 172 | // Set the tick window to 10ms |
group-onsemi | 0:098463de4c5d | 173 | tick_win = SystemCoreClock/100; |
group-onsemi | 0:098463de4c5d | 174 | |
group-onsemi | 0:098463de4c5d | 175 | // Set timer overflow to the max |
group-onsemi | 0:098463de4c5d | 176 | US_TIMER->term_cnt32 = 0xFFFFFFFF; |
group-onsemi | 0:098463de4c5d | 177 | US_TIMER->pwm_cap32 = 0xFFFFFFFF; |
group-onsemi | 0:098463de4c5d | 178 | US_TIMER->count32 = 0; |
group-onsemi | 0:098463de4c5d | 179 | |
group-onsemi | 0:098463de4c5d | 180 | US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear pending interrupts |
group-onsemi | 0:098463de4c5d | 181 | |
group-onsemi | 0:098463de4c5d | 182 | NVIC_SetVector(US_TIMER_IRQn, (uint32_t)tmr_handler); |
group-onsemi | 0:098463de4c5d | 183 | NVIC_EnableIRQ(US_TIMER_IRQn); |
group-onsemi | 0:098463de4c5d | 184 | |
group-onsemi | 0:098463de4c5d | 185 | US_TIMER->inten |= MXC_F_TMR_INTEN_TIMER0; // enable interrupts |
group-onsemi | 0:098463de4c5d | 186 | US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer |
group-onsemi | 0:098463de4c5d | 187 | } |
group-onsemi | 0:098463de4c5d | 188 | |
group-onsemi | 0:098463de4c5d | 189 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 190 | void us_ticker_deinit(void) |
group-onsemi | 0:098463de4c5d | 191 | { |
group-onsemi | 0:098463de4c5d | 192 | US_TIMER->ctrl = 0; // disable timer |
group-onsemi | 0:098463de4c5d | 193 | US_TIMER->inten = 0; // disable interrupts |
group-onsemi | 0:098463de4c5d | 194 | US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupts |
group-onsemi | 0:098463de4c5d | 195 | us_ticker_inited = 0; |
group-onsemi | 0:098463de4c5d | 196 | } |
group-onsemi | 0:098463de4c5d | 197 | |
group-onsemi | 0:098463de4c5d | 198 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 199 | uint32_t us_ticker_read(void) |
group-onsemi | 0:098463de4c5d | 200 | { |
group-onsemi | 0:098463de4c5d | 201 | uint64_t current_cnt1, current_cnt2; |
group-onsemi | 0:098463de4c5d | 202 | uint32_t term_cnt, tmr_cnt; |
group-onsemi | 0:098463de4c5d | 203 | uint32_t intfl1, intfl2; |
group-onsemi | 0:098463de4c5d | 204 | |
group-onsemi | 0:098463de4c5d | 205 | if (!us_ticker_inited) |
group-onsemi | 0:098463de4c5d | 206 | us_ticker_init(); |
group-onsemi | 0:098463de4c5d | 207 | |
group-onsemi | 0:098463de4c5d | 208 | // Ensure coherency between current_cnt and US_TIMER->count32 |
group-onsemi | 0:098463de4c5d | 209 | do { |
group-onsemi | 0:098463de4c5d | 210 | current_cnt1 = current_cnt; |
group-onsemi | 0:098463de4c5d | 211 | intfl1 = US_TIMER->intfl; |
group-onsemi | 0:098463de4c5d | 212 | term_cnt = US_TIMER->term_cnt32; |
group-onsemi | 0:098463de4c5d | 213 | tmr_cnt = US_TIMER->count32; |
group-onsemi | 0:098463de4c5d | 214 | intfl2 = US_TIMER->intfl; |
group-onsemi | 0:098463de4c5d | 215 | current_cnt2 = current_cnt; |
group-onsemi | 0:098463de4c5d | 216 | } while ((current_cnt1 != current_cnt2) || (intfl1 != intfl2)); |
group-onsemi | 0:098463de4c5d | 217 | |
group-onsemi | 0:098463de4c5d | 218 | // Account for an unserviced interrupt |
group-onsemi | 0:098463de4c5d | 219 | if (intfl1) { |
group-onsemi | 0:098463de4c5d | 220 | current_cnt1 += term_cnt; |
group-onsemi | 0:098463de4c5d | 221 | } |
group-onsemi | 0:098463de4c5d | 222 | |
group-onsemi | 0:098463de4c5d | 223 | current_cnt1 += tmr_cnt; |
group-onsemi | 0:098463de4c5d | 224 | |
group-onsemi | 0:098463de4c5d | 225 | return (current_cnt1 / ticks_per_us); |
group-onsemi | 0:098463de4c5d | 226 | } |
group-onsemi | 0:098463de4c5d | 227 | |
group-onsemi | 0:098463de4c5d | 228 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 229 | void us_ticker_set_interrupt(timestamp_t timestamp) |
group-onsemi | 0:098463de4c5d | 230 | { |
group-onsemi | 0:098463de4c5d | 231 | // Note: interrupts are disabled before this function is called. |
group-onsemi | 0:098463de4c5d | 232 | |
group-onsemi | 0:098463de4c5d | 233 | US_TIMER->ctrl &= ~MXC_F_TMR_CTRL_ENABLE0; // disable timer |
group-onsemi | 0:098463de4c5d | 234 | |
group-onsemi | 0:098463de4c5d | 235 | if (US_TIMER->intfl) { |
group-onsemi | 0:098463de4c5d | 236 | US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupt |
group-onsemi | 0:098463de4c5d | 237 | NVIC_ClearPendingIRQ(US_TIMER_IRQn); |
group-onsemi | 0:098463de4c5d | 238 | inc_current_cnt(US_TIMER->term_cnt32); |
group-onsemi | 0:098463de4c5d | 239 | } |
group-onsemi | 0:098463de4c5d | 240 | |
group-onsemi | 0:098463de4c5d | 241 | // add and reset the current count value |
group-onsemi | 0:098463de4c5d | 242 | inc_current_cnt(US_TIMER->count32); |
group-onsemi | 0:098463de4c5d | 243 | US_TIMER->count32 = 0; |
group-onsemi | 0:098463de4c5d | 244 | |
group-onsemi | 0:098463de4c5d | 245 | // add the number of cycles that the timer is disabled here for |
group-onsemi | 0:098463de4c5d | 246 | inc_current_cnt(200); |
group-onsemi | 0:098463de4c5d | 247 | |
group-onsemi | 0:098463de4c5d | 248 | event_cnt = (uint64_t)timestamp * ticks_per_us; |
group-onsemi | 0:098463de4c5d | 249 | |
group-onsemi | 0:098463de4c5d | 250 | // Check to see if the event has already passed |
group-onsemi | 0:098463de4c5d | 251 | if (!event_passed(current_cnt, event_cnt)) { |
group-onsemi | 0:098463de4c5d | 252 | uint64_t diff = event_diff(current_cnt, event_cnt); |
group-onsemi | 0:098463de4c5d | 253 | if (diff < (uint64_t)0xFFFFFFFF) { |
group-onsemi | 0:098463de4c5d | 254 | // the event occurs before the next overflow |
group-onsemi | 0:098463de4c5d | 255 | US_TIMER->term_cnt32 = diff; |
group-onsemi | 0:098463de4c5d | 256 | } else { |
group-onsemi | 0:098463de4c5d | 257 | // the event occurs after the next overflow |
group-onsemi | 0:098463de4c5d | 258 | US_TIMER->term_cnt32 = 0xFFFFFFFF; // set to max |
group-onsemi | 0:098463de4c5d | 259 | } |
group-onsemi | 0:098463de4c5d | 260 | } else { |
group-onsemi | 0:098463de4c5d | 261 | // the requested timestamp occurs in the past |
group-onsemi | 0:098463de4c5d | 262 | // set the timer up to immediately expire |
group-onsemi | 0:098463de4c5d | 263 | US_TIMER->term_cnt32 = 1; |
group-onsemi | 0:098463de4c5d | 264 | } |
group-onsemi | 0:098463de4c5d | 265 | US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer |
group-onsemi | 0:098463de4c5d | 266 | } |
group-onsemi | 0:098463de4c5d | 267 | |
group-onsemi | 0:098463de4c5d | 268 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 269 | void us_ticker_disable_interrupt(void) |
group-onsemi | 0:098463de4c5d | 270 | { |
group-onsemi | 0:098463de4c5d | 271 | // There are no more events, set timer overflow to the max |
group-onsemi | 0:098463de4c5d | 272 | US_TIMER->term_cnt32 = 0xFFFFFFFF; |
group-onsemi | 0:098463de4c5d | 273 | } |
group-onsemi | 0:098463de4c5d | 274 | |
group-onsemi | 0:098463de4c5d | 275 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 276 | void us_ticker_clear_interrupt(void) |
group-onsemi | 0:098463de4c5d | 277 | { |
group-onsemi | 0:098463de4c5d | 278 | // cleared in the local handler |
group-onsemi | 0:098463de4c5d | 279 | } |
group-onsemi | 0:098463de4c5d | 280 | |
group-onsemi | 0:098463de4c5d | 281 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 282 | void us_ticker_set(timestamp_t timestamp) |
group-onsemi | 0:098463de4c5d | 283 | { |
group-onsemi | 0:098463de4c5d | 284 | US_TIMER->ctrl &= ~MXC_F_TMR_CTRL_ENABLE0; // disable timer |
group-onsemi | 0:098463de4c5d | 285 | current_cnt = (uint64_t)timestamp * ticks_per_us; |
group-onsemi | 0:098463de4c5d | 286 | US_TIMER->count32 = 0; |
group-onsemi | 0:098463de4c5d | 287 | US_TIMER->term_cnt32 = 0xFFFFFFFF; |
group-onsemi | 0:098463de4c5d | 288 | US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer |
group-onsemi | 0:098463de4c5d | 289 | |
group-onsemi | 0:098463de4c5d | 290 | if (((uint64_t)timestamp * ticks_per_us) >= event_cnt) { |
group-onsemi | 0:098463de4c5d | 291 | // The next timestamp has elapsed. Trigger the interrupt to handle it. |
group-onsemi | 0:098463de4c5d | 292 | NVIC_SetPendingIRQ(US_TIMER_IRQn); |
group-onsemi | 0:098463de4c5d | 293 | } |
group-onsemi | 0:098463de4c5d | 294 | } |