5.2.1 - Updated I2C files
Dependents: mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510
targets/TARGET_Maxim/TARGET_MAX32610/analogin_api.c@1:f30bdcd2b33b, 2017-02-27 (annotated)
- Committer:
- jacobjohnson
- Date:
- Mon Feb 27 17:45:05 2017 +0000
- Revision:
- 1:f30bdcd2b33b
- Parent:
- 0:098463de4c5d
changed the inputscale from 1 to 7 in analogin_api.c. This will need to be changed later, and accessed from the main level, but for now this allows the adc to read a value from 0 to 3.7V, instead of just up to 1V.;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
group-onsemi | 0:098463de4c5d | 1 | /******************************************************************************* |
group-onsemi | 0:098463de4c5d | 2 | * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved. |
group-onsemi | 0:098463de4c5d | 3 | * |
group-onsemi | 0:098463de4c5d | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
group-onsemi | 0:098463de4c5d | 5 | * copy of this software and associated documentation files (the "Software"), |
group-onsemi | 0:098463de4c5d | 6 | * to deal in the Software without restriction, including without limitation |
group-onsemi | 0:098463de4c5d | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
group-onsemi | 0:098463de4c5d | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
group-onsemi | 0:098463de4c5d | 9 | * Software is furnished to do so, subject to the following conditions: |
group-onsemi | 0:098463de4c5d | 10 | * |
group-onsemi | 0:098463de4c5d | 11 | * The above copyright notice and this permission notice shall be included |
group-onsemi | 0:098463de4c5d | 12 | * in all copies or substantial portions of the Software. |
group-onsemi | 0:098463de4c5d | 13 | * |
group-onsemi | 0:098463de4c5d | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
group-onsemi | 0:098463de4c5d | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
group-onsemi | 0:098463de4c5d | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
group-onsemi | 0:098463de4c5d | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
group-onsemi | 0:098463de4c5d | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
group-onsemi | 0:098463de4c5d | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
group-onsemi | 0:098463de4c5d | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
group-onsemi | 0:098463de4c5d | 21 | * |
group-onsemi | 0:098463de4c5d | 22 | * Except as contained in this notice, the name of Maxim Integrated |
group-onsemi | 0:098463de4c5d | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
group-onsemi | 0:098463de4c5d | 24 | * Products, Inc. Branding Policy. |
group-onsemi | 0:098463de4c5d | 25 | * |
group-onsemi | 0:098463de4c5d | 26 | * The mere transfer of this software does not imply any licenses |
group-onsemi | 0:098463de4c5d | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
group-onsemi | 0:098463de4c5d | 28 | * trademarks, maskwork rights, or any other form of intellectual |
group-onsemi | 0:098463de4c5d | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
group-onsemi | 0:098463de4c5d | 30 | * ownership rights. |
group-onsemi | 0:098463de4c5d | 31 | ******************************************************************************* |
group-onsemi | 0:098463de4c5d | 32 | */ |
group-onsemi | 0:098463de4c5d | 33 | |
group-onsemi | 0:098463de4c5d | 34 | #include "mbed_assert.h" |
group-onsemi | 0:098463de4c5d | 35 | #include "analogin_api.h" |
group-onsemi | 0:098463de4c5d | 36 | #include "clkman_regs.h" |
group-onsemi | 0:098463de4c5d | 37 | #include "pwrman_regs.h" |
group-onsemi | 0:098463de4c5d | 38 | #include "afe_regs.h" |
group-onsemi | 0:098463de4c5d | 39 | #include "PeripheralPins.h" |
group-onsemi | 0:098463de4c5d | 40 | |
group-onsemi | 0:098463de4c5d | 41 | #define PGA_TRK_CNT 0x1F |
group-onsemi | 0:098463de4c5d | 42 | #define ADC_ACT_CNT 0x1 |
group-onsemi | 0:098463de4c5d | 43 | #define ADC_PGA_CNT 0x1 |
group-onsemi | 0:098463de4c5d | 44 | #define ADC_ACQ_CNT 0x1 |
group-onsemi | 0:098463de4c5d | 45 | #define ADC_SLP_CNT 0x1 |
group-onsemi | 0:098463de4c5d | 46 | |
group-onsemi | 0:098463de4c5d | 47 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 48 | void analogin_init(analogin_t *obj, PinName pin) |
group-onsemi | 0:098463de4c5d | 49 | { |
group-onsemi | 0:098463de4c5d | 50 | // Make sure pin is an analog pin we can use for ADC |
group-onsemi | 0:098463de4c5d | 51 | MBED_ASSERT((ADCName)pinmap_peripheral(pin, PinMap_ADC) != (ADCName)NC); |
group-onsemi | 0:098463de4c5d | 52 | |
group-onsemi | 0:098463de4c5d | 53 | // Set the object pointer |
group-onsemi | 0:098463de4c5d | 54 | obj->adc = MXC_ADC; |
group-onsemi | 0:098463de4c5d | 55 | obj->adccfg = MXC_ADCCFG; |
group-onsemi | 0:098463de4c5d | 56 | obj->adc_fifo = MXC_ADC_FIFO; |
group-onsemi | 0:098463de4c5d | 57 | obj->adc_pin = pin; |
group-onsemi | 0:098463de4c5d | 58 | |
group-onsemi | 0:098463de4c5d | 59 | // Set the ADC clock to the system clock frequency |
group-onsemi | 0:098463de4c5d | 60 | MXC_SET_FIELD(&MXC_CLKMAN->clk_ctrl, MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT, |
group-onsemi | 0:098463de4c5d | 61 | (MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N | (MXC_E_CLKMAN_ADC_SOURCE_SELECT_SYSTEM << |
group-onsemi | 0:098463de4c5d | 62 | MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS))); |
group-onsemi | 0:098463de4c5d | 63 | |
group-onsemi | 0:098463de4c5d | 64 | // Enable AFE power |
group-onsemi | 0:098463de4c5d | 65 | MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED; |
group-onsemi | 0:098463de4c5d | 66 | |
group-onsemi | 0:098463de4c5d | 67 | // Setup and hold window |
group-onsemi | 0:098463de4c5d | 68 | MXC_SET_FIELD(&obj->adc->tg_ctrl0, MXC_F_ADC_TG_CTRL0_PGA_TRK_CNT, PGA_TRK_CNT); |
group-onsemi | 0:098463de4c5d | 69 | |
group-onsemi | 0:098463de4c5d | 70 | // Setup sampling count and timing |
group-onsemi | 0:098463de4c5d | 71 | MXC_SET_FIELD(&obj->adc->tg_ctrl1, (MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT | |
group-onsemi | 0:098463de4c5d | 72 | MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT | MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT), |
group-onsemi | 0:098463de4c5d | 73 | ((ADC_PGA_CNT << MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT_POS) | |
group-onsemi | 0:098463de4c5d | 74 | (ADC_ACQ_CNT << MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT_POS) | |
group-onsemi | 0:098463de4c5d | 75 | (ADC_SLP_CNT << MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT_POS) | |
group-onsemi | 0:098463de4c5d | 76 | (MXC_F_ADC_TG_CTRL1_ADC_BRST_CNT))); |
group-onsemi | 0:098463de4c5d | 77 | } |
group-onsemi | 0:098463de4c5d | 78 | |
group-onsemi | 0:098463de4c5d | 79 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 80 | float analogin_read(analogin_t *obj) |
group-onsemi | 0:098463de4c5d | 81 | { |
group-onsemi | 0:098463de4c5d | 82 | // Convert integer to float |
group-onsemi | 0:098463de4c5d | 83 | return (((float)analogin_read_u16(obj)/(float)0xFFFF)); |
group-onsemi | 0:098463de4c5d | 84 | } |
group-onsemi | 0:098463de4c5d | 85 | |
group-onsemi | 0:098463de4c5d | 86 | //****************************************************************************** |
group-onsemi | 0:098463de4c5d | 87 | uint16_t analogin_read_u16(analogin_t *obj) |
group-onsemi | 0:098463de4c5d | 88 | { |
group-onsemi | 0:098463de4c5d | 89 | // Set the pin to take readings from |
group-onsemi | 0:098463de4c5d | 90 | unsigned mux_pos; |
group-onsemi | 0:098463de4c5d | 91 | unsigned diff = 0; |
group-onsemi | 0:098463de4c5d | 92 | if(obj->adc_pin >> PORT_SHIFT == 0xB) { |
group-onsemi | 0:098463de4c5d | 93 | mux_pos = (obj->adc_pin & 0xF) + 8; |
group-onsemi | 0:098463de4c5d | 94 | } else { |
group-onsemi | 0:098463de4c5d | 95 | mux_pos = (obj->adc_pin & 0xF); |
group-onsemi | 0:098463de4c5d | 96 | } |
group-onsemi | 0:098463de4c5d | 97 | |
group-onsemi | 0:098463de4c5d | 98 | if(obj->adc_pin >> PORT_SHIFT == 0xC) { |
group-onsemi | 0:098463de4c5d | 99 | diff = 1; |
group-onsemi | 0:098463de4c5d | 100 | mux_pos = (obj->adc_pin & 0xF) + 8; |
group-onsemi | 0:098463de4c5d | 101 | } |
group-onsemi | 0:098463de4c5d | 102 | |
group-onsemi | 0:098463de4c5d | 103 | // Reset the ADC |
group-onsemi | 0:098463de4c5d | 104 | obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_RST; |
group-onsemi | 0:098463de4c5d | 105 | |
group-onsemi | 0:098463de4c5d | 106 | // Enable the ADC |
group-onsemi | 0:098463de4c5d | 107 | obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_EN; |
group-onsemi | 0:098463de4c5d | 108 | |
group-onsemi | 0:098463de4c5d | 109 | // Setup the ADC clock |
group-onsemi | 0:098463de4c5d | 110 | MXC_SET_FIELD(&obj->adc->ctrl0, (MXC_F_ADC_CTRL0_ADC_MODE | MXC_F_ADC_CTRL0_AVG_MODE | |
group-onsemi | 0:098463de4c5d | 111 | MXC_F_ADC_CTRL0_ADC_CLK_MODE | MXC_F_ADC_CTRL0_ADC_BI_POL), |
group-onsemi | 0:098463de4c5d | 112 | ((MXC_E_ADC_MODE_SMPLCNT_FULL_RATE << MXC_F_ADC_CTRL0_ADC_MODE_POS) | |
group-onsemi | 0:098463de4c5d | 113 | (MXC_E_ADC_AVG_MODE_FILTER_OUTPUT << MXC_F_ADC_CTRL0_AVG_MODE_POS) | |
group-onsemi | 0:098463de4c5d | 114 | (0x2 << MXC_F_ADC_CTRL0_ADC_CLK_MODE_POS) | |
group-onsemi | 0:098463de4c5d | 115 | MXC_F_ADC_CTRL0_ADC_CLK_EN)); |
group-onsemi | 0:098463de4c5d | 116 | |
group-onsemi | 0:098463de4c5d | 117 | // Setup the input multiplexor |
group-onsemi | 0:098463de4c5d | 118 | MXC_SET_FIELD(&obj->adc->pga_ctrl, (MXC_F_ADC_PGA_CTRL_MUX_CH_SEL | |
group-onsemi | 0:098463de4c5d | 119 | MXC_F_ADC_PGA_CTRL_MUX_DIFF | MXC_F_ADC_PGA_CTRL_PGA_GAIN), |
group-onsemi | 0:098463de4c5d | 120 | ((mux_pos << MXC_F_ADC_PGA_CTRL_MUX_CH_SEL_POS) | |
group-onsemi | 0:098463de4c5d | 121 | (diff << MXC_F_ADC_PGA_CTRL_MUX_DIFF_POS))); |
group-onsemi | 0:098463de4c5d | 122 | |
group-onsemi | 0:098463de4c5d | 123 | // Setup voltage reference |
group-onsemi | 0:098463de4c5d | 124 | MXC_SET_FIELD(&MXC_AFE->ctrl1, MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL, |
group-onsemi | 0:098463de4c5d | 125 | (MXC_F_AFE_CTRL1_REF_ADC_POWERUP | MXC_F_AFE_CTRL1_REF_BLK_POWERUP | |
group-onsemi | 0:098463de4c5d | 126 | (MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS))); |
group-onsemi | 0:098463de4c5d | 127 | |
group-onsemi | 0:098463de4c5d | 128 | // Clear the done bit |
group-onsemi | 0:098463de4c5d | 129 | obj->adc->intr = MXC_F_ADC_INTR_DONE_IF; |
group-onsemi | 0:098463de4c5d | 130 | |
group-onsemi | 0:098463de4c5d | 131 | // Take one sample |
group-onsemi | 0:098463de4c5d | 132 | obj->adc->tg_ctrl0 |= (1 << MXC_F_ADC_TG_CTRL0_ADC_SMPL_CNT_POS); |
group-onsemi | 0:098463de4c5d | 133 | |
group-onsemi | 0:098463de4c5d | 134 | // Set the start bit to take the sample |
group-onsemi | 0:098463de4c5d | 135 | obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_START; |
group-onsemi | 0:098463de4c5d | 136 | |
group-onsemi | 0:098463de4c5d | 137 | // Wait for the conversion to complete |
group-onsemi | 0:098463de4c5d | 138 | while(!(obj->adc->intr & MXC_F_ADC_INTR_DONE_IF)) {} |
group-onsemi | 0:098463de4c5d | 139 | |
group-onsemi | 0:098463de4c5d | 140 | // Get sample from the fifo |
group-onsemi | 0:098463de4c5d | 141 | uint16_t sample = (uint16_t)(obj->adc->out & 0xFFFF); |
group-onsemi | 0:098463de4c5d | 142 | |
group-onsemi | 0:098463de4c5d | 143 | // Disable ADC |
group-onsemi | 0:098463de4c5d | 144 | obj->adc->ctrl0 &= ~MXC_F_ADC_CTRL0_CPU_ADC_EN; |
group-onsemi | 0:098463de4c5d | 145 | |
group-onsemi | 0:098463de4c5d | 146 | return (sample - 1); |
group-onsemi | 0:098463de4c5d | 147 | } |