5.2.1 - Updated I2C files
Dependents: mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510
targets/TARGET_RENESAS/TARGET_RZ_A1H/pinmap.c@0:098463de4c5d, 2017-01-25 (annotated)
- Committer:
- group-onsemi
- Date:
- Wed Jan 25 20:34:15 2017 +0000
- Revision:
- 0:098463de4c5d
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
group-onsemi | 0:098463de4c5d | 1 | /* mbed Microcontroller Library |
group-onsemi | 0:098463de4c5d | 2 | * Copyright (c) 2006-2013 ARM Limited |
group-onsemi | 0:098463de4c5d | 3 | * |
group-onsemi | 0:098463de4c5d | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
group-onsemi | 0:098463de4c5d | 5 | * you may not use this file except in compliance with the License. |
group-onsemi | 0:098463de4c5d | 6 | * You may obtain a copy of the License at |
group-onsemi | 0:098463de4c5d | 7 | * |
group-onsemi | 0:098463de4c5d | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
group-onsemi | 0:098463de4c5d | 9 | * |
group-onsemi | 0:098463de4c5d | 10 | * Unless required by applicable law or agreed to in writing, software |
group-onsemi | 0:098463de4c5d | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
group-onsemi | 0:098463de4c5d | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
group-onsemi | 0:098463de4c5d | 13 | * See the License for the specific language governing permissions and |
group-onsemi | 0:098463de4c5d | 14 | * limitations under the License. |
group-onsemi | 0:098463de4c5d | 15 | */ |
group-onsemi | 0:098463de4c5d | 16 | #include "pinmap.h" |
group-onsemi | 0:098463de4c5d | 17 | #include "mbed_error.h" |
group-onsemi | 0:098463de4c5d | 18 | #include "gpio_addrdefine.h" |
group-onsemi | 0:098463de4c5d | 19 | |
group-onsemi | 0:098463de4c5d | 20 | PinName gpio_multi_guard = (PinName)NC; /* If set pin name here, setting of the "pin" is just one time */ |
group-onsemi | 0:098463de4c5d | 21 | |
group-onsemi | 0:098463de4c5d | 22 | typedef struct { |
group-onsemi | 0:098463de4c5d | 23 | PinName pin; |
group-onsemi | 0:098463de4c5d | 24 | int function; |
group-onsemi | 0:098463de4c5d | 25 | int pm; |
group-onsemi | 0:098463de4c5d | 26 | } PinFunc; |
group-onsemi | 0:098463de4c5d | 27 | |
group-onsemi | 0:098463de4c5d | 28 | static const PinFunc PIPC_0_tbl[] = { |
group-onsemi | 0:098463de4c5d | 29 | // pin func pm |
group-onsemi | 0:098463de4c5d | 30 | {P4_0 , 2 , -1}, /* TIOC0A */ |
group-onsemi | 0:098463de4c5d | 31 | {P5_0 , 6 , -1}, /* TIOC0A */ |
group-onsemi | 0:098463de4c5d | 32 | {P7_0 , 7 , -1}, /* TIOC0A */ |
group-onsemi | 0:098463de4c5d | 33 | {P10_4 , 2 , -1}, /* TIOC0A */ |
group-onsemi | 0:098463de4c5d | 34 | {P4_1 , 2 , -1}, /* TIOC0B */ |
group-onsemi | 0:098463de4c5d | 35 | {P5_1 , 6 , -1}, /* TIOC0B */ |
group-onsemi | 0:098463de4c5d | 36 | {P7_1 , 7 , -1}, /* TIOC0B */ |
group-onsemi | 0:098463de4c5d | 37 | {P10_5 , 2 , -1}, /* TIOC0B */ |
group-onsemi | 0:098463de4c5d | 38 | {P4_2 , 2 , -1}, /* TIOC0C */ |
group-onsemi | 0:098463de4c5d | 39 | {P5_5 , 6 , -1}, /* TIOC0C */ |
group-onsemi | 0:098463de4c5d | 40 | {P7_2 , 7 , -1}, /* TIOC0C */ |
group-onsemi | 0:098463de4c5d | 41 | {P10_6 , 2 , -1}, /* TIOC0C */ |
group-onsemi | 0:098463de4c5d | 42 | {P4_3 , 2 , -1}, /* TIOC0D */ |
group-onsemi | 0:098463de4c5d | 43 | {P5_7 , 6 , -1}, /* TIOC0D */ |
group-onsemi | 0:098463de4c5d | 44 | {P7_3 , 7 , -1}, /* TIOC0D */ |
group-onsemi | 0:098463de4c5d | 45 | {P10_7 , 2 , -1}, /* TIOC0D */ |
group-onsemi | 0:098463de4c5d | 46 | {P2_11 , 5 , -1}, /* TIOC1A */ |
group-onsemi | 0:098463de4c5d | 47 | {P6_0 , 5 , -1}, /* TIOC1A */ |
group-onsemi | 0:098463de4c5d | 48 | {P7_4 , 7 , -1}, /* TIOC1A */ |
group-onsemi | 0:098463de4c5d | 49 | {P8_8 , 5 , -1}, /* TIOC1A */ |
group-onsemi | 0:098463de4c5d | 50 | {P9_7 , 4 , -1}, /* TIOC1A */ |
group-onsemi | 0:098463de4c5d | 51 | {P10_8 , 2 , -1}, /* TIOC1A */ |
group-onsemi | 0:098463de4c5d | 52 | {P2_12 , 8 , -1}, /* TIOC1B */ |
group-onsemi | 0:098463de4c5d | 53 | {P5_2 , 6 , -1}, /* TIOC1B */ |
group-onsemi | 0:098463de4c5d | 54 | {P6_1 , 5 , -1}, /* TIOC1B */ |
group-onsemi | 0:098463de4c5d | 55 | {P7_5 , 7 , -1}, /* TIOC1B */ |
group-onsemi | 0:098463de4c5d | 56 | {P8_9 , 5 , -1}, /* TIOC1B */ |
group-onsemi | 0:098463de4c5d | 57 | {P10_9 , 2 , -1}, /* TIOC1B */ |
group-onsemi | 0:098463de4c5d | 58 | {P2_1 , 6 , -1}, /* TIOC2A */ |
group-onsemi | 0:098463de4c5d | 59 | {P6_2 , 6 , -1}, /* TIOC2A */ |
group-onsemi | 0:098463de4c5d | 60 | {P7_6 , 7 , -1}, /* TIOC2A */ |
group-onsemi | 0:098463de4c5d | 61 | {P8_14 , 4 , -1}, /* TIOC2A */ |
group-onsemi | 0:098463de4c5d | 62 | {P10_10 , 2 , -1}, /* TIOC2A */ |
group-onsemi | 0:098463de4c5d | 63 | {P2_2 , 6 , -1}, /* TIOC2B */ |
group-onsemi | 0:098463de4c5d | 64 | {P6_3 , 6 , -1}, /* TIOC2B */ |
group-onsemi | 0:098463de4c5d | 65 | {P7_7 , 7 , -1}, /* TIOC2B */ |
group-onsemi | 0:098463de4c5d | 66 | {P8_15 , 4 , -1}, /* TIOC2B */ |
group-onsemi | 0:098463de4c5d | 67 | {P10_11 , 2 , -1}, /* TIOC2B */ |
group-onsemi | 0:098463de4c5d | 68 | {P10_11 , 2 , -1}, /* TIOC2B */ |
group-onsemi | 0:098463de4c5d | 69 | {P3_4 , 6 , -1}, /* TIOC3A */ |
group-onsemi | 0:098463de4c5d | 70 | {P7_8 , 7 , -1}, /* TIOC3A */ |
group-onsemi | 0:098463de4c5d | 71 | {P8_10 , 4 , -1}, /* TIOC3A */ |
group-onsemi | 0:098463de4c5d | 72 | {P3_5 , 6 , -1}, /* TIOC3B */ |
group-onsemi | 0:098463de4c5d | 73 | {P7_9 , 7 , -1}, /* TIOC3B */ |
group-onsemi | 0:098463de4c5d | 74 | {P8_11 , 4 , -1}, /* TIOC3B */ |
group-onsemi | 0:098463de4c5d | 75 | {P3_6 , 6 , -1}, /* TIOC3C */ |
group-onsemi | 0:098463de4c5d | 76 | {P5_3 , 6 , -1}, /* TIOC3C */ |
group-onsemi | 0:098463de4c5d | 77 | {P7_10 , 7 , -1}, /* TIOC3C */ |
group-onsemi | 0:098463de4c5d | 78 | {P8_12 , 4 , -1}, /* TIOC3C */ |
group-onsemi | 0:098463de4c5d | 79 | {P3_7 , 6 , -1}, /* TIOC3D */ |
group-onsemi | 0:098463de4c5d | 80 | {P5_4 , 6 , -1}, /* TIOC3D */ |
group-onsemi | 0:098463de4c5d | 81 | {P7_11 , 7 , -1}, /* TIOC3D */ |
group-onsemi | 0:098463de4c5d | 82 | {P8_13 , 4 , -1}, /* TIOC3D */ |
group-onsemi | 0:098463de4c5d | 83 | {P3_8 , 6 , -1}, /* TIOC4A */ |
group-onsemi | 0:098463de4c5d | 84 | {P4_4 , 3 , -1}, /* TIOC4A */ |
group-onsemi | 0:098463de4c5d | 85 | {P7_12 , 7 , -1}, /* TIOC4A */ |
group-onsemi | 0:098463de4c5d | 86 | {P11_0 , 2 , -1}, /* TIOC4A */ |
group-onsemi | 0:098463de4c5d | 87 | {P3_9 , 6 , -1}, /* TIOC4B */ |
group-onsemi | 0:098463de4c5d | 88 | {P4_5 , 3 , -1}, /* TIOC4B */ |
group-onsemi | 0:098463de4c5d | 89 | {P7_13 , 7 , -1}, /* TIOC4B */ |
group-onsemi | 0:098463de4c5d | 90 | {P11_1 , 2 , -1}, /* TIOC4B */ |
group-onsemi | 0:098463de4c5d | 91 | {P3_10 , 6 , -1}, /* TIOC4C */ |
group-onsemi | 0:098463de4c5d | 92 | {P4_6 , 3 , -1}, /* TIOC4C */ |
group-onsemi | 0:098463de4c5d | 93 | {P7_14 , 7 , -1}, /* TIOC4C */ |
group-onsemi | 0:098463de4c5d | 94 | {P11_2 , 2 , -1}, /* TIOC4C */ |
group-onsemi | 0:098463de4c5d | 95 | {P3_11 , 6 , -1}, /* TIOC4D */ |
group-onsemi | 0:098463de4c5d | 96 | {P4_7 , 3 , -1}, /* TIOC4D */ |
group-onsemi | 0:098463de4c5d | 97 | {P7_15 , 7 , -1}, /* TIOC4D */ |
group-onsemi | 0:098463de4c5d | 98 | {P11_3 , 2 , -1}, /* TIOC4D */ |
group-onsemi | 0:098463de4c5d | 99 | {P5_7 , 1 , 1 }, /* TXOUT0M */ |
group-onsemi | 0:098463de4c5d | 100 | {P5_6 , 1 , 1 }, /* TXOUT0P */ |
group-onsemi | 0:098463de4c5d | 101 | {P5_5 , 1 , 1 }, /* TXOUT1M */ |
group-onsemi | 0:098463de4c5d | 102 | {P5_4 , 1 , 1 }, /* TXOUT1P */ |
group-onsemi | 0:098463de4c5d | 103 | {P5_3 , 1 , 1 }, /* TXOUT2M */ |
group-onsemi | 0:098463de4c5d | 104 | {P5_2 , 1 , 1 }, /* TXOUT2P */ |
group-onsemi | 0:098463de4c5d | 105 | {P5_1 , 1 , 1 }, /* TXCLKOUTM */ |
group-onsemi | 0:098463de4c5d | 106 | {P5_0 , 1 , 1 }, /* TXCLKOUTP */ |
group-onsemi | 0:098463de4c5d | 107 | {P2_11 , 4 , 0 }, /* SSITxD0 */ |
group-onsemi | 0:098463de4c5d | 108 | {P4_7 , 5 , 0 }, /* SSITxD0 */ |
group-onsemi | 0:098463de4c5d | 109 | {P7_4 , 6 , 0 }, /* SSITxD1 */ |
group-onsemi | 0:098463de4c5d | 110 | {P10_15 , 2 , 0 }, /* SSITxD1 */ |
group-onsemi | 0:098463de4c5d | 111 | {P4_15 , 6 , 0 }, /* SSITxD3 */ |
group-onsemi | 0:098463de4c5d | 112 | {P7_11 , 2 , 0 }, /* SSITxD3 */ |
group-onsemi | 0:098463de4c5d | 113 | {P2_7 , 4 , 0 }, /* SSITxD5 */ |
group-onsemi | 0:098463de4c5d | 114 | {P4_11 , 5 , 0 }, /* SSITxD5 */ |
group-onsemi | 0:098463de4c5d | 115 | {P8_10 , 8 , 0 }, /* SSITxD5 */ |
group-onsemi | 0:098463de4c5d | 116 | {P3_7 , 8 , 0 }, /* WDTOVF */ |
group-onsemi | 0:098463de4c5d | 117 | {NC , 0 , -1} |
group-onsemi | 0:098463de4c5d | 118 | }; |
group-onsemi | 0:098463de4c5d | 119 | |
group-onsemi | 0:098463de4c5d | 120 | void pin_function(PinName pin, int function) { |
group-onsemi | 0:098463de4c5d | 121 | if (pin == (PinName)NC) return; |
group-onsemi | 0:098463de4c5d | 122 | |
group-onsemi | 0:098463de4c5d | 123 | int n = pin >> 4; |
group-onsemi | 0:098463de4c5d | 124 | int bitmask = 1<<(pin & 0xf); |
group-onsemi | 0:098463de4c5d | 125 | const PinFunc * Pipc_0_func = PIPC_0_tbl; |
group-onsemi | 0:098463de4c5d | 126 | int pipc_data = 1; |
group-onsemi | 0:098463de4c5d | 127 | |
group-onsemi | 0:098463de4c5d | 128 | if (gpio_multi_guard != pin) { |
group-onsemi | 0:098463de4c5d | 129 | if (function == 0) { |
group-onsemi | 0:098463de4c5d | 130 | // means GPIO mode |
group-onsemi | 0:098463de4c5d | 131 | *PMC(n) &= ~bitmask; |
group-onsemi | 0:098463de4c5d | 132 | } else { |
group-onsemi | 0:098463de4c5d | 133 | // alt-function mode |
group-onsemi | 0:098463de4c5d | 134 | --function; |
group-onsemi | 0:098463de4c5d | 135 | |
group-onsemi | 0:098463de4c5d | 136 | if (function & (1 << 2)) { *PFCAE(n) |= bitmask;}else { *PFCAE(n) &= ~bitmask;} |
group-onsemi | 0:098463de4c5d | 137 | if (function & (1 << 1)) { *PFCE(n) |= bitmask;}else { *PFCE(n) &= ~bitmask;} |
group-onsemi | 0:098463de4c5d | 138 | if (function & (1 << 0)) { *PFC(n) |= bitmask;}else { *PFC(n) &= ~bitmask;} |
group-onsemi | 0:098463de4c5d | 139 | |
group-onsemi | 0:098463de4c5d | 140 | while (Pipc_0_func->pin != NC) { |
group-onsemi | 0:098463de4c5d | 141 | if ((Pipc_0_func->pin == pin) && ((Pipc_0_func->function - 1) == function)) { |
group-onsemi | 0:098463de4c5d | 142 | pipc_data = 0; |
group-onsemi | 0:098463de4c5d | 143 | if (Pipc_0_func->pm == 0) { |
group-onsemi | 0:098463de4c5d | 144 | *PMSR(n) = (bitmask << 16) | 0; |
group-onsemi | 0:098463de4c5d | 145 | } else if (Pipc_0_func->pm == 1) { |
group-onsemi | 0:098463de4c5d | 146 | *PMSR(n) = (bitmask << 16) | bitmask; |
group-onsemi | 0:098463de4c5d | 147 | } else { |
group-onsemi | 0:098463de4c5d | 148 | // Do Nothing |
group-onsemi | 0:098463de4c5d | 149 | } |
group-onsemi | 0:098463de4c5d | 150 | break; |
group-onsemi | 0:098463de4c5d | 151 | } |
group-onsemi | 0:098463de4c5d | 152 | Pipc_0_func++; |
group-onsemi | 0:098463de4c5d | 153 | } |
group-onsemi | 0:098463de4c5d | 154 | if (pipc_data == 1) { |
group-onsemi | 0:098463de4c5d | 155 | *PIPC(n) |= bitmask; |
group-onsemi | 0:098463de4c5d | 156 | } else { |
group-onsemi | 0:098463de4c5d | 157 | *PIPC(n) &= ~bitmask; |
group-onsemi | 0:098463de4c5d | 158 | } |
group-onsemi | 0:098463de4c5d | 159 | |
group-onsemi | 0:098463de4c5d | 160 | if (P1_0 <= pin && pin <= P1_7 && function == 0) { |
group-onsemi | 0:098463de4c5d | 161 | *PBDC(n) |= bitmask; |
group-onsemi | 0:098463de4c5d | 162 | } |
group-onsemi | 0:098463de4c5d | 163 | *PMC(n) |= bitmask; |
group-onsemi | 0:098463de4c5d | 164 | } |
group-onsemi | 0:098463de4c5d | 165 | } else { |
group-onsemi | 0:098463de4c5d | 166 | gpio_multi_guard = (PinName)NC; |
group-onsemi | 0:098463de4c5d | 167 | } |
group-onsemi | 0:098463de4c5d | 168 | } |
group-onsemi | 0:098463de4c5d | 169 | |
group-onsemi | 0:098463de4c5d | 170 | void pin_mode(PinName pin, PinMode mode) { |
group-onsemi | 0:098463de4c5d | 171 | // if (pin == (PinName)NC) { return; } |
group-onsemi | 0:098463de4c5d | 172 | } |