5.2.1 - Updated I2C files
Dependents: mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510
targets/TARGET_NXP/TARGET_LPC408X/rtc_api.c@0:098463de4c5d, 2017-01-25 (annotated)
- Committer:
- group-onsemi
- Date:
- Wed Jan 25 20:34:15 2017 +0000
- Revision:
- 0:098463de4c5d
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
group-onsemi | 0:098463de4c5d | 1 | /* mbed Microcontroller Library |
group-onsemi | 0:098463de4c5d | 2 | * Copyright (c) 2006-2013 ARM Limited |
group-onsemi | 0:098463de4c5d | 3 | * |
group-onsemi | 0:098463de4c5d | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
group-onsemi | 0:098463de4c5d | 5 | * you may not use this file except in compliance with the License. |
group-onsemi | 0:098463de4c5d | 6 | * You may obtain a copy of the License at |
group-onsemi | 0:098463de4c5d | 7 | * |
group-onsemi | 0:098463de4c5d | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
group-onsemi | 0:098463de4c5d | 9 | * |
group-onsemi | 0:098463de4c5d | 10 | * Unless required by applicable law or agreed to in writing, software |
group-onsemi | 0:098463de4c5d | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
group-onsemi | 0:098463de4c5d | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
group-onsemi | 0:098463de4c5d | 13 | * See the License for the specific language governing permissions and |
group-onsemi | 0:098463de4c5d | 14 | * limitations under the License. |
group-onsemi | 0:098463de4c5d | 15 | */ |
group-onsemi | 0:098463de4c5d | 16 | #include "rtc_api.h" |
group-onsemi | 0:098463de4c5d | 17 | |
group-onsemi | 0:098463de4c5d | 18 | // ensure rtc is running (unchanged if already running) |
group-onsemi | 0:098463de4c5d | 19 | |
group-onsemi | 0:098463de4c5d | 20 | /* Setup the RTC based on a time structure, ensuring RTC is enabled |
group-onsemi | 0:098463de4c5d | 21 | * |
group-onsemi | 0:098463de4c5d | 22 | * Can be clocked by a 32.768KHz oscillator or prescale divider based on the APB clock |
group-onsemi | 0:098463de4c5d | 23 | * - We want to use the 32khz clock, allowing for sleep mode |
group-onsemi | 0:098463de4c5d | 24 | * |
group-onsemi | 0:098463de4c5d | 25 | * Most registers are not changed by a Reset |
group-onsemi | 0:098463de4c5d | 26 | * - We must initialize these registers between power-on and setting the RTC into operation |
group-onsemi | 0:098463de4c5d | 27 | |
group-onsemi | 0:098463de4c5d | 28 | * Clock Control Register |
group-onsemi | 0:098463de4c5d | 29 | * RTC_CCR[0] : Enable - 0 = Disabled, 1 = Enabled |
group-onsemi | 0:098463de4c5d | 30 | * RTC_CCR[1] : Reset - 0 = Normal, 1 = Reset |
group-onsemi | 0:098463de4c5d | 31 | * |
group-onsemi | 0:098463de4c5d | 32 | * The RTC may already be running, so we should set it up |
group-onsemi | 0:098463de4c5d | 33 | * without impacting if it is the case |
group-onsemi | 0:098463de4c5d | 34 | */ |
group-onsemi | 0:098463de4c5d | 35 | void rtc_init(void) { |
group-onsemi | 0:098463de4c5d | 36 | LPC_SC->PCONP |= 0x200; // Ensure power is on |
group-onsemi | 0:098463de4c5d | 37 | LPC_RTC->CCR = 0x00; |
group-onsemi | 0:098463de4c5d | 38 | |
group-onsemi | 0:098463de4c5d | 39 | LPC_RTC->CCR |= 1 << 0; // Ensure the RTC is enabled |
group-onsemi | 0:098463de4c5d | 40 | } |
group-onsemi | 0:098463de4c5d | 41 | |
group-onsemi | 0:098463de4c5d | 42 | void rtc_free(void) { |
group-onsemi | 0:098463de4c5d | 43 | // [TODO] |
group-onsemi | 0:098463de4c5d | 44 | } |
group-onsemi | 0:098463de4c5d | 45 | |
group-onsemi | 0:098463de4c5d | 46 | /* |
group-onsemi | 0:098463de4c5d | 47 | * Little check routine to see if the RTC has been enabled |
group-onsemi | 0:098463de4c5d | 48 | * |
group-onsemi | 0:098463de4c5d | 49 | * Clock Control Register |
group-onsemi | 0:098463de4c5d | 50 | * RTC_CCR[0] : 0 = Disabled, 1 = Enabled |
group-onsemi | 0:098463de4c5d | 51 | * |
group-onsemi | 0:098463de4c5d | 52 | */ |
group-onsemi | 0:098463de4c5d | 53 | int rtc_isenabled(void) { |
group-onsemi | 0:098463de4c5d | 54 | return(((LPC_RTC->CCR) & 0x01) != 0); |
group-onsemi | 0:098463de4c5d | 55 | } |
group-onsemi | 0:098463de4c5d | 56 | |
group-onsemi | 0:098463de4c5d | 57 | /* |
group-onsemi | 0:098463de4c5d | 58 | * RTC Registers |
group-onsemi | 0:098463de4c5d | 59 | * RTC_SEC Seconds 0-59 |
group-onsemi | 0:098463de4c5d | 60 | * RTC_MIN Minutes 0-59 |
group-onsemi | 0:098463de4c5d | 61 | * RTC_HOUR Hour 0-23 |
group-onsemi | 0:098463de4c5d | 62 | * RTC_DOM Day of Month 1-28..31 |
group-onsemi | 0:098463de4c5d | 63 | * RTC_DOW Day of Week 0-6 |
group-onsemi | 0:098463de4c5d | 64 | * RTC_DOY Day of Year 1-365 |
group-onsemi | 0:098463de4c5d | 65 | * RTC_MONTH Month 1-12 |
group-onsemi | 0:098463de4c5d | 66 | * RTC_YEAR Year 0-4095 |
group-onsemi | 0:098463de4c5d | 67 | * |
group-onsemi | 0:098463de4c5d | 68 | * struct tm |
group-onsemi | 0:098463de4c5d | 69 | * tm_sec seconds after the minute 0-61 |
group-onsemi | 0:098463de4c5d | 70 | * tm_min minutes after the hour 0-59 |
group-onsemi | 0:098463de4c5d | 71 | * tm_hour hours since midnight 0-23 |
group-onsemi | 0:098463de4c5d | 72 | * tm_mday day of the month 1-31 |
group-onsemi | 0:098463de4c5d | 73 | * tm_mon months since January 0-11 |
group-onsemi | 0:098463de4c5d | 74 | * tm_year years since 1900 |
group-onsemi | 0:098463de4c5d | 75 | * tm_wday days since Sunday 0-6 |
group-onsemi | 0:098463de4c5d | 76 | * tm_yday days since January 1 0-365 |
group-onsemi | 0:098463de4c5d | 77 | * tm_isdst Daylight Saving Time flag |
group-onsemi | 0:098463de4c5d | 78 | */ |
group-onsemi | 0:098463de4c5d | 79 | time_t rtc_read(void) { |
group-onsemi | 0:098463de4c5d | 80 | // Setup a tm structure based on the RTC |
group-onsemi | 0:098463de4c5d | 81 | struct tm timeinfo; |
group-onsemi | 0:098463de4c5d | 82 | timeinfo.tm_sec = LPC_RTC->SEC; |
group-onsemi | 0:098463de4c5d | 83 | timeinfo.tm_min = LPC_RTC->MIN; |
group-onsemi | 0:098463de4c5d | 84 | timeinfo.tm_hour = LPC_RTC->HOUR; |
group-onsemi | 0:098463de4c5d | 85 | timeinfo.tm_mday = LPC_RTC->DOM; |
group-onsemi | 0:098463de4c5d | 86 | timeinfo.tm_mon = LPC_RTC->MONTH - 1; |
group-onsemi | 0:098463de4c5d | 87 | timeinfo.tm_year = LPC_RTC->YEAR - 1900; |
group-onsemi | 0:098463de4c5d | 88 | |
group-onsemi | 0:098463de4c5d | 89 | // Convert to timestamp |
group-onsemi | 0:098463de4c5d | 90 | time_t t = mktime(&timeinfo); |
group-onsemi | 0:098463de4c5d | 91 | |
group-onsemi | 0:098463de4c5d | 92 | return t; |
group-onsemi | 0:098463de4c5d | 93 | } |
group-onsemi | 0:098463de4c5d | 94 | |
group-onsemi | 0:098463de4c5d | 95 | void rtc_write(time_t t) { |
group-onsemi | 0:098463de4c5d | 96 | // Convert the time in to a tm |
group-onsemi | 0:098463de4c5d | 97 | struct tm *timeinfo = localtime(&t); |
group-onsemi | 0:098463de4c5d | 98 | |
group-onsemi | 0:098463de4c5d | 99 | // Pause clock, and clear counter register (clears us count) |
group-onsemi | 0:098463de4c5d | 100 | LPC_RTC->CCR |= 2; |
group-onsemi | 0:098463de4c5d | 101 | |
group-onsemi | 0:098463de4c5d | 102 | // Set the RTC |
group-onsemi | 0:098463de4c5d | 103 | LPC_RTC->SEC = timeinfo->tm_sec; |
group-onsemi | 0:098463de4c5d | 104 | LPC_RTC->MIN = timeinfo->tm_min; |
group-onsemi | 0:098463de4c5d | 105 | LPC_RTC->HOUR = timeinfo->tm_hour; |
group-onsemi | 0:098463de4c5d | 106 | LPC_RTC->DOM = timeinfo->tm_mday; |
group-onsemi | 0:098463de4c5d | 107 | LPC_RTC->MONTH = timeinfo->tm_mon + 1; |
group-onsemi | 0:098463de4c5d | 108 | LPC_RTC->YEAR = timeinfo->tm_year + 1900; |
group-onsemi | 0:098463de4c5d | 109 | |
group-onsemi | 0:098463de4c5d | 110 | // Restart clock |
group-onsemi | 0:098463de4c5d | 111 | LPC_RTC->CCR &= ~((uint32_t)2); |
group-onsemi | 0:098463de4c5d | 112 | } |