5.2.1 - Updated I2C files
Dependents: mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510
targets/TARGET_NUVOTON/TARGET_M451/gpio_api.c@0:098463de4c5d, 2017-01-25 (annotated)
- Committer:
- group-onsemi
- Date:
- Wed Jan 25 20:34:15 2017 +0000
- Revision:
- 0:098463de4c5d
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
group-onsemi | 0:098463de4c5d | 1 | /* mbed Microcontroller Library |
group-onsemi | 0:098463de4c5d | 2 | * Copyright (c) 2015-2016 Nuvoton |
group-onsemi | 0:098463de4c5d | 3 | * |
group-onsemi | 0:098463de4c5d | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
group-onsemi | 0:098463de4c5d | 5 | * you may not use this file except in compliance with the License. |
group-onsemi | 0:098463de4c5d | 6 | * You may obtain a copy of the License at |
group-onsemi | 0:098463de4c5d | 7 | * |
group-onsemi | 0:098463de4c5d | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
group-onsemi | 0:098463de4c5d | 9 | * |
group-onsemi | 0:098463de4c5d | 10 | * Unless required by applicable law or agreed to in writing, software |
group-onsemi | 0:098463de4c5d | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
group-onsemi | 0:098463de4c5d | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
group-onsemi | 0:098463de4c5d | 13 | * See the License for the specific language governing permissions and |
group-onsemi | 0:098463de4c5d | 14 | * limitations under the License. |
group-onsemi | 0:098463de4c5d | 15 | */ |
group-onsemi | 0:098463de4c5d | 16 | |
group-onsemi | 0:098463de4c5d | 17 | #include "gpio_api.h" |
group-onsemi | 0:098463de4c5d | 18 | #include "mbed_assert.h" |
group-onsemi | 0:098463de4c5d | 19 | #include "pinmap.h" |
group-onsemi | 0:098463de4c5d | 20 | #include "mbed_error.h" |
group-onsemi | 0:098463de4c5d | 21 | #include "PeripheralPins.h" |
group-onsemi | 0:098463de4c5d | 22 | |
group-onsemi | 0:098463de4c5d | 23 | uint32_t gpio_set(PinName pin) |
group-onsemi | 0:098463de4c5d | 24 | { |
group-onsemi | 0:098463de4c5d | 25 | if (pin == (PinName) NC) { |
group-onsemi | 0:098463de4c5d | 26 | return 0; |
group-onsemi | 0:098463de4c5d | 27 | } |
group-onsemi | 0:098463de4c5d | 28 | |
group-onsemi | 0:098463de4c5d | 29 | uint32_t pin_index = NU_PINNAME_TO_PIN(pin); |
group-onsemi | 0:098463de4c5d | 30 | |
group-onsemi | 0:098463de4c5d | 31 | #if 1 |
group-onsemi | 0:098463de4c5d | 32 | pin_function(pin, 0 << NU_MFP_POS(pin_index)); |
group-onsemi | 0:098463de4c5d | 33 | #else |
group-onsemi | 0:098463de4c5d | 34 | pinmap_pinout(pin, PinMap_GPIO); |
group-onsemi | 0:098463de4c5d | 35 | #endif |
group-onsemi | 0:098463de4c5d | 36 | |
group-onsemi | 0:098463de4c5d | 37 | return (uint32_t)(1 << pin_index); // Return the pin mask |
group-onsemi | 0:098463de4c5d | 38 | } |
group-onsemi | 0:098463de4c5d | 39 | |
group-onsemi | 0:098463de4c5d | 40 | void gpio_init(gpio_t *obj, PinName pin) |
group-onsemi | 0:098463de4c5d | 41 | { |
group-onsemi | 0:098463de4c5d | 42 | obj->pin = pin; |
group-onsemi | 0:098463de4c5d | 43 | |
group-onsemi | 0:098463de4c5d | 44 | if (obj->pin == (PinName) NC) { |
group-onsemi | 0:098463de4c5d | 45 | return; |
group-onsemi | 0:098463de4c5d | 46 | } |
group-onsemi | 0:098463de4c5d | 47 | |
group-onsemi | 0:098463de4c5d | 48 | obj->mask = gpio_set(pin); |
group-onsemi | 0:098463de4c5d | 49 | } |
group-onsemi | 0:098463de4c5d | 50 | |
group-onsemi | 0:098463de4c5d | 51 | void gpio_mode(gpio_t *obj, PinMode mode) |
group-onsemi | 0:098463de4c5d | 52 | { |
group-onsemi | 0:098463de4c5d | 53 | if (obj->pin == (PinName) NC) { |
group-onsemi | 0:098463de4c5d | 54 | return; |
group-onsemi | 0:098463de4c5d | 55 | } |
group-onsemi | 0:098463de4c5d | 56 | |
group-onsemi | 0:098463de4c5d | 57 | pin_mode(obj->pin, mode); |
group-onsemi | 0:098463de4c5d | 58 | } |
group-onsemi | 0:098463de4c5d | 59 | |
group-onsemi | 0:098463de4c5d | 60 | void gpio_dir(gpio_t *obj, PinDirection direction) |
group-onsemi | 0:098463de4c5d | 61 | { |
group-onsemi | 0:098463de4c5d | 62 | if (obj->pin == (PinName) NC) { |
group-onsemi | 0:098463de4c5d | 63 | return; |
group-onsemi | 0:098463de4c5d | 64 | } |
group-onsemi | 0:098463de4c5d | 65 | |
group-onsemi | 0:098463de4c5d | 66 | uint32_t pin_index = NU_PINNAME_TO_PIN(obj->pin); |
group-onsemi | 0:098463de4c5d | 67 | uint32_t port_index = NU_PINNAME_TO_PORT(obj->pin); |
group-onsemi | 0:098463de4c5d | 68 | GPIO_T *gpio_base = NU_PORT_BASE(port_index); |
group-onsemi | 0:098463de4c5d | 69 | |
group-onsemi | 0:098463de4c5d | 70 | uint32_t mode_intern = GPIO_MODE_INPUT; |
group-onsemi | 0:098463de4c5d | 71 | |
group-onsemi | 0:098463de4c5d | 72 | switch (direction) { |
group-onsemi | 0:098463de4c5d | 73 | case PIN_INPUT: |
group-onsemi | 0:098463de4c5d | 74 | mode_intern = GPIO_MODE_INPUT; |
group-onsemi | 0:098463de4c5d | 75 | break; |
group-onsemi | 0:098463de4c5d | 76 | |
group-onsemi | 0:098463de4c5d | 77 | case PIN_OUTPUT: |
group-onsemi | 0:098463de4c5d | 78 | mode_intern = GPIO_MODE_OUTPUT; |
group-onsemi | 0:098463de4c5d | 79 | break; |
group-onsemi | 0:098463de4c5d | 80 | |
group-onsemi | 0:098463de4c5d | 81 | default: |
group-onsemi | 0:098463de4c5d | 82 | return; |
group-onsemi | 0:098463de4c5d | 83 | } |
group-onsemi | 0:098463de4c5d | 84 | |
group-onsemi | 0:098463de4c5d | 85 | GPIO_SetMode(gpio_base, 1 << pin_index, mode_intern); |
group-onsemi | 0:098463de4c5d | 86 | } |