Demo application of SNICInterface library for Murata TypeYD, which reports sensor data periodically to Xively cloud server . Hardware platform: mbed application board (https://mbed.org/cookbook/mbed-application-board), mbed LPC1768 (https://mbed.org/platforms/mbed-LPC1768/) and TypeYD.

Dependencies:   C12832 LM75B MMA7660 SNICInterface libxively mbed-rtos mbed

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Show/hide line numbers EthernetPowerControl.cpp Source File

EthernetPowerControl.cpp

00001 #if defined(TARGET_LPC1768)
00002 #include "EthernetPowerControl.h"
00003 
00004 static void write_PHY (unsigned int PhyReg, unsigned short Value) {
00005    /* Write a data 'Value' to PHY register 'PhyReg'. */
00006    unsigned int tout;
00007    /* Hardware MII Management for LPC176x devices. */
00008    LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
00009    LPC_EMAC->MWTD = Value;
00010 
00011    /* Wait utill operation completed */
00012    for (tout = 0; tout < MII_WR_TOUT; tout++) {
00013       if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
00014          break;
00015       }
00016    }
00017 }
00018 
00019 static unsigned short read_PHY (unsigned int PhyReg) {
00020    /* Read a PHY register 'PhyReg'. */
00021    unsigned int tout, val;
00022 
00023    LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
00024    LPC_EMAC->MCMD = MCMD_READ;
00025 
00026    /* Wait until operation completed */
00027    for (tout = 0; tout < MII_RD_TOUT; tout++) {
00028       if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
00029          break;
00030       }
00031    }
00032    LPC_EMAC->MCMD = 0;
00033    val = LPC_EMAC->MRDD;
00034    
00035    return (val);
00036 }
00037 
00038 void EMAC_Init()
00039 {
00040   unsigned int tout,regv;
00041   /* Power Up the EMAC controller. */
00042   Peripheral_PowerUp(LPC1768_PCONP_PCENET);
00043   
00044   LPC_PINCON->PINSEL2 = 0x50150105;
00045   LPC_PINCON->PINSEL3 &= ~0x0000000F;
00046   LPC_PINCON->PINSEL3 |= 0x00000005;
00047 
00048   /* Reset all EMAC internal modules. */
00049   LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
00050              MAC1_SIM_RES | MAC1_SOFT_RES;
00051   LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;
00052 
00053   /* A short delay after reset. */
00054   for (tout = 100; tout; tout--);
00055 
00056   /* Initialize MAC control registers. */
00057   LPC_EMAC->MAC1 = MAC1_PASS_ALL;
00058   LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
00059   LPC_EMAC->MAXF = ETH_MAX_FLEN;
00060   LPC_EMAC->CLRT = CLRT_DEF;
00061   LPC_EMAC->IPGR = IPGR_DEF;
00062 
00063   /* Enable Reduced MII interface. */
00064   LPC_EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM;
00065 
00066   /* Reset Reduced MII Logic. */
00067   LPC_EMAC->SUPP = SUPP_RES_RMII;
00068   for (tout = 100; tout; tout--);
00069   LPC_EMAC->SUPP = 0;
00070 
00071   /* Put the DP83848C in reset mode */
00072   write_PHY (PHY_REG_BMCR, 0x8000);
00073 
00074   /* Wait for hardware reset to end. */
00075   for (tout = 0; tout < 0x100000; tout++) {
00076     regv = read_PHY (PHY_REG_BMCR);
00077     if (!(regv & 0x8000)) {
00078       /* Reset complete */
00079       break;
00080     }
00081   }
00082 }
00083 
00084 
00085 void PHY_PowerDown()
00086 {
00087     if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
00088         EMAC_Init(); //init EMAC if it is not already init'd
00089     
00090     unsigned int regv;
00091     regv = read_PHY(PHY_REG_BMCR);
00092     write_PHY(PHY_REG_BMCR, regv | (1 << PHY_REG_BMCR_POWERDOWN));
00093     regv = read_PHY(PHY_REG_BMCR);
00094     
00095     //shouldn't need the EMAC now.
00096     Peripheral_PowerDown(LPC1768_PCONP_PCENET);
00097     
00098     //and turn off the PHY OSC
00099      LPC_GPIO1->FIODIR |= 0x8000000;
00100      LPC_GPIO1->FIOCLR = 0x8000000;
00101 }
00102 
00103 void PHY_PowerUp()
00104 {   
00105     if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
00106         EMAC_Init(); //init EMAC if it is not already init'd
00107         
00108     LPC_GPIO1->FIODIR |= 0x8000000;
00109     LPC_GPIO1->FIOSET = 0x8000000;
00110     
00111     //wait for osc to be stable
00112     wait_ms(200);
00113     
00114     unsigned int regv;
00115     regv = read_PHY(PHY_REG_BMCR);
00116     write_PHY(PHY_REG_BMCR, regv & ~(1 << PHY_REG_BMCR_POWERDOWN));
00117     regv = read_PHY(PHY_REG_BMCR);
00118 }
00119 
00120 void PHY_EnergyDetect_Enable()
00121 {
00122     if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
00123         EMAC_Init(); //init EMAC if it is not already init'd
00124         
00125     unsigned int regv;
00126     regv = read_PHY(PHY_REG_EDCR);
00127     write_PHY(PHY_REG_BMCR, regv | (1 << PHY_REG_EDCR_ENABLE));
00128     regv = read_PHY(PHY_REG_EDCR);   
00129 }
00130 
00131 void PHY_EnergyDetect_Disable()
00132 {
00133     if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
00134         EMAC_Init(); //init EMAC if it is not already init'd
00135     unsigned int regv;
00136     regv = read_PHY(PHY_REG_EDCR);
00137     write_PHY(PHY_REG_BMCR, regv & ~(1 << PHY_REG_EDCR_ENABLE));
00138     regv = read_PHY(PHY_REG_EDCR);   
00139 }
00140 #endif